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2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 335Thomas Gleixner1-13/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin st fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 111 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000436.567572064@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-16iommu/tegra: gart: Perform code refactoringDmitry Osipenko1-148/+105
Removed redundant safety-checks in the code and some debug code that isn't actually very useful for debugging, like enormous pagetable dump on each fault. The majority of the changes are code reshuffling, variables/whitespaces clean up and removal of debug messages that duplicate messages of the IOMMU-core. Now the GART translation is kept disabled while GART is suspended. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Simplify clients-tracking codeDmitry Osipenko1-115/+40
GART is a simple IOMMU provider that has single address space. There is no need to setup global clients list and manage it for tracking of the active domain, hence lot's of code could be safely removed and replaced with a simpler alternative. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Don't detach devices from inactive domainsDmitry Osipenko1-3/+5
There could be unlimited number of allocated domains, but only one domain can be active at a time. Hence devices must be detached only from the active domain. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Prepend error/debug messages with "gart:"Dmitry Osipenko1-0/+2
GART became a part of Memory Controller, hence now the drivers device is Memory Controller and not GART. As a result all printed messages are prepended with the "tegra-mc 7000f000.memory-controller:", so let's prepend GART's messages with "gart:" in order to differentiate them from the MC. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Don't use managed resourcesDmitry Osipenko1-5/+7
GART is a part of the Memory Controller driver that is always built-in, hence there is no benefit from the use of managed resources. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Allow only one active domain at a timeDmitry Osipenko1-0/+9
GART has a single address space that is shared by all devices, hence only one domain could be active at a time. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Fix NULL pointer dereferenceDmitry Osipenko1-2/+2
Fix NULL pointer dereference on IOMMU domain destruction that happens because clients list is being iterated unsafely and its elements are getting deleted during the iteration. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Fix spinlock recursionDmitry Osipenko1-8/+16
Fix spinlock recursion bug that happens on IOMMU domain destruction if any of the allocated domains have devices attached to them. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Integrate with Memory Controller driverDmitry Osipenko1-53/+18
The device-tree binding has been changed. There is no separate GART device anymore, it is squashed into the Memory Controller. Integrate GART module with the MC in a way it is done for the SMMU on Tegra30+. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Optimize mapping / unmapping performanceDmitry Osipenko1-2/+10
Currently GART writes one page entry at a time. More optimal would be to aggregate the writes and flush BUS buffer in the end, this gives map/unmap 10-40% performance boost (depending on size of mapping) in comparison to flushing after each page entry update. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Ignore devices without IOMMU phandle in DTDmitry Osipenko1-1/+13
GART can't handle all devices, hence ignore devices that aren't related to GART. IOMMU phandle must be explicitly assign to devices in the device tree. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Clean up driver probe errors handlingDmitry Osipenko1-6/+10
Properly clean up allocated resources on the drivers probe failure and remove unneeded checks. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-01-16iommu/tegra: gart: Remove pr_fmt and clean up includesDmitry Osipenko1-12/+5
Remove unneeded headers inclusion and sort the headers in alphabet order. Remove pr_fmt macro since there is no pr_*() in the code and it doesn't affect dev_*() functions. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2018-12-03iommu/tegra: Make it explicitly non-modularPaul Gortmaker1-30/+7
The Kconfig currently controlling compilation of this code is: drivers/iommu/Kconfig:config TEGRA_IOMMU_GART drivers/iommu/Kconfig: bool "Tegra GART IOMMU Support" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_init was not in use by this code, the init ordering remains unchanged with this commit. We replace module.h with moduleparam.h since the file does actually declare some module_param() and the easiest way to keep back compatibility with existing use cases is to leave it as-is for now. The init function was missing an __init annotation, so it was added. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Hiroshi Doyu <hdoyu@nvidia.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: iommu@lists.linux-foundation.org Cc: linux-tegra@vger.kernel.org Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2018-08-08iommu: Remove the ->map_sg indirectionChristoph Hellwig1-1/+0
All iommu drivers use the default_iommu_map_sg implementation, and there is no good reason to ever override it. Just expose it as iommu_map_sg directly and remove the indirection, specially in our post-spectre world where indirect calls are horribly expensive. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2018-06-12treewide: Use array_size() in vmalloc()Kees Cook1-1/+1
The vmalloc() function has no 2-factor argument form, so multiplication factors need to be wrapped in array_size(). This patch replaces cases of: vmalloc(a * b) with: vmalloc(array_size(a, b)) as well as handling cases of: vmalloc(a * b * c) with: vmalloc(array3_size(a, b, c)) This does, however, attempt to ignore constant size factors like: vmalloc(4 * 1024) though any constants defined via macros get caught up in the conversion. Any factors with a sizeof() of "unsigned char", "char", and "u8" were dropped, since they're redundant. The Coccinelle script used for this was: // Fix redundant parens around sizeof(). @@ type TYPE; expression THING, E; @@ ( vmalloc( - (sizeof(TYPE)) * E + sizeof(TYPE) * E , ...) | vmalloc( - (sizeof(THING)) * E + sizeof(THING) * E , ...) ) // Drop single-byte sizes and redundant parens. @@ expression COUNT; typedef u8; typedef __u8; @@ ( vmalloc( - sizeof(u8) * (COUNT) + COUNT , ...) | vmalloc( - sizeof(__u8) * (COUNT) + COUNT , ...) | vmalloc( - sizeof(char) * (COUNT) + COUNT , ...) | vmalloc( - sizeof(unsigned char) * (COUNT) + COUNT , ...) | vmalloc( - sizeof(u8) * COUNT + COUNT , ...) | vmalloc( - sizeof(__u8) * COUNT + COUNT , ...) | vmalloc( - sizeof(char) * COUNT + COUNT , ...) | vmalloc( - sizeof(unsigned char) * COUNT + COUNT , ...) ) // 2-factor product with sizeof(type/expression) and identifier or constant. @@ type TYPE; expression THING; identifier COUNT_ID; constant COUNT_CONST; @@ ( vmalloc( - sizeof(TYPE) * (COUNT_ID) + array_size(COUNT_ID, sizeof(TYPE)) , ...) | vmalloc( - sizeof(TYPE) * COUNT_ID + array_size(COUNT_ID, sizeof(TYPE)) , ...) | vmalloc( - sizeof(TYPE) * (COUNT_CONST) + array_size(COUNT_CONST, sizeof(TYPE)) , ...) | vmalloc( - sizeof(TYPE) * COUNT_CONST + array_size(COUNT_CONST, sizeof(TYPE)) , ...) | vmalloc( - sizeof(THING) * (COUNT_ID) + array_size(COUNT_ID, sizeof(THING)) , ...) | vmalloc( - sizeof(THING) * COUNT_ID + array_size(COUNT_ID, sizeof(THING)) , ...) | vmalloc( - sizeof(THING) * (COUNT_CONST) + array_size(COUNT_CONST, sizeof(THING)) , ...) | vmalloc( - sizeof(THING) * COUNT_CONST + array_size(COUNT_CONST, sizeof(THING)) , ...) ) // 2-factor product, only identifiers. @@ identifier SIZE, COUNT; @@ vmalloc( - SIZE * COUNT + array_size(COUNT, SIZE) , ...) // 3-factor product with 1 sizeof(type) or sizeof(expression), with // redundant parens removed. @@ expression THING; identifier STRIDE, COUNT; type TYPE; @@ ( vmalloc( - sizeof(TYPE) * (COUNT) * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | vmalloc( - sizeof(TYPE) * (COUNT) * STRIDE + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | vmalloc( - sizeof(TYPE) * COUNT * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | vmalloc( - sizeof(TYPE) * COUNT * STRIDE + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | vmalloc( - sizeof(THING) * (COUNT) * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | vmalloc( - sizeof(THING) * (COUNT) * STRIDE + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | vmalloc( - sizeof(THING) * COUNT * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | vmalloc( - sizeof(THING) * COUNT * STRIDE + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) ) // 3-factor product with 2 sizeof(variable), with redundant parens removed. @@ expression THING1, THING2; identifier COUNT; type TYPE1, TYPE2; @@ ( vmalloc( - sizeof(TYPE1) * sizeof(TYPE2) * COUNT + array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2)) , ...) | vmalloc( - sizeof(TYPE1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2)) , ...) | vmalloc( - sizeof(THING1) * sizeof(THING2) * COUNT + array3_size(COUNT, sizeof(THING1), sizeof(THING2)) , ...) | vmalloc( - sizeof(THING1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(THING1), sizeof(THING2)) , ...) | vmalloc( - sizeof(TYPE1) * sizeof(THING2) * COUNT + array3_size(COUNT, sizeof(TYPE1), sizeof(THING2)) , ...) | vmalloc( - sizeof(TYPE1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(TYPE1), sizeof(THING2)) , ...) ) // 3-factor product, only identifiers, with redundant parens removed. @@ identifier STRIDE, SIZE, COUNT; @@ ( vmalloc( - (COUNT) * STRIDE * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | vmalloc( - COUNT * (STRIDE) * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | vmalloc( - COUNT * STRIDE * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | vmalloc( - (COUNT) * (STRIDE) * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | vmalloc( - COUNT * (STRIDE) * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | vmalloc( - (COUNT) * STRIDE * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | vmalloc( - (COUNT) * (STRIDE) * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | vmalloc( - COUNT * STRIDE * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) ) // Any remaining multi-factor products, first at least 3-factor products // when they're not all constants... @@ expression E1, E2, E3; constant C1, C2, C3; @@ ( vmalloc(C1 * C2 * C3, ...) | vmalloc( - E1 * E2 * E3 + array3_size(E1, E2, E3) , ...) ) // And then all remaining 2 factors products when they're not all constants. @@ expression E1, E2; constant C1, C2; @@ ( vmalloc(C1 * C2, ...) | vmalloc( - E1 * E2 + array_size(E1, E2) , ...) ) Signed-off-by: Kees Cook <keescook@chromium.org>
2018-05-03iommu/tegra: gart: Fix gart_iommu_unmap()Dmitry Osipenko1-1/+1
It must return the number of unmapped bytes on success, returning 0 means that unmapping failed and in result only one page is unmapped. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2018-05-03iommu/tegra: gart: Add debugging facilityDmitry Osipenko1-0/+13
Page mapping could overwritten by an accident (a bug). We can catch this case by checking 'VALID' bit of GART's page entry prior to mapping of a page. Since that check introduces a small performance impact, it should be enabled explicitly using new GART's kernel module 'debug' parameter. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-08-17iommu/tegra-gart: Add support for struct iommu_deviceJoerg Roedel1-0/+26
Add a struct iommu_device to each tegra-gart and register it with the iommu-core. Also link devices added to the driver to their respective hardware iommus. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-08-10iommu/tegra-gart: Add iommu_group supportRobin Murphy1-0/+19
As the last step to making groups mandatory, clean up the remaining drivers by adding basic support. Whilst it may not perfectly reflect the isolation capabilities of the hardware, using generic_device_group() should at least maintain existing behaviour with respect to the API. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2015-04-02Merge branches 'iommu/fixes', 'x86/vt-d', 'x86/amd', 'arm/smmu', 'arm/tegra' and 'core' into nextJoerg Roedel1-31/+57
Conflicts: drivers/iommu/amd_iommu.c drivers/iommu/tegra-gart.c drivers/iommu/tegra-smmu.c
2015-03-31iommu/tegra: gart: Set aperture at domain initialization timeThierry Reding1-11/+14
The aperture of the domain should always be available, otherwise drivers need to attach first before they can use the aperture geometry. Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2015-03-31iommu/tegra-gart: Make use of domain_alloc and domain_freeJoerg Roedel1-21/+46
Implement domain_alloc and domain_free iommu-ops as a replacement for domain_init/domain_destroy. Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2015-01-26iommu/tegra: gart: Provide default ->map_sg() callbackThierry Reding1-0/+1
Commit 315786ebbf4a ("iommu: Add iommu_map_sg() function") adds a new ->map_sg() callback and provides a default implementation that drivers can use until they implement a hardware-specific variant. Unfortunately the Tegra GART driver was not updated as part of that commit, so that iommu_map_sg() calls on a domain provided by the GART cause an oops. Fixes: 315786ebbf4a ("iommu: Add iommu_map_sg() function") Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2015-01-26iommu/tegra: gart: Do not register with busThierry Reding1-1/+1
The driver currently doesn't work as expected and causes existing setups with Tegra20 to break after commit df06b759f2cf ("drm/tegra: Add IOMMU support"). To restore these setups, do not register the operations with the platform bus for now. Fixing this properly will involve non-trivial changes to the DRM driver, which are unlikely to be accepted at this point in the release cycle. Reported-by: Misha Komarovskiy <zombah@gmail.com> Reported-by: Nicolas Chauvet <kwizart@gmail.com> Tested-by: Misha Komarovskiy <zombah@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2014-10-20iommu: drop owner assignment from platform_driversWolfram Sang1-1/+0
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-09-25iommu: Make of_device_id array constKiran Padwal1-1/+1
Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2014-09-25iommu/tegra: Convert to iommu_capable() API functionJoerg Roedel1-4/+3
Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2014-07-07iommu: Constify struct iommu_opsThierry Reding1-1/+1
This structure is read-only data and should never be modified. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2013-11-01iommu/tegra-gart: Staticize tegra_gart_pm_opsSachin Kamat1-1/+1
'tegra_gart_pm_ops' is local to this file. Make it static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-09-24iommu/tegra: gart: cleanup devm_* functions usageWei Yongjun1-17/+2
The devm_[kzalloc|ioremap] functions allocates data that are released when a driver detaches. Thus, there is no reason to explicitly call devm_[kfree|iounmap] in probe or remove functions. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-09-24iommu/tegra: Print phys_addr_t using %paThierry Reding1-3/+3
When enabling LPAE on ARM, phys_addr_t becomes 64 bits wide and printing a variable of that type using a simple %x format specifier causes the compiler to complain. Change the format specifier to %pa, which is used specifically for variables of type phys_addr_t. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-05-02Merge branches 'iommu/fixes', 'x86/vt-d', 'x86/amd', 'ppc/pamu', 'core' and 'arm/tegra' into nextJoerg Roedel1-2/+3
2013-05-02iommu/tegra: Fix printk formats for dma_addr_tVarun Sethi1-1/+2
Fix printk formats for dma_addr_t: drivers/iommu/tegra-smmu.c: In function 'smmu_iommu_iova_to_phys': >> drivers/iommu/tegra-smmu.c:774:2: warning: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'dma_addr_t' [-Wformat] -- drivers/iommu/tegra-gart.c: In function 'gart_iommu_iova_to_phys': >> drivers/iommu/tegra-gart.c:298:3: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'dma_addr_t' [-Wformat] Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-02iommu/fsl: Make iova dma_addr_t in the iommu_iova_to_phys API.Varun Sethi1-1/+1
This is required in case of PAMU, as it can support a window size of up to 64G (even on 32bit). Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-02-19iommu/tegra: assume CONFIG_OF in gart driverStephen Warren1-3/+1
Tegra only supports, and always enables, device tree. Remove all ifdefs for DT support from the driver. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-01-03Drivers: iommu: remove __dev* attributes.Greg Kroah-Hartman1-2/+2
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Omar Ramirez Luna <omar.luna@linaro.org> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Bharat Nihalani <bnihalani@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28iommu/tegra: gart: Move bus_set_iommu after probe for multi archHiroshi Doyu1-1/+1
For a single image to support multiple SoCs(GART/SMMU). Reported-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2012-07-11iommu/tegra: Implement DOMAIN_ATTR_GEOMETRY attributeHiroshi DOYU1-0/+5
Implement the attribute for the Tegra IOMMU drivers. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-05-11iommu/tegra: gart: Fix register offset correctlyHiroshi DOYU1-3/+4
DT passes the exact GART register ranges without any overlapping with MC register ranges. GART register offset needs to be adjusted by one passed by DT correctly. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-04-16iommu: tegra/gart: Add device tree supportThierry Reding1-0/+11
This commit adds device tree support for the GART hardware available on NVIDIA Tegra 20 SoCs. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-04-16iommu: tegra/gart: use correct gart_deviceVandana Salve1-1/+1
Pass the correct gart device pointer. Reviewed-by: Vandana Salve <vsalve@nvidia.com> Tested-by: Vandana Salve <vsalve@nvidia.com> Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-03-13iommu/tegra-gart: fix spin_unlock in map failure pathLucas Stach1-1/+1
This must have been messed up while merging, the intention was clearly to unlock there. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-01-26ARM: IOMMU: Tegra20: Add iommu_ops for GART driverHiroshi DOYU1-0/+451
Tegra 20 IOMMU H/W, GART (Graphics Address Relocation Table). This patch implements struct iommu_ops for GART for the upper IOMMU API. This H/W module supports only single virtual address space(domain), and manages a single level 1-to-1 mapping H/W translation page table. [With small fixes by Joerg Roedel] Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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