| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2017-06-22 | irqchip/aspeed-i2c-ic: Add I2C IRQ controller for Aspeed |   Brendan Higgins | 1 | -0/+115 | |
| The Aspeed 24XX/25XX chips share a single hardware interrupt across 14 separate I2C busses. This adds a dummy irqchip which maps the single hardware interrupt to software interrupts for each of the busses. Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> | |||||
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