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path: root/drivers/irqchip/irq-ingenic.c (follow)
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2021-03-09irqchip/ingenic: Add support for the JZ4760Paul Cercueil1-0/+1
Add support for the interrupt controller found in the JZ4760 SoC, which works exactly like the one in the JZ4770. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210307172014.73481-2-paul@crapouillou.net
2020-08-25irqchip/ingenic: Leave parent IRQ unmasked on suspendPaul Cercueil1-1/+1
All the wakeup sources we possibly want will go through the interrupt controller, so the parent IRQ must not be masked during suspend, or there won't be any way to wake up the system. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200819180602.136969-1-paul@crapouillou.net
2020-03-08irqchip: Replace setup_irq() by request_irq()afzal mohammed1-6/+3
request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200304004839.4729-1-afzal.mohd.ma@gmail.com
2020-01-13irqchip/ingenic: Get rid of the legacy IRQ domainPaul Cercueil1-4/+2
Get rid of the legacy IRQ domain and hardcoded IRQ base, since all the Ingenic drivers and platform code have been updated to use devicetree. This also fixes the kernel being flooded with messages like: irq: interrupt-controller@10001000 didn't like hwirq-0x0 to VIRQ8 mapping (rc=-19) Fixes: 8bc7464b5140 ("irqchip: ingenic: Alloc generic chips from IRQ domain"). Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: H. Nikolaus Schaller <hns@goldelico.com> Tested-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200113163329.34282-2-paul@crapouillou.net
2019-11-10irqchip: Ingenic: Add process for more than one irq at the same time.Zhou Yanjie1-6/+11
Add process for the situation that more than one irq is coming to a single chip at the same time. The original code will only respond to the lowest setted bit in JZ_REG_INTC_PENDING, and then exit the interrupt dispatch function. After exiting the interrupt dispatch function, since the second interrupt has not yet responded, the interrupt dispatch function is again entered to process the second interrupt. This creates additional unnecessary overhead, and the more interrupts that occur at the same time, the more overhead is added. The improved method in this patch is to check whether there are still unresponsive interrupts after processing the lowest setted bit interrupt. If there are any, the processing will be processed according to the bit in JZ_REG_INTC_PENDING, and the interrupt dispatch function will be exited until all processing is completed. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/1570015525-27018-6-git-send-email-zhouyanjie@zoho.com
2019-11-10irqchip: ingenic: Alloc generic chips from IRQ domainPaul Cercueil1-13/+17
By creating the generic chips from the IRQ domain, we don't rely on the JZ4740_IRQ_BASE macro. It also makes the code a bit cleaner. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1570015525-27018-5-git-send-email-zhouyanjie@zoho.com
2019-11-10irqchip: ingenic: Get virq number from IRQ domainPaul Cercueil1-1/+6
Get the virq number from the IRQ domain instead of calculating it from the hardcoded irq base. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1570015525-27018-4-git-send-email-zhouyanjie@zoho.com
2019-11-10irqchip: ingenic: Error out if IRQ domain creation failedPaul Cercueil1-5/+10
If we cannot create the IRQ domain, the driver should fail to probe instead of succeeding with just a warning message. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1570015525-27018-3-git-send-email-zhouyanjie@zoho.com
2019-11-10irqchip: ingenic: Drop redundant irq_suspend / irq_resume functionsPaul Cercueil1-23/+1
The same behaviour can be obtained by using the IRQCHIP_MASK_ON_SUSPEND flag on the IRQ chip. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1570015525-27018-2-git-send-email-zhouyanjie@zoho.com
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 151Thomas Gleixner1-10/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 35 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.655028468@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-07-19irqchip/ingenic: Add support for the JZ4725B SoCPaul Cercueil1-0/+1
The interrupt controller of the JZ4725B works the same way as the other JZ SoCs from Ingenic; so we just add a new compatible string. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-07-11irqchip: Prepare for local stub header removalJoel Porquet1-2/+1
The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so the local irqchip.h became an empty shell, which solely includes include/linux/irqchip.h Include the global header in all irqchip drivers instead of the local header, so we can remove it. Signed-off-by: Joel Porquet <joel@porquet.org> Cc: vgupta@synopsys.com Cc: monstr@monstr.eu Cc: ralf@linux-mips.org Cc: jason@lakedaemon.net Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-06-21MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchipPaul Burton1-0/+177
Move the driver for Ingenic SoC interrupt controllers into drivers/irqchip where it belongs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10147/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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