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2014-11-26irqchip: GICv3: ITS: plug ITS init into main GICv3 codeMarc Zyngier1-6/+35
2014-11-26irqchip: GICv3: ITS: DT probing and initializationMarc Zyngier1-0/+169
2014-11-26irqchip: GICv3: ITS: MSI supportMarc Zyngier1-0/+176
2014-11-26irqchip: GICv3: ITS: device allocation and configurationMarc Zyngier1-0/+74
2014-11-26irqchip: GICv3: ITS: tables allocatorsMarc Zyngier1-0/+292
2014-11-26irqchip: GICv3: ITS: LPI allocatorMarc Zyngier1-0/+103
2014-11-26irqchip: GICv3: ITS: irqchip implementationMarc Zyngier1-0/+77
2014-11-26irqchip: GICv3: ITS command queueMarc Zyngier1-0/+511
2014-11-26irqchip: GICv3: rework redistributor structureMarc Zyngier1-29/+44
2014-11-26irqchip: GICv3: Convert to domain hierarchyMarc Zyngier2-5/+38
2014-11-26Merge branch 'irqchip/atmel' into irqchip/coreJason Cooper3-5/+49
2014-11-26irqchip: brcmstb-l2: Fix error handling of irq_of_parse_and_mapDmitry Torokhov1-2/+2
2014-11-26irqchip: bcm7120-l2: Fix error handling of irq_of_parse_and_mapDmitry Torokhov1-2/+2
2014-11-24irqchip: mips-gic: Add device-tree supportAndrew Bresticker1-5/+87
2014-11-24clocksource: mips-gic: Move gic_frequency to clocksource driverAndrew Bresticker1-1/+0
2014-11-24clocksource: mips-gic: Combine with GIC clockevent driverAndrew Bresticker1-1/+1
2014-11-24MIPS: Move GIC clocksource driver to drivers/clocksource/Andrew Bresticker1-1/+1
2014-11-24irqchip: mips-gic: Use GIC_SH_WEDGE_{SET,CLR} macrosAndrew Bresticker1-2/+2
2014-11-24irqchip: mips-gic: Remove gic_{pending,itrmask}_regsAndrew Bresticker1-13/+3
2014-11-24irqchip: mips-gic: Clean up #includesAndrew Bresticker1-5/+2
2014-11-24irqchip: mips-gic: Clean up header fileAndrew Bresticker1-2/+2
2014-11-24MIPS: Move gic.h to include/linux/irqchip/mips-gic.hAndrew Bresticker1-1/+1
2014-11-24irqchip: mips-gic: Use proper iomem accessorsAndrew Bresticker1-71/+135
2014-11-24irqchip: mips-gic: Export function to read counter widthAndrew Bresticker1-0/+11
2014-11-24irqchip: mips-gic: Remove unnecessary globalsAndrew Bresticker1-24/+4
2014-11-24irqchip: mips-gic: Support local interruptsAndrew Bresticker1-68/+223
2014-11-24irqchip: mips-gic: Use separate edge/level irq_chipsAndrew Bresticker1-11/+21
2014-11-24irqchip: mips-gic: Probe for number of external interruptsAndrew Bresticker1-20/+20
2014-11-24irqchip: mips-gic: Stop using per-platform mapping tablesAndrew Bresticker1-96/+105
2014-11-24irqchip: mips-gic: Use IRQ domainsAndrew Bresticker1-8/+40
2014-11-24irqchip: mips-gic: Fix gic_set_affinity() return valueAndrew Bresticker1-1/+1
2014-11-24irqchip: mips-gic: Implement irq_set_type callbackAndrew Bresticker1-2/+55
2014-11-24irqchip: mips-gic: Remove platform irq_ack/irq_eoi callbacksAndrew Bresticker1-3/+8
2014-11-24MIPS: Move GIC to drivers/irqchip/Andrew Bresticker3-0/+407
2014-11-23PCI/MSI: Rename mask/unmask_msi_irq treewideThomas Gleixner1-4/+4
2014-11-23PCI/MSI: Rename write_msi_msg() to pci_write_msi_msg()Jiang Liu1-1/+1
2014-11-12PCI/MSI: Rename "struct msi_chip" to "struct msi_controller"Yijing Wang1-3/+3
2014-11-11irqchip: atmel-aic: Fix irqdomain initializationBoris Brezillon1-3/+3
2014-11-09irqchip: atmel-aic: Add missing entry for rm9200 irq fixupsBoris BREZILLON1-0/+1
2014-11-09irqchip: atmel-aic: Rename at91sam9_aic_irq_fixup for naming consistencyBoris BREZILLON1-3/+3
2014-11-09irqchip: atmel-aic: Add specific irq fixup function for sam9g45 and sam9rlBoris BREZILLON1-2/+8
2014-11-09irqchip: atmel-aic: Add irq fixups for at91sam926x SoCsBoris BREZILLON1-0/+9
2014-11-09irqchip: atmel-aic: Add irq fixup for RTT blockBoris BREZILLON2-0/+28
2014-11-09irqchip: brcmstb-l2: Convert driver to use irq_reg_{readl,writel}Kevin Cernekee1-12/+22
2014-11-09irqchip: bcm7120-l2: Convert driver to use irq_reg_{readl,writel}Kevin Cernekee1-10/+14
2014-11-09irqchip: bcm7120-l2: Decouple driver from brcmstb-l2Kevin Cernekee3-3/+8
2014-11-09irqchip: bcm7120-l2: Extend driver to support 64+ bit controllersKevin Cernekee1-49/+95
2014-11-09irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functionsKevin Cernekee1-8/+3
2014-11-09irqchip: bcm7120-l2: Fix missing nibble in gc->unused maskKevin Cernekee1-1/+1
2014-11-09irqchip: bcm7120-l2: Make sure all register accesses use base+offsetKevin Cernekee1-3/+3
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