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path: root/drivers/mmc/host/sdhci-iproc.c (follow)
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2019-05-15mmc: sdhci-iproc: Set NO_HISPD bit to fix HS50 data hold time problemTrac Hoang1-1/+2
The iproc host eMMC/SD controller hold time does not meet the specification in the HS50 mode. This problem can be mitigated by disabling the HISPD bit; thus forcing the controller output data to be driven on the falling clock edges rather than the rising clock edges. Stable tag (v4.12+) chosen to assist stable kernel maintainers so that the change does not produce merge conflicts backporting to older kernel versions. In reality, the timing bug existed since the driver was first introduced but there is no need for this driver to be supported in kernel versions that old. Cc: stable@vger.kernel.org # v4.12+ Signed-off-by: Trac Hoang <trac.hoang@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-05-15mmc: sdhci-iproc: cygnus: Set NO_HISPD bit to fix HS50 data hold time problemTrac Hoang1-1/+2
The iproc host eMMC/SD controller hold time does not meet the specification in the HS50 mode. This problem can be mitigated by disabling the HISPD bit; thus forcing the controller output data to be driven on the falling clock edges rather than the rising clock edges. This change applies only to the Cygnus platform. Stable tag (v4.12+) chosen to assist stable kernel maintainers so that the change does not produce merge conflicts backporting to older kernel versions. In reality, the timing bug existed since the driver was first introduced but there is no need for this driver to be supported in kernel versions that old. Cc: stable@vger.kernel.org # v4.12+ Signed-off-by: Trac Hoang <trac.hoang@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-01-14mmc: sdhci-iproc: handle mmc_of_parse() errors during probeStefan Wahren1-1/+4
We need to handle mmc_of_parse() errors during probe. This finally fixes the wifi regression on Raspberry Pi 3 series. In error case the wifi chip was permanently in reset because of the power sequence depending on the deferred probe of the GPIO expander. Fixes: b580c52d58d9 ("mmc: sdhci-iproc: add IPROC SDHCI driver") Cc: stable@vger.kernel.org Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: sdhci-iproc: Add ACPI supportSrinath Mannam1-19/+40
Add ACPI support to all IPROC SDHCI variants. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-05-21mmc: sdhci-iproc: add SDHCI_QUIRK2_HOST_OFF_CARD_ON for cygnusCorneliu Doban1-1/+1
The SDHCI_QUIRK2_HOST_OFF_CARD_ON is needed for the driver to properly reset the host controller (reset all) on initialization after exiting deep sleep. Signed-off-by: Corneliu Doban <corneliu.doban@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Srinath Mannam <srinath.mannam@broadcom.com> Fixes: c833e92bbb60 ("mmc: sdhci-iproc: support standard byte register accesses") Cc: stable@vger.kernel.org # v4.10+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-05-21mmc: sdhci-iproc: fix 32bit writes for TRANSFER_MODE registerCorneliu Doban1-5/+25
When the host controller accepts only 32bit writes, the value of the 16bit TRANSFER_MODE register, that has the same 32bit address as the 16bit COMMAND register, needs to be saved and it will be written in a 32bit write together with the command as this will trigger the host to send the command on the SD interface. When sending the tuning command, TRANSFER_MODE is written and then sdhci_set_transfer_mode reads it back to clear AUTO_CMD12 bit and write it again resulting in wrong value to be written because the initial write value was saved in a shadow and the read-back returned a wrong value, from the register. Fix sdhci_iproc_readw to return the saved value of TRANSFER_MODE when a saved value exist. Same fix for read of BLOCK_SIZE and BLOCK_COUNT registers, that are saved for a different reason, although a scenario that will cause the mentioned problem on this registers is not probable. Fixes: b580c52d58d9 ("mmc: sdhci-iproc: add IPROC SDHCI driver") Signed-off-by: Corneliu Doban <corneliu.doban@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Cc: stable@vger.kernel.org # v4.1+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-05-21mmc: sdhci-iproc: remove hard coded mmc cap 1.8vSrinath Mannam1-1/+0
Remove hard coded mmc cap 1.8v from platform data as it is board specific. The 1.8v DDR mmc caps can be enabled using DTS property for those boards that support it. Fixes: b17b4ab8ce38 ("mmc: sdhci-iproc: define MMC caps in platform data") Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Cc: stable@vger.kernel.org # v4.8+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-05mmc: sdhci-iproc: Disable preset values for BCM2835Stefan Wahren1-0/+1
According to the BCM2835 datasheet there are no preset value registers. This wasn't an issue before, because we didn't propagate 1.8V support. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-05-22mmc: sdhci-iproc: suppress spurious interrupt with Multiblock readSrinath Mannam1-1/+2
The stingray SDHCI hardware supports ACMD12 and automatically issues after multi block transfer completed. If ACMD12 in SDHCI is disabled, spurious tx done interrupts are seen on multi block read command with below error message: Got data interrupt 0x00000002 even though no data operation was in progress. This patch uses SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 to enable ACM12 support in SDHCI hardware and suppress spurious interrupt. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: b580c52d58d9 ("mmc: sdhci-iproc: add IPROC SDHCI driver") Cc: <stable@vger.kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-02-13mmc: sdhci-iproc: Increase max_blk_size for bcm2835Stefan Wahren1-1/+3
According to the BCM2835 datasheet the maximum block size for the eMMC module is restricted to the internal data FIFO which is 1024 byte. But this is still an improvement to the default of 512 byte. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-02-13mmc: sdhci-iproc: Apply caps from bcm2835-mmc driverStefan Wahren1-3/+6
Since the mmc module on bcm2835 neither provide a capabilities register nor free documentation we must rely on the downstream implementation [1]. So enable the following capabilities for bcm2835: MMC_CAP_MMC_HIGHSPEED MMC_CAP_SD_HIGHSPEED MMC_CAP_DRIVER_TYPE_A MMC_CAP_DRIVER_TYPE_C [1] - https://github.com/raspberrypi/linux/blob/rpi-4.4.y/drivers/mmc/host/bcm2835-mmc.c Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-11-29mmc: sdhci-iproc: support standard byte register accessesScott Branden1-2/+33
Add bytewise register accesses support for newer versions of IPROC SDHCI controllers. Previous sdhci-iproc versions of SDIO controllers (such as Raspberry Pi and Cygnus) only allowed for 32-bit register accesses. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-29mmc: sdhci-pltfm: Drop define for SDHCI_PLTFM_PMOPSUlf Hansson1-1/+1
Due to previous changes this define has no longer a purpose. Instead move the sdhci-pltfm drivers over to use the exported struct sdhci_pltfm_pmops. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25mmc: sdhci-iproc: Use defines instead of magic numbersStefan Wahren1-2/+11
The capabilities in iproc platform data are magic numbers. So replace them with the proper capability defines to make it readable. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-iproc: use sdhci_pltfm_unregister directlyJisheng Zhang1-6/+1
The sdhci_iproc_remove() is jsut a wrapper to sdhci_pltfm_unregister. So use the sdhci_pltfm_unregister() for the .remove hook directly. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-iproc: add bcm2835 supportStefan Wahren1-0/+15
Scott Branden from Broadcom said that the BCM2835 eMMC IP core is very similar to IPROC and share most of the quirks. So use this driver instead of separate one. The sdhci-iproc contains a better workaround for the clock domain crossing problem which doesn't need any delays. This results in a better write performance. Btw we get the rid of the SDHCI_CAPABILITIES hack in the sdhci_readl function. Suggested-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Scott Branden <sbranden@broadcom.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-iproc: define MMC caps in platform dataStefan Wahren1-2/+3
This patch moves the definition of the MMC capabilities from the probe function into iproc platform data. After that we are able to add support for another platform more easily. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Suggested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Scott Branden <sbranden@broadcom.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-iproc: Actually enable the clockStefan Wahren1-1/+8
The RPi firmware-based clocks driver can actually disable unused clocks, so when switching to use it we ended up losing our MMC clock once all devices were probed. This patch adopts the changes from 1e5a0a9a58e2 ("mmc: sdhci-bcm2835: Actually enable the clock") to sdhci-iproc. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-iproc: Clean up platform allocations if shdci init failsStefan Wahren1-1/+5
This patch adopts the changes from 475c9e43bfa7 ("mmc: sdhci-bcm2835: Clean up platform allocations if sdhci init fails") to sdhci-iproc. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-03-23mmc: sdhci-iproc: fix oops in sdhci_iproc_writewDmitry Torokhov1-1/+1
The driver co-allocates sdhci_iproc_host with sdhci_pltfm_host and so to access it we need to use sdhci_pltfm_priv() and not pltfm_host->priv. Signed-off-by: Dmitry Torokhov <dtor@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-03-23mmc: sdhci-iproc: add IPROC SDHCI driverScott Branden1-0/+241
Add IPROC SDHCI driver for IPROC family of Broadcom devices. Acked-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Corneliu Doban <cdoban@broadcom.com> Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>