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2015-07-24mmc: sdhci-pxav3: fix platform_data is not initializedJingju Hou1-0/+1
pdev->dev.platform_data is not initialized if match is true in function sdhci_pxav3_probe. Just local variable pdata is assigned the return value from function pxav3_get_mmc_pdata(). static int sdhci_pxav3_probe(struct platform_device *pdev) { struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; ... if (match) { ret = mmc_of_parse(host->mmc); if (ret) goto err_of_parse; sdhci_get_of_property(pdev); pdata = pxav3_get_mmc_pdata(dev); } ... } Signed-off-by: Jingju Hou <houjingj@marvell.com> Fixes: b650352dd3df("mmc: sdhci-pxa: Add device tree support") Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: sdhci-esdhc-imx: clear f_max in boarddataDong Aisheng1-6/+1
After commit 8d86e4fcccf6 ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()"), it's not used anymore. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Reviewed-by: Johan Derycke <johan.derycke@barco.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: sdhci-esdhc-imx: remove duplicated dts parsingDong Aisheng1-14/+0
After commit 8d86e4fcccf6 ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()"), we do not need those duplicated parsing anymore. Note: fsl,cd-controller is also deleted due to the driver does not support controller card detection anymore after switch to runtime pm. And there's no user of it right now in device tree. wp-gpios is kept because we're still support fsl,wp-controller, so we need a way to check if it's gpio wp or controller wp. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Reviewed-by: Johan Derycke <johan.derycke@barco.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: sdhci: make max-frequency property in device tree workDong Aisheng1-2/+7
Device tree provides option to specify the max freqency with property "max-frequency" in dts and common parse function mmc_of_parse() will parse it and use this value to set host->f_max to tell the MMC core the maxinum frequency the host works. However, current sdhci driver will finally overwrite this value with host->max_clk regardless of the max-frequency property. This patch makes sure not overwrite the max-frequency set from device tree and do basic sanity check. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Reviewed-by: Johan Derycke <johan.derycke@barco.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: sdhci-esdhc-imx: move all non dt probe code into one functionDong Aisheng1-85/+94
This is an incremental fix of commit e62bd351b("mmc: sdhci-esdhc-imx: Do not break platform data boards"). After commit 8d86e4fcccf6 ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()"), we do not need to run the check of boarddata->wp_type/cd_type/max_bus_width again for dt platform since those are already handled by mmc_of_parse(). Current code only exclude the checking of wp_type for dt platform which does not make sense. This patch moves all non dt probe code into one function. Besides, since we only support SD3.0/eMMC HS200 for dt platform, the support_vsel checking and ultra high speed pinctrl state are also merged into sdhci_esdhc_imx_probe_dt. Then we have two separately probe function for dt and non dt type. This can make the driver probe more clearly. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Reviewed-by: Johan Derycke <johan.derycke@barco.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: sdhci-esdhc-imx: fix cd regression for dt platformDong Aisheng1-1/+9
Current card detect probe process is that when driver finds a valid ESDHC_CD_GPIO, it will clear the quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION which is set by default for all esdhc/usdhc controllers. Then host driver will know there's a valid card detect function. Commit 8d86e4fcccf6 ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()") breaks GPIO CD function for dt platform that it will return directly when find ESDHC_CD_GPIO for dt platform which result in the later wrongly to keep SDHCI_QUIRK_BROKEN_CARD_DETECTION for all dt platforms. Then MMC_CAP_NEEDS_POLL will be used instead even there's a valid GPIO card detect. This patch adds back this function and follows the original approach to clear the quirk if find an valid CD GPIO for dt platforms. Fixes: 8d86e4fcccf6 ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()") Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Reviewed-by: Johan Derycke <johan.derycke@barco.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: sdhci-esdhc: Make 8BIT bus workJoakim Tjernlund1-1/+1
Support for 8BIT bus with was added some time ago to sdhci-esdhc but then missed to remove the 8BIT from the reserved bit mask which made 8BIT non functional. Fixes: 66b50a00992d ("mmc: esdhc: Add support for 8-bit bus width and..") Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: block: Add missing mmc_blk_put() in power_ro_lock_show()Tomas Winkler1-0/+2
Enclosing mmc_blk_put() is missing in power_ro_lock_show() sysfs handler, let's add it. Fixes: add710eaa886 ("mmc: boot partition ro lock support") Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: MMC_MTK should depend on HAS_DMAGeert Uytterhoeven1-0/+1
If NO_DMA=y: ERROR: "dma_alloc_coherent" [drivers/mmc/host/mtk-sd.ko] undefined! ERROR: "dma_unmap_sg" [drivers/mmc/host/mtk-sd.ko] undefined! ERROR: "dma_map_sg" [drivers/mmc/host/mtk-sd.ko] undefined! ERROR: "dma_free_coherent" [drivers/mmc/host/mtk-sd.ko] undefined! Add a dependency on HAS_DMA to fix this. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: sdhci check parameters before call dma_free_coherentPeng Fan1-2/+5
We should not call dma_free_coherent if host->adma_table is NULL, otherwise may trigger panic. Fixes: d1e49f77d7c7 ("mmc: sdhci: convert ADMA descriptors to a...") Signed-off-by: Peng Fan <van.freenix@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: omap_hsmmc: Handle BADA, DEB and CEB interruptsVignesh R1-1/+2
Sometimes BADA, DEB or CEB error interrupts occur when sd card is unplugged during data transfer. These interrupts are currently ignored by the interrupt handler. But, this results in card not being recognised on subsequent insertion. This is because mmcqd is waiting forever for the data transfer(for which error occurred) to complete. Fix this, by reporting BADA, DEB, CEB errors to mmc-core as -EILSEQ, so that the core can do appropriate handling. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24mmc: omap_hsmmc: Fix DTO and DCRC handlingKishon Vijay Abraham I1-4/+4
DTO/DCRC errors were not being informed to the mmc core since commit ae4bf788ee9b ("mmc: omap_hsmmc: consolidate error report handling of HSMMC IRQ"). This commit made sure 'end_trans' is never set on DTO/DCRC errors. This is because after this commit 'host->data' is checked after it has been cleared to NULL by omap_hsmmc_dma_cleanup(). Because 'end_trans' is never set, omap_hsmmc_xfer_done() is never invoked making core layer not to be aware of DTO/DCRC errors. Because of this any command invoked after DTO/DCRC error leads to a hang. Fix this by checking for 'host->data' before it is actually cleared. Fixes: ae4bf788ee9b ("mmc: omap_hsmmc: consolidate error report handling of HSMMC IRQ") CC: stable@vger.kernel.org Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-17Update Viresh Kumar's email addressViresh Kumar1-2/+2
Switch to my kernel.org alias instead of a badly named gmail address, which I rarely use. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-07-02Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-43/+6
Pull ARM SoC late fixes and dependencies from Kevin Hilman: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. Other than the fixes, the primary feature being added is the conversion of some OMAP drivers to the new generic wakeirq interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: multi_v7_defconfig: Enable BRCMNAND driver ARM: BCM: Do not select CONFIG_MTD_NAND_BRCMNAND ARM: at91/dt: update udc compatible strings ARM: at91/dt: trivial: fix USB udc compatible string arm64: dts: Add APM X-Gene standby GPIO controller DTS entries soc: qcom: spm: Fix idle on THUMB2 kernels ARM: dove: fix legacy dove IRQ numbers ARM: mvebu: fix suspend to RAM on big-endian configurations ARM: mvebu: adjust Armada XP DT spi muxing after pinctrl function rename serial: 8250_omap: Move wake-up interrupt to generic wakeirq serial: omap: Switch wake-up interrupt to generic wakeirq mmc: omap_hsmmc: Change wake-up interrupt to use generic wakeirq
2015-06-25Merge branch 'for-4.2/sg' of git://git.kernel.dk/linux-blockLinus Torvalds1-1/+1
Pull asm/scatterlist.h removal from Jens Axboe: "We don't have any specific arch scatterlist anymore, since parisc finally switched over. Kill the include" * 'for-4.2/sg' of git://git.kernel.dk/linux-block: remove scatterlist.h generation from arch Kbuild files remove <asm/scatterlist.h>
2015-06-18mmc: queue: prevent soft lockups on PREEMPT=nRabin Vincent1-0/+1
On systems with CONFIG_PREEMPT=n, under certain circumstances, mmcqd can continuously process requests for several seconds without blocking, triggering the soft lockup watchdog. For example, this can happen if mmcqd runs on the CPU which services the controller's interrupt, and a process on a different CPU continuously writes to the MMC block device. NMI watchdog: BUG: soft lockup - CPU#0 stuck for 22s! [mmcqd/0:664] CPU: 0 PID: 664 Comm: mmcqd/0 Not tainted 4.1.0-rc7+ #4 PC is at _raw_spin_unlock_irqrestore+0x24/0x28 LR is at mmc_start_request+0x104/0x134 ... [<805112a8>] (_raw_spin_unlock_irqrestore) from [<803db664>] (mmc_start_request+0x104/0x134) [<803db664>] (mmc_start_request) from [<803dc008>] (mmc_start_req+0x274/0x394) [<803dc008>] (mmc_start_req) from [<803eb2c4>] (mmc_blk_issue_rw_rq+0xd0/0xb98) [<803eb2c4>] (mmc_blk_issue_rw_rq) from [<803ebe8c>] (mmc_blk_issue_rq+0x100/0x470) [<803ebe8c>] (mmc_blk_issue_rq) from [<803ecab8>] (mmc_queue_thread+0xd0/0x170) [<803ecab8>] (mmc_queue_thread) from [<8003fd14>] (kthread+0xe0/0xfc) [<8003fd14>] (kthread) from [<8000f768>] (ret_from_fork+0x14/0x2c) Fix it by adding a cond_resched() in the request handling loop so that other processes get a chance to run. Signed-off-by: Rabin Vincent <rabin.vincent@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-18mmc: mediatek: Add PM support for MMC driverChaotian Jing1-3/+86
Add PM support for Mediatek MMC driver Save/restore registers when PM Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-18mmc: mediatek: Add Mediatek MMC driverChaotian Jing3-0/+1388
Add Mediatek MMC driver code Support eMMC/SD/SDIO Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-16mmc: card: Fixup request missing in mmc_blk_issue_rw_rqDing Wang1-3/+5
The current handler of MMC_BLK_CMD_ERR in mmc_blk_issue_rw_rq function may cause new coming request permanent missing when the ongoing request (previoulsy started) complete end. The problem scenario is as follows: (1) Request A is ongoing; (2) Request B arrived, and finally mmc_blk_issue_rw_rq() is called; (3) Request A encounters the MMC_BLK_CMD_ERR error; (4) In the error handling of MMC_BLK_CMD_ERR, suppose mmc_blk_cmd_err() end request A completed and return zero. Continue the error handling, suppose mmc_blk_reset() reset device success; (5) Continue the execution, while loop completed because variable ret is zero now; (6) Finally, mmc_blk_issue_rw_rq() return without processing request B. The process related to the missing request may wait that IO request complete forever, possibly crashing the application or hanging the system. Fix this issue by starting new request when reset success. Signed-off-by: Ding Wang <justin.wang@spreadtrum.com> Fixes: 67716327eec7 ("mmc: block: add eMMC hardware reset support") Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-16mmc: sdhci: fix low memory corruptionJiri Slaby1-1/+1
When dma mapping (dma_map_sg) fails in sdhci_pre_dma_transfer, -EINVAL is returned. There are 3 callers of sdhci_pre_dma_transfer: * sdhci_pre_req and sdhci_adma_table_pre: handle negative return * sdhci_prepare_data: handles 0 (error) and "else" (good) only sdhci_prepare_data is therefore broken. When it receives -EINVAL from sdhci_pre_dma_transfer, it assumes 1 sg mapping was mapped. Later, this non-existent mapping with address 0 is kmap'ped and written to: Corrupted low memory at ffff880000001000 (1000 phys) = 22b7d67df2f6d1cf Corrupted low memory at ffff880000001008 (1008 phys) = 63848a5216b7dd95 Corrupted low memory at ffff880000001010 (1010 phys) = 330eb7ddef39e427 Corrupted low memory at ffff880000001018 (1018 phys) = 8017ac7295039bda Corrupted low memory at ffff880000001020 (1020 phys) = 8ce039eac119074f ... So teach sdhci_prepare_data to understand negative return values from sdhci_pre_dma_transfer and disable DMA in that case, as well as for zero. It was introduced in 348487cb28e66b032bae1b38424d81bf5b444408 (mmc: sdhci: use pipeline mmc requests to improve performance). The commit seems to be suspicious also by assigning host->sg_count both in sdhci_pre_dma_transfer and sdhci_adma_table_pre. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Cc: stable@vger.kernel.org # 4.0+ Fixes: 348487cb28e6 Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Haibo Chen <haibo.chen@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-16mmc: sdhci-pci: Change AMD SDHCI quirk application scopeVincent Wan1-1/+24
Change this quirk to apply to AMD Carrizo platform. Signed-off-by: Wan ZongShun <Vincent.Wan@amd.com> Tested-by: Nath, Arindam <Arindam.Nath@amd.com> Tested-by: Ramesh, Ramya <Ramya.Ramesh@amd.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-15mmc: queue: use swap() in mmc_queue_thread()Fabian Frederick1-4/+1
Use kernel.h macro definition. Thanks to Julia Lawall for Coccinelle scripting support. Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-12mmc: dw_mmc: insmod followed by rmmod will hung for eMMCPrabu Thangamuthu1-3/+3
Remove module of dw_mmc driver will hung for eMMC devices if we follow the steps which are listed below, insmod dw_mmc.ko insmod dw_mmc-pci.ko rmmod dw_mmc-pci.ko The root cause for this issue is, dw_mci_remove() will disable all the interrupts by programming 0x0 to INTMASK register then it will call dw_mci_cleanup_slot(). But dw_mci_cleanup_slot() is issuing CMD6 to disable the eMMC boot partition and it is waiting for Command Complete interrupt. Since INTMASK was already cleared by dw_mci_remove(), Command Complete interrupt is not reaching the system. This leads to process hung. Signed-off-by: Prabu Thangamuthu <prabu.t@synopsys.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-09Merge branch 'wakeirq-8250' into omap-for-v4.2/wakeirq-v2Tony Lindgren1-2/+7
2015-06-08mmc: sdhci: Restore behavior while creating OCR maskUlf Hansson1-4/+5
Commit 3a48edc4bd68 ("mmc: sdhci: Use mmc core regulator infrastucture") changed the behavior for how to assign the ocr_avail mask for the mmc host. More precisely it started to mask the bits instead of assigning them. Restore the behavior, but also make it clear that an OCR mask created from an external regulator overrides the other ones. The OCR mask is determined by one of the following with this priority: 1. Supported ranges of external regulator if one supplies VDD 2. Host OCR mask if set by the driver (based on DT properties) 3. The capabilities reported by the controller itself Fixes: 3a48edc4bd68 ("mmc: sdhci: Use mmc core regulator infrastucture") Cc: Tim Kryger <tim.kryger@gmail.com> Reported-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Tim Kryger <tim.kryger@gmail.com>
2015-06-04mmc: sdhci-pxav3: fix device wakeup initializationJisheng Zhang1-5/+1
MMC_PM_KEEP_POWER doesn't imply MMC_PM_WAKE_SDIO_IRQ, we should only enable device wake up when MMC_PM_WAKE_SDIO_IRQ is set. And "pm_flags" is the requested pm features, we should not set it in the host driver. At the same time, device wakeup is disabled by default, so there's no need to disable device wakeup explicitly. This patch fixes the warning as following: [ 64.616651] ------------[ cut here ]------------ [ 64.616665] WARNING: CPU: 0 PID: 79 at linux/kernel/irq/manage.c:603 irq_set_irq_wake+0xf0/0x11c() [ 64.616667] Unbalanced IRQ 87 wake disable Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-04mmc: core: Attach PM domain prior probing of SDIO func driverUlf Hansson1-4/+8
Other subsystem buses attach PM domains during probe, but prior calling the driver's ->probe() method. During the removal phase, detaching the PM domain will be done after invoking the driver's ->remove() callback. Convert the SDIO bus to follow this behavior and add error handling. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-04mmc: core: Remove redundant ->power_restore() callback for SDUlf Hansson1-13/+1
Since the ->reset() callback is implemented for SD, the ->power_restore() callback has become redundant, let's remove it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-04mmc: core: Remove redundant ->power_restore() callback for MMCUlf Hansson1-13/+1
Since the ->reset() callback is implemented for MMC, the ->power_restore() callback has become redundant, let's remove it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-bcm2835: Actually enable the clockEric Anholt1-1/+8
We're currently using a fixed frequency clock specified in the DT, so enabling is a no-op. However, the RPi firmware-based clocks driver can actually disable unused clocks, so when switching to use it we ended up losing our MMC clock once all devices were probed. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-bcm2835: Clean up platform allocations if sdhci init fails.Eric Anholt1-1/+4
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-of-esdhc: enable interrupt mode to detect cardYangbo Lu1-0/+7
Enable interrupt mode to detect card instead of polling mode for P1020/P4080/P5020/P5040/T1040 by removing the quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION. This could improve data transferring performance and avoid the call trace caused by polling card status sometime. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-esdhc-imx: add quirk SDHCI_QUIRK2_BROKEN_HS200 for imx6qdlDong Aisheng1-2/+8
The iMX6Q/DL can not support HS200 mode while iMX6SL and iMX6SX can, so introduce a new flag to distinguish them. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-esdhc-imx: add imx6sx supportDong Aisheng1-0/+6
The imx6sx usdhc is derived from imx6sl, the difference is minor. imx6sx have the errata ESDHC_FLAG_ERR004536 fixed. So introduce a new compatible string for imx6sx to distinguish them. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-esdhc-imx: add ADMA Length Mismatch errata fixDong Aisheng1-1/+17
The uSDHC has an ADMA Length Mismatch errata ERR004536 which may cause ADMA work abnormally. The errata has already been fixed for i.MX6Q TO1.2 and i.MX6DL TO1.1 by enable the bit 7 in 0x6c register. Unfortunately this fix is not included in i.MX6SL. So we disable ADMA for i.MX6SL and use SDMA instead. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-esdhc-imx: usdhc does not have missing card interrupt issueDong Aisheng1-1/+1
The usdhc does not have missing card interrupt issue, so don't execute workaround for usdhc. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-esdhc-imx: merge the same register check into one placeDong Aisheng1-7/+5
In esdhc_writel_le() function, there's duplicated checking of the same register as follows: "if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE))". Merge them into one and remove the duplicated one. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-pci: Enable HS400 for some Intel host controllersAdrian Hunter1-0/+1
Enable detection of HS400 support via capability bit-63 for some Intel host controllers. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci-pci: Add support for drive strength selection for SPTAdrian Hunter3-0/+90
Implement the select_drive_strength callback to provide drive strength selection for Intel SPT. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sdhci: Add a callback to select drive strengthAdrian Hunter2-0/+17
Add a callbak to let host drivers select drive strength. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: mmc: Add driver strength selectionAdrian Hunter1-7/+38
Add the ability to set eMMC driver strength for HS200 and HS400. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: mmc: Read card's valid driver strength maskAdrian Hunter1-0/+1
In preparation for supporing drive strength selection for eMMC, read the card's valid driver strengths. Note that though the SD spec uses the term "drive strength", the JEDEC eMMC spec uses the term "driver strength". Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: core: Record card drive strengthAdrian Hunter2-0/+6
In preparation for adding drive strength support for eMMC, add drive_strength to struct mmc_card to record the card drive strength for UHS-I modes and HS200 / HS400. For eMMC this will be needed when switching between HS200 and HS400. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: core: Factor out common code in drive strength selectionAdrian Hunter4-46/+46
Make a new function out of common code used for drive strength selection. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: core: Add 'card' to drive strength selection callbackAdrian Hunter2-2/+2
In preparation for supporting also eMMC drive strength, add the 'card' as a parameter so that the callback can distinguish different types of cards if necessary. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: core: Simplify card drive strength maskAdrian Hunter2-20/+4
Card drive strength selection uses a callback to which a mask of supported drive strengths is passed. Currently, the bits are checked against the values in the SD specifications. That is not necessary because the callback will anyway match the mask against a valid value. Simplify by taking the mask as is but still ensuring that the default mandatory value (type B) is always supported. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: core: Allow card drive strength to be different to hostAdrian Hunter2-45/+31
Initialization of UHS-I modes for SD and SDIO cards employs a callback to allow the host driver to choose a drive strength value. Currently that assumes the card drive strength and host driver type must be the same value. Change to let the callback make that decision and return both the card drive strength and host driver type. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: core: Reset driver type to defaultAdrian Hunter1-0/+1
IO state variable drv_type could be set during card initialization. Consequently, it must be reset to the default value when setting the initial state. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-06-01mmc: sh_mmcif: calculate best clock with parent clockKuninori Morimoto1-9/+75
MMCIF IP on R-Car series has parent clock which can be set several rate, and it was not implemented on old SH-Mobile series (= SH-Mobile series parent clock was fixed rate) R-Car series MMCIF can use more high speed access if it setups parent clock. This patch adds parent clock setup method. It will be used if DT has "max-frequency", and then, this driver assumes it is booted on R-Car Gen2 or later SoC. Because SH-Mobile series (which doesn't boot from DT) and R-Car series (which boots from DT) have different divider. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> [Ulf: Silence compiler warning]
2015-06-01mmc: sh_mmcif: use sh_mmcif_xxx prefix for all functionsKuninori Morimoto1-13/+13
Current sh_mmcif driver is using sh_mmcif_xxx and mmcif_xxx for functions. This patch used sh_mmcif_xxx for all functions. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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