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2018-12-10mtd: spi-nor: Add support for is25lp016dFabrizio Castro1-0/+2
The is25lp016d is found on the iwg23s from iWave, therefore add driver support for it so that we can upstream board support. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: parse SFDP 4-byte Address Instruction TableCyrille Pitchen1-1/+192
Add support for SFDP (JESD216B) 4-byte Address Instruction Table. This table is optional but when available, we parse it to get the 4-byte address op codes supported by the memory. Using these op codes is stateless as opposed to entering the 4-byte address mode or setting the Base Address Register (BAR). Flashes that have the 4BAIT table declared can now support SPINOR_OP_PP_1_1_4_4B and SPINOR_OP_PP_1_4_4_4B opcodes. Tested on MX25L25673G. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> [tudor.ambarus@microchip.com: - rework erase and page program logic, - pass DMA-able buffer to spi_nor_read_sfdp(), - introduce SPI_NOR_HAS_4BAIT - various minor updates.] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: Add 4B_OPCODES flag to is25lp256Liu Xiang1-1/+2
The is25lp256 supports 4-byte opcodes and quad output. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Liu Xiang <liu.xiang6@zte.com.cn> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: Add an SPDX tag to spi-nor.{c,h}Boris Brezillon1-5/+2
Add SPDX tags to replace the license boiler-plate and fix the MODULE_LICENSE() definition in spi-nor.c to match the license text (GPL v2). Interestingly, spi-nor.h and spi-nor.c do not use the same license (GPL v2+ for spi-nor.h, GPL v2 for spi-nor.c). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2018-12-10mtd: spi-nor: Make the enable argument passed to set_byte() a boolBoris Brezillon1-3/+3
No need to use an integer when the value is either true or false. Make it a boolean. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2018-12-10mtd: spi-nor: Stop passing flash_info aroundBoris Brezillon1-20/+19
Some functions called from spi_nor_scan() need a flash_info object. Let's assign nor->info early on to avoid passing info as an extra argument to each of these sub-functions. We also stop passing a flash_info object to set_4byte() and use nor->info directly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2018-12-10mtd: spi-nor: Avoid forward declaration of internal functionsBoris Brezillon1-310/+304
Reorganize the code to kill forward declarations of spi_nor_match_id() macronix_quad_enable() and spi_nor_hwcaps_read2cmd(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2018-12-10mtd: spi-nor: Drop inline on all internal helpersBoris Brezillon1-12/+12
gcc should be smart enough to decide when inlining a function makes sense. Drop all inline specifiers. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2018-12-10mtd: spi-nor: Add a post BFPT fixup for MX25L25635EBoris Brezillon1-1/+28
MX25L25635F and MX25L25635E share the same JEDEC-ID, but the F variant supports 4-byte opcodes while the E variant doesn't. We need a way to differentiate those 2 chips and set the SNOR_F_4B_OPCODES flag only for the F variant. Luckily, 4-byte opcode support is not the only difference: Fast Read 4-4-4 is only supported by the F variant, and this feature is advertised in the BFPT table. Use this to decide when to set the SNOR_F_4B_OPCODES flag. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2018-12-10mtd: spi-nor: Add a post BFPT parsing fixup hookBoris Brezillon1-178/+209
Experience has proven that SFDP tables are sometimes wrong, and parsing of these broken tables can lead to erroneous flash config. This leaves us 2 options: 1/ set the SPI_NOR_SKIP_SFDP flag and completely ignore SFDP parsing 2/ fix things at runtime While #1 should always work, it might imply extra work if most of the SFDP is correct. #2 has the benefit of keeping the generic SFDP parsing logic almost untouched while allowing SPI NOR manufacturer drivers to fix the broken bits. Add a spi_nor_fixups struct where we'll put all our fixup hooks, each of them being called at a different point in the scan process. We start a hook called just after the BFPT parsing to allow fixing up info extracted from the BFPT section. More hooks will be added if other sections need to be fixed. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2018-12-10mtd: spi-nor: Add the SNOR_F_4B_OPCODES flagBoris Brezillon1-10/+11
Some flash_info entries have the SPI_NOR_4B_OPCODES flag set to let the core know that the flash supports 4B opcode. While this solution works fine for id-based caps detection, it doesn't work that well when relying on SFDP-based caps detection. Let's add an SNOR_F_4B_OPCODES flag so that the SFDP parsing code can set it when appropriate. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2018-12-10mtd: spi-nor: cast to u64 to avoid uint overflowshuijin.park1-1/+1
The "params->size" is defined as "u64". And "info->sector_size" and "info->n_sectors" are defined as unsigned int and u16. Thus, u64 data might have strange data(loss data) if the result overflows an unsigned int. This patch casts "info->sector_size" to an u64. Signed-off-by: huijin.park <huijin.park@samsung.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: Add support for IS25LP032/064Uwe Kleine-König1-0/+4
The datasheet is publically available at http://www.issi.com/WW/pdf/IS25LP032-064-128.pdf. The parameters fit to what is already available for IS25LP128/256. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: add entry for mt35xu512aba flashYogesh Narayan Gaur1-0/+6
Add entry for mt35xu512aba Micron NOR flash. This flash is having uniform sector erase size of 128KB, have support of FSR(flag status register), flash size is 64MB and supports 4-byte commands. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: add macros related to MICRON flashYogesh Narayan Gaur1-3/+6
Some MICRON related macros in spi-nor domain were ST. Rename entries related to STMicroelectronics under macro SNOR_MFR_ST. Added entry of MFR Id for Micron flashes, 0x002C. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: mark desirable switch case fall throughTudor.Ambarus@microchip.com1-0/+1
gcc 7 with -Wimplicit-fallthrough raises: drivers/mtd/spi-nor/spi-nor.c: In function ‘set_4byte’: drivers/mtd/spi-nor/spi-nor.c:289:13: warning: this statement may fall through [-Wimplicit-fallthrough=] need_wren = true; ~~~~~~~~~~^~~~~~ drivers/mtd/spi-nor/spi-nor.c:290:2: note: here case SNOR_MFR_MACRONIX: ^~~~ Quiet the warning by marking the expected switch fall through. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: Add support for mx25u12835fAlexander Sverdlin1-0/+2
This chip supports dual and quad read and uniform 4K-byte erase. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: Add Winbond w25q128jv supportRobert Marko1-0/+5
Datasheet: http://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf Testing done on Mikrotik Routerboard wAP R board. It does not support Dual or Quad modes. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-10mtd: spi-nor: remove unneeded smpt zeroizationTudor.Ambarus@microchip.com1-1/+1
The entire smpt array is initialized with data read from sfdp, there is no need to init it with zeroes before. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-07mtd: rawnand: jz4780: annotate implicit fall throughsMathieu Malaterre1-0/+2
There is a plan to build the kernel with -Wimplicit-fallthrough and these places in the code produced warnings. Fix them up. Signed-off-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: spinand: add support for GigaDevice GD5FxGQ4xAChuanhong Guo3-1/+150
Add support for GigaDevice GD5F1G/2G/4GQ4xA SPI NAND. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Deprecate the dummy_controller fieldBoris Brezillon13-14/+14
We try to force NAND controller drivers to properly separate the NAND controller object from the NAND chip one, so let's deprecate the dummy controller object embedded in nand_chip to encourage them to create their own instance. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: vf610: Add an SPDX tag to replace the license textBoris Brezillon1-5/+1
Replace the license text by an SPDX tag. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: vf610: Stop using the dummy controller objBoris Brezillon1-1/+5
The dummy controller is kept around to support old drivers. Let's patch this one and declare our own nand_controller instance. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: vf610: Stop passing mtd_info to internal functionsBoris Brezillon1-29/+19
Mimic what has been done in the core and avoid passing mtd_info object internally. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Fix all coding style issues reported by checkpatchBoris Brezillon1-100/+99
checkpatch reports a bunch of coding style issues. Let's fix them all in one step. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Add an SPDX tag to replace the license textBoris Brezillon1-5/+2
Add an SPDX GPL-2.0 tag and update MODULE_LICENSE() to match the license text. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Stop using the dummy controller objBoris Brezillon1-1/+6
The dummy controller is kept around to support old drivers. Let's patch this one and declare our own nand_controller instance. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Make conversion from chip to fsmc consistentBoris Brezillon1-2/+1
nand_to_fsmc() is used almost everywhere except in fsmc_setup_data_interface() where nand_get_controller_data() is used instead. Make that consistent and drop the nand_set_controller_data() call in the probe path. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Fix the fsmc_nand_data kernel-docBoris Brezillon1-3/+4
The kernel-doc describing struct fsmc_nand_data is not in sync with the struct itself. Add missing entries and drop invalid ones. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Stop passing mtd_info objects to internal functionsBoris Brezillon1-28/+23
Mimic what has been done in the core and stop passing mtd_info objects to internal functions. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: denali: remove denali_reset_banks()Masahiro Yamada1-29/+0
In nand_scan_ident(), the controller driver resets every NAND chip. This is done by sending NAND_CMD_RESET. The Denali IP provides another way to do the equivalent thing; if a bit is set in the DEVICE_RESET register, the controller sends the RESET command to the corresponding device. denali_reset_banks() uses it to reset all devices beforehand. This redundant reset sequence was needed to know the actual number of chips before calling nand_scan_ident(); if DEVICE_RESET fails, there is no chip in that chip select. Then, denali_reset_banks() sets denali->max_banks to the number of detected chips. As commit f486287d2372 ("mtd: nand: denali: fix bank reset function to detect the number of chips") explained, nand_scan_ident() issued Set Features (0xEF) command to all CS lines, some of which may not be connected with a chip. Then, the driver would wait for R/B# response, which never happens. This problem was solved by commit 107b7d6a7ad4 ("mtd: rawnand: avoid setting again the timings to mode 0 after a reset"). In the current code, nand_setup_data_interface() is called from nand_scan_tail(), which is invoked after the chip detection. Now, we can really remove the redundant denali_nand_banks() by simply passing the maximum number of chip selects supported by this IP (typically 4 or 8) to nand_scan(). Let's leave all the chip detection process to nand_scan_ident(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: denali: remove ->dev_ready() hookMasahiro Yamada1-22/+1
The Denali NAND IP has no way to read out the current signal level of the R/B# pin. Instead, denali_dev_ready() checks if the R/B# transition has already happened. (The INTR__INT_ACT interrupt is asserted at the rising edge of the R/B# pin.) It is not a correct way to implement the ->dev_ready() hook. In fact, it has a drawback; in the nand_scan_ident phase, the chip detection iterates over maxchips until it fails to find a homogeneous chip. For the last loop, nand_reset() fails if no chip is there. If ->dev_ready hook exists, nand_command(_lp) calls nand_wait_ready() after NAND_CMD_RESET. However, we know denali_dev_ready() never returns 1 unless there exists a chip that toggles R/B# in that chip select. Then, nand_wait_ready() just ends up with wasting 400 msec, in the end, shows the "timeout while waiting for chip to become ready" warning. Let's remove the mis-implemented dev_ready hook, and fallback to sending the NAND_CMD_STATUS and nand_wait_status_ready(), which bails out more quickly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: marvell: fix spelling mistake in kernel docMiquel Raynal1-1/+1
Correct the spelling mistake 'Regiters' -> 'Registers'. Fixes: 961ba15c48dd ("mtd: rawnand: marvell: Fix clock resource by adding a register clock") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-12-07mtd: rawnand: ams-delta: Use GPIO API for data I/OJanusz Krzysztofik1-48/+61
Don't readw()/writew() data directly from/to GPIO port which is under control of gpio-omap driver, use GPIO consumer API instead. The driver should now work with any 8-bit bidirectional GPIO port, not only OMAP. Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: ams-delta: Request data port GPIO resourceJanusz Krzysztofik1-2/+9
Data port used by the driver is actually an OMAP MPUIO device, already under control of gpio-omap driver. For that reason we used to not request the memory region of the port as that would fail because the region is already busy. Despite that, we are still accessing the port by just ioremapping it and performing read/write operations. Moreover, we are doing that without any proteciton from other users legally manipulating the port pins over GPIO API. The plan is to convert the driver to access the port over GPIO consumer API. Before that happens, already prevent from other users accessing the port pins by requesting an array of its GPIO descriptors. Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Move ->setup_data_interface() to nand_controller_opsBoris Brezillon14-22/+51
->setup_data_interface() is a controller specific method and should thus be placed in nand_controller_ops. In order to make that work with controllers that support keeping pre-configured timings we need to add a new NAND_KEEP_TIMINGS flag to inform the core it should skip the timings selection step. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Move the ->exec_op() method to nand_controller_opsBoris Brezillon9-38/+51
->exec_op() is a controller method and has nothing to do in the nand_chip struct. Let's move it to the nand_controller_ops struct and adjust the core and drivers accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Deprecate the ->select_chip() hookBoris Brezillon27-36/+37
Now that the CS line to be selected is passed to ->exec_op() and stored in chip->cur_cs and after patching all drivers implementing ->exec_op() to stop implementing this method, we can deprecate it by moving it to the nand_legacy structure. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: ams-delta: Stop implementing ->select_chip()Boris Brezillon1-8/+6
Now that the CS to be selected is passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: vf610: Stop implementing ->select_chip()Boris Brezillon1-16/+18
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: tegra: Stop implementing ->select_chip()Boris Brezillon1-16/+12
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: marvell: Stop implementing ->select_chip()Boris Brezillon1-9/+18
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Stop implementing ->select_chip()Boris Brezillon1-11/+12
Now that the CS line to assert is directly passed through the nand_operation struct we can replace the fsmc_select_chip() implementation by an internal fsmc_ce_ctrl() function which is directly called from fsmc_exec_op() Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Make ->select_chip() optional when ->exec_op() is implementedBoris Brezillon1-7/+6
Now that the CS to be selected on a nand_operation is passed in nand_operation->cs we can make the ->select_chip() hook optional for drivers implementing ->exec_op(). When not implemented, the core is assuming the CS line is automatically asserted/deasserted by the driver ->exec_op() implementation. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Pass the CS line to be selected in struct nand_operationBoris Brezillon3-19/+27
In order to deprecate the ->select_chip hook we need to pass the CS line a NAND operations are targeting. This is done through the addition of a cs field to the nand_operation struct. We also need to keep track of the currently selected target to properly initialize op->cs, hence the ->cur_cs field addition to the nand_chip struct. Note that op->cs is not assigned in nand_exec_op() because we might rework the way we execute NAND operations in the future (adopt a queuing mechanism instead of the serialization we have right now). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Add nand_[de]select_target() helpersBoris Brezillon4-51/+100
Add a wrapper to prevent drivers and core code from directly calling the ->select_chip hook which we are about to deprecate. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: ams-delta: Explicitly inherit from nand_controllerBoris Brezillon1-0/+5
All NAND objects are supposed to inherit from nand_controller. The framework is providing a dummy controller object, but we're moving away from this approach in favor of explicit inheritance. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: ams-delta: Check mtd_device_register() return codeBoris Brezillon1-1/+7
mtd_device_register() can fail, and when it does we should propagate the error and cleanup what has been done before. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: ams-delta: cleanup ams_delta_init() error pathBoris Brezillon1-14/+12
Remove unused labels, rename out_mtd into err_unmap to make it clearer and return 0 instead of using a goto out at the end of the registration procedure. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>