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path: root/drivers/net/dsa/mv88e6xxx/serdes.h (follow)
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2019-03-04net: dsa: mv88e6xxx: support in-band signalling on SGMII ports with external PHYsHeiner Kallweit1-0/+8
If an external PHY is connected via SGMII and uses in-band signalling then the auto-negotiated values aren't propagated to the port, resulting in a broken link. See discussion in [0]. This patch adds this propagation. We need to call mv88e6xxx_port_setup_mac(), therefore export it from chip.c. Successfully tested on a ZII DTU with 88E6390 switch and an Aquantia AQCS109 PHY connected via SGMII to port 9. [0] https://marc.info/?t=155130287200001&r=1&w=2 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-11net: dsa: mv88e6xxx: Add support for SERDES on ports 2-8 for 6390XAndrew Lunn1-0/+2
The 6390X family has 8 SERDES interfaces. When ports 9 and 10 are not using all their SERDES interfaces, the unused ones can be assigned to ports 2-8. Add support for interrupts from SERDES interfaces connected to these lower ports. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-09-02net: dsa: mv88e6xxx: Add SERDES phydev_link_change for 6352Andrew Lunn1-0/+16
The 6352 family has one SERDES interface, which can be used by either port 4 or port 5. Add interrupt support for the SERDES interface, and report when the link status changes. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-08-09net: dsa: mv88e6xxx: Re-setup interrupts on CMODE change.Andrew Lunn1-0/+6
When a port changes CMODE, the SERDES interface being used can change. Disable interrupts for the old SERDES interface, and enable interrupts on the new. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-08-09net: dsa: mv88e6xxx: Add SERDES phydev_mac_change up for 6390Andrew Lunn1-0/+16
phylink wants to know when the MAC layers notices a change in the link. For the 6390 family, this is a change in the SERDES state. Add interrupt support for the SERDES interface used to implement SGMII/1000Base-X/2500Base-X. This is currently limited to ports 9 and 10. Support for the 10G SERDES and other ports will be added later, building on this basic framework. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-08-09net: dsa: mv88e6xxx: Add serdes register read/write helperAndrew Lunn1-1/+0
Add a helper for accessing SERDES registers of the 6390 family. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-08-09net: dsa: mv88e6xxx: 6390 vs 6390X SERDES supportAndrew Lunn1-0/+1
The 6390 has two SERDES interfaces, used by ports 9 and 10. The 6390X has eight SERDES interfaces. These allow ports 9 and 10 to do 10G. Or if lower speeds are used, some of the SERDES interfaces can be used by ports 2-8 for 1000Base-X. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-10net: dsa: mv88e6xxx: 88E6141/6341 SERDES supportMarek BehĂșn1-0/+3
The 88E6141/6341 switches (also known as Topaz) have 1 SGMII lane, which can be configured the same way as the SERDES lane on 88E6390. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-29net: dsa: mv88e6xxx: Keep ATU/VTU violation statisticsAndrew Lunn1-4/+4
Count the numbers of various ATU and VTU violation statistics and return them as part of the ethtool -S statistics. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-04net: dsa: mv88e6xxx: Get mv88e6352 SERDES statisticsAndrew Lunn1-1/+5
Add support for reading the SERDES statistics of the mv88e8352, using the standard ethtool -S option. The SERDES interface can be mapped to either port 4 or 5, so only return statistics on those ports, if the SERDES interface is in use. The counters are reset on read, so need to be accumulated. Add a per port structure to hold the stats counters. The 6352 only has a single SERDES interface and so only one port will using the newly added array. However the 6390 family has as many SERDES interfaces as ports, each with statistics counters. Also, PTP has a number of counters per port which will also need accumulating. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-06-04net: dsa: mv88e6xxx: rename chip headerVivien Didelot1-1/+1
The mv88e6xxx.h is meant to contains the chip structures and data. Rename it to chip.h, as for other source/header pairs of the driver. At the same time, ensure that relative header inclusions are separated by a newline and sorted alphabetically. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-05-26net: dsa: mv88e6xxx: mv88e6390X SERDES supportAndrew Lunn1-0/+24
The mv88e6390X family has 8 SERDES lanes. These can be used for 2 10Gbps ports, ports 9 or 10. If these ports are used at slower speeds, the SERDES lanes become available for other ports for 1000Base-X. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-05-26net: dsa: mv88e6xxx: Refactor mv88e6352 SERDES code into an opAndrew Lunn1-0/+24
The mv88e6390 family has a different SERDES implementation. Refactor the mv88e6352 code into an ops function, so we can later add the mv88e6390 code. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>