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2009-10-04e1000e: swap max hw supported frame size between 82574 and 82583Alexander Duyck1-2/+2
There appears to have been a mixup in the max supported jumbo frame size between 82574 and 82583 which ended up disabling jumbo frames on the 82574 as a result. This patch swaps the two so that this issue is resolved. This patch fixes http://bugzilla.kernel.org/show_bug.cgi?id=14261 Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-09e1000e: Fixes possible phy corrupton on 82571 designs.Dave Graham1-7/+79
Phy corruption has been observed on 2-port 82571 adapters, and is root-caused to lack of synchronization between the 2 driver instances, which conflict when attempting to access the phy via the single MDIC register. A semaphore exists for this purpose, and is now used on these designs. Because PXE &/or EFI boot code (which we cannot expect to be built with this fix) may leave the inter-instance semaphore in an invalid initial state when the driver first loads, this fix also includes a one-time (per driver load) fix-up of the semaphore initial state. Signed-off-by: dave graham <david.graham@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03e1000e: add support for 82577/82578 GbE LOM partsBruce Allan1-0/+2
This patch provides support for the next generation Intel desktop and mobile gigabit ethernet LOM adapters. These adapters are the follow-on parts to the LOMs tied to the prior ICH chipsets and are comprised of a MAC in the PCH chipset and an external PHY (82577 for mobile and 82578 for desktop versions). New features consist of PHY wakeup to save power by completely turning off the MAC while in Sx state, and 4K jumbo frames. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03e1000e: specify max supported frame size in adapter structBruce Allan1-2/+9
By putting the maximum frame size supported by the hardware into the adapter structure, the change_mtu entry point function can be cleaned up of checks for all the different max frame sizes supported by Signed-off-by: David S. Miller <davem@davemloft.net>
2009-03-20e1000e: add support for 82583 device idAlexander Duyck1-21/+108
Add device ID and related support for 82583 mac. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Radheka Godse <radheka.godse@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-17drivers/net/e1000e: fix sparse warning: Should it be static?Hannes Eder1-1/+1
Impact: Make symbol static. Fix this sparse warning: drivers/net/e1000e/82571.c:1229:5: warning: symbol 'e1000_check_for_serdes_link_82571' was not declared. Should it be static? Signed-off-by: Hannes Eder <hannes@hanneseder.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-10e1000e: Serdes - attempt autoneg when link restored.dave graham1-1/+131
This patch addresses an issue where we did not restart auto-negotiation on serdes links when the link partner was disabled and re-enabled. It includes reworking the serdes link detect mechanism to be a state machine for 82571 and 82572 parts only. Signed-off-by: dave graham <david.graham@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-10e1000e: Disable dynamic clock gating for 82571 per si errata.dave graham1-0/+12
82571 and 82572 Errata #13 documents that the Si feature DMA Dynamic Clock Gating should be disabled, and identifies the workaround of disabling the feature by EEPROM setting. EEPROM versions that do not include the recommended workaround have been found in the field, and so some customers remain at risk. Because the feature DMA Dynamic clock Gating can be disabled by directly setting the appropriate bit in the E1000_CTRL_EXT register, this patch overrides the EEPROM setting, and force-disables the feature. Signed-off-by: dave graham <david.graham@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-01-26e1000e: workaround hw errataJesse Brandeburg1-1/+5
There is a hardware errata in some revisions of the 82574 that needs to be worked around in the driver by setting a register bit at init. If this bit is not set A0 versions of the 82574 can generate tx hangs. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: check return code from NVM accesses and fix bank detectionBruce Allan1-2/+3
Check return code for all NVM accesses[1] and error out accordingly; log a debug message for failed accesses. For ICH8/9, the valid NVM bank detect function was not checking whether the SEC1VAL (sector 1 valid) bit in the EECD register was itself valid (bits 8 and 9 also have to be set). If invalid, it would have defaulted to the possibly invalid bank 0. Instead, try to use the valid bank detection method used by ICH10 which has been cleaned up a bit. [1] - reads and updates only; not writes because those are only writing to the Shadow RAM, the update following the write is the only thing actually writing the modified Shadow RAM contents to the NVM. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: sync change flow control variables with ixgbeBruce Allan1-2/+2
Sync flow control variables and usage model with that found in the ixgbe driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: ESB2 config after link upBruce Allan1-0/+3
On ESB2, the MAC-to-PHY (Kumeran) interface must be configured after link is up before any traffic is sent; a new PHY operations function pointer is provided for this. To facilitate read/write of the Kumeran registers without blocking PHY register writes, the driver/firmware synchronization method which previously used a hardware semaphore for both PHY and Kumeran register accesses is now split. New Kumeran register read/write functions utilize this new synchronization method. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: update comments listing supported parts for each MAC familyBruce Allan1-0/+1
Some branding strings (displayed via lspci) are missing from the comments in various family-specific files in the driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-16e1000e: enable ECC correction on 82571 siliconAlexander Duyck1-0/+6
This change enables ECC correction for the packet buffer on all 82571 silicon. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-09-03e1000e: add support for new 82574L partBruce Allan1-13/+140
This new part has the same feature set as previous parts with the addition of MSI-X support. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-04-25e1000e: cleanup several stats issuesBruce Allan1-6/+0
Several stats registers are completely unused and we just waste pci bus time reading them. We also omit using the high 32 bits of the GORC/ GOTC counters. We can just read clear them and only read the low registers. Mii-tool can also break es2lan if it executes a MII PHY register ioctl while the device is in autonegotiation. Unfortunately it seems that several applications and installations still perform this ioctl call periodically and especially in this crucial startup time. We can fool the ioctl by providing fail safe information that mimics the "down" link state and only perform the dangerous PHY reads once after link comes up to fill in the real values. As long as link stays up the information will not change. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-04-16e1000e: rename a few functionsJeff Kirsher1-4/+4
Several minor cosmetic function renames. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-04-16e1000e: Make arrays out of these Rx/Tx registersJeff Kirsher1-12/+12
With multiple queues coming into the code these base control registers need to be made into arrays. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-04-16e1000e: limit EEPROM size accessesJeff Kirsher1-0/+4
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-03-28e1000e: reorganize PHY and flow control interfaceJeff Kirsher1-6/+6
This reorganization moves the PHY status into a separate struct. Flow Control setup is moved into this struct as well and frame size away from here into the adapter struct where its inly use is. The post-link-up code is now a separate function and moved out of the watchdog function itself. This allows us to track the es2lan restart issue a bit easier. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-28e1000e: rename mc_addr_list_updateJeff Kirsher1-5/+5
Rename this function to be consistent with function naming (verb first) Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-28e1000e: reformat comment blocks, cosmetic changes onlyBruce Allan1-38/+67
Adjusting the comment blocks here to be code-style compliant. no code changes. Changed some copyright dates to 2008. Indentation fixes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-02-24e1000e: fix spelling errors in commentsAuke Kok1-5/+5
Fix some spelling errors and inconsistencies in comment blocks. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-02-24e1000e: 82573 can use eerd method to read eepromAuke Kok1-11/+1
This simplifies the 82571/2/3 family initialization a bit and removes an initialization table no longer needed. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-28e1000/e1000e: Move PCI-Express device IDs over to e1000eAuke Kok1-0/+6
e1000e will from now on support the PCI-Express adapters that previously were supported by e1000. This support means better performance and easier debugging from now on for both the old PCI-X/PCI hardware and PCI-Express adapters. This patch also moves 3 recently merged device IDs over to e1000e that are identical to quad-port versions of already existing dual port versions. With this last bit every former e1000 pci-e device should work now with e1000e. Here is a brief list of which gigabit driver to use with which adapter: e1000: 82540 -> 82547 e1000e: 82571 -> 82573 ich8, ich9 (82562 or 82566) es2lan (80003eslan) igb: (not yet merged, only available from e1000.sf.net) 82575 Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-28e1000e: Disable L1 ASPM power savings for 82573 mobile variantsAuke Kok1-1/+0
L1 ASPM link (pci-e link power savings) has significant benefits (~1W savings when link is active) but unfortunately does not work correctly on any of the chipsets that have 82573 on mobile platforms which causes various nuisances: - eeprom reads return garbage information leading to bad eeprom checksums - long ping times (up to 2 seconds) - complete system hangs (freeze/lockup) A lot of T60 owners have been plagued by this, but other mobile solutions also suffer from these symptoms. Disabling L1 ASPM before we activate the PCI-E link fixes all of these issues at the cost of some power consumption. Remove a workaround RDTR adjustment that is no longer needed with this new one. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-28e1000e: alternate MAC address supportBill Hayes1-0/+4
Port alternate MAC address support from the sourceforge e1000 driver to the upstream e1000e driver. Signed-off-by: Bill Hayes <bill.hayes@hp.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-30e1000e: Fix typo ! &Roel Kluin1-1/+1
Signed-off-by: Roel Kluin <12o3l@tiscali.nl> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-10[E1000E]: New pci-express e1000 driver (currently for ICH9 devices only)Auke Kok1-0/+1351
This driver implements support for the ICH9 on-board LAN ethernet device. The device is similar to ICH8. The driver encompasses code to support 82571/2/3, es2lan and ICH8 devices as well, but those device IDs are disabled and will be "lifted" from the e1000 driver over one at a time once this driver receives some more live time. Changes to the last snapshot posted are exclusively in the internal hardware API organization. Many thanks to Jeff Garzik for jumping in and getting this organized with a keen eye on the future layout. [ Integrated napi_struct patch from Auke as well... -DaveM ] Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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