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path: root/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c (follow)
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2012-05-09ixgbe: correct disable_rx_buff timeoutJacob Keller1-1/+1
The current value of the udelay timeout for ixgbe_disable_rx_buff is too short. This causes the security path to not not be properly disabled during the section that is meant to have it turned off. The end result causes a race condition that results in RX issues. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-05-04ixgbe: Update link flow control to correctly handle multiple packet buffer DCBAlexander Duyck1-104/+60
This change updates the link flow control configuration so that we correctly set the link flow control settings for DCB. Previously we would have to call the fc_enable call 8 times, once for each packet buffer. If we move that logic into the fc_enable call itself we can avoid multiple unnecessary register writes. This change also corrects an issue in which we were only shifting the water marks for 82599 parts by 6 instead of 10. This was resulting in us only using 1/16 of the packet buffer when flow control was enabled. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-05-04ixgbe: Reorder link flow control functions in ixgbe_common.cAlexander Duyck1-290/+282
We can avoid many of the forward declarations found in ixgbe_common.c by just reordering things so this patch does that to help cleanup the code. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-05-04ixgbe: Make ixgbe_fc_autoneg return void and always set current_modeAlexander Duyck1-26/+11
This change makes it so that ixgbe_fc_autoneg is a void and always sets the current_mode. Previously if the link was down we would return an error, however there is no harm in simply treating a link down case as a case in which autoneg simply failed. This allows us to rely on the return value of the ixgbe_fc_enable call now since there should be no cases where it returns an error that would normally be ignored. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-05-02ixgbe: add hwmon interface to export thermal dataDon Skidmore1-6/+4
Some of our adapters have thermal data available, this patch exports this data via hwmon sysfs interface. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-05-02ixgbe: add support functions to access thermal dataDon Skidmore1-0/+171
Some 82599 adapters contain thermal data that we can get to via an i2c interface. These functions provide support to get at that data. A following patch will export this data. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-04-04ixgbe: consolidate reporting of MSIX vectors into a single functionEmil Tantilov1-5/+24
This patch modifies ixgbe_get_pcie_msix_count_generic() to support all current HW and removes the 82598 specific function. - change the type of ixgbe_get_pcie_msix_count_generic() to u16 - include a check to make sure the maximum allowed number of vectors is not exceeded. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-19ixgbe: Fix issues with SR-IOV loopback when flow control is disabledAlexander Duyck1-1/+8
This patch allows us to avoid a Tx hang when SR-IOV is enabled. This hang can be triggered by sending small packets at a rate that was triggering Rx missed errors from the adapter while the internal Tx switch and at least one VF are enabled. This was all due to the fact that under heavy stress the Rx FIFO never drained below the flow control high water mark. This resulted in the Tx FIFO being head of line blocked due to the fact that it relies on the flow control high water mark to determine when it is acceptable for the Tx to place a packet in the Rx FIFO. The resolution for this is to set the FCRTH value to the RXPBSIZE - 32 so that even if the ring is almost completely full we can still place Tx packets on the Rx ring and drop incoming Rx traffic if we do not have sufficient space available in the Rx FIFO. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-14ixgbe: Fix race condition where RX buffer could become corrupted.Atita Shirwaikar1-0/+52
There was a race condition in the reset path where the RX buffer could become corrupted during Fdir configuration.This is due to a HW bug.The fix right now is to lock the buffer while we do the fdir configuration.Since we were using similar workaround for another bug, I moved the existing code to a function and reused it.HW team also recommended that IXGBE_MAX_SECRX_POLL value be changed from 30 to 40.The erratum for this bug will be published in the next release 82599 Spec Update Signed-off-by: Atita Shirwaikar <atita.shirwaikar@intel.com> Acked-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-14ixgbe: Do not disable read relaxed ordering when DCA is enabledAlexander Duyck1-3/+3
A previous fix had gone though and disabled relaxed ordering for Rx descriptor read fetching. This was not necessary as this functions correctly and has no ill effects on the system. In addition several of the defines used for the DCA control registers were incorrect in that they indicated descriptor effects when they actually had an impact on either data or header write back. As such I have update these to correctly reflect either DATA or HEAD. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-02-29ixgbe: fix spelling errorsDon Skidmore1-1/+1
Correct spelling error caught with codespell.py. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-02-03ixgbe: update copyright to 2012Don Skidmore1-1/+1
New year so bump the copyright date. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-01-02ixgbe: fix incorrect PHY register readsEmil Tantilov1-4/+4
Fix some register reads that had the opcode and register parameters swapped. Also use define instead of a magic (0x3) number. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2011-12-19net: fix assignment of 0/1 to bool variables.Rusty Russell1-1/+1
DaveM said: Please, this kind of stuff rots forever and not using bool properly drives me crazy. Joe Perches <joe@perches.com> gave me the spatch script: @@ bool b; @@ -b = 0 +b = false @@ bool b; @@ -b = 1 +b = true I merely installed coccinelle, read the documentation and took credit. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-11-02ixgbe: fix reading of the buffer returned by the firmwareEmil Tantilov1-9/+11
This patch fixes some issues found in the buffer read portion of ixgbe_host_interface_command() - use `bi` as the buffer index counter instead of `i` - add conversion to native cpu byte ordering on register read - fix conversion from bytes to dword - use dword_len instead of buf_len when reading the register Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2011-10-17ixgbe: fix endianess when writing driver version to firmwareEmil Tantilov1-8/+8
This patch makes sure that register writes are in little endian and also converts the reads back to big-endian. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2011-10-05ixgbe: do not disable flow control in ixgbe_check_mac_linkEmil Tantilov1-6/+0
Disabling flow control in ixgbe_check_mac_link() results in incorrect reporting by ethtool when link goes down, so remove it. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2011-09-28ixgbe: update {P}FC thresholds to account for X540 and loopbackJohn Fastabend1-7/+5
Revise high and low threshold marks wrt flow control to account for the X540 devices and latency introduced by the loopback switch. Without this it was in theory possible to drop frames on a supposedly lossless link with X540 or SR-IOV enabled. Previously we used a magic number in a define to calculate the threshold values. This made it difficult to sort out exactly which latencies were or were not being accounted for. Here I was overly explicit and tried to used #define names that would be recognizable after reading the IEEE 802.1Qbb specification. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2011-09-23ixgbe: avoid HW lockup when adapter is reset with Tx work pendingEmil Tantilov1-61/+84
This change is meant to avoid a hardware lockup when Tx work is still pending and we request a reset. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2011-08-29ixgbe: clear RNBC only for 82598Emil Tantilov1-2/+3
RNBC (0x03FC0) is only for 82598 and has different meaning on newer HW. Make sure to only clear it for 82598. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2011-08-29ixgbe: fix ixgbe_fc_autoneg_fiber bugDon Skidmore1-2/+2
A logic error in ixgbe_fc_autoneg_fiber() that treated a masked u32 as a boolean would make it so we would never fall hit a error check case. So now I force the u32 to a boolean value with '!!'. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2011-08-10intel: Move the Intel wired LAN driversJeff Kirsher1-0/+3510
Moves the Intel wired LAN drivers into drivers/net/ethernet/intel/ and the necessary Kconfig and Makefile changes. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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