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2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds1-1/+3
Pull networking fixes from David Miller: 1) Fix regression in multi-SKB responses to RTM_GETADDR, from Arthur Gautier. 2) Fix ipv6 frag parsing in openvswitch, from Yi-Hung Wei. 3) Unbounded recursion in ipv4 and ipv6 GUE tunnels, from Stefano Brivio. 4) Use after free in hns driver, from Yonglong Liu. 5) icmp6_send() needs to handle the case of NULL skb, from Eric Dumazet. 6) Missing rcu read lock in __inet6_bind() when operating on mapped addresses, from David Ahern. 7) Memory leak in tipc-nl_compat_publ_dump(), from Gustavo A. R. Silva. 8) Fix PHY vs r8169 module loading ordering issues, from Heiner Kallweit. 9) Fix bridge vlan memory leak, from Ido Schimmel. 10) Dev refcount leak in AF_PACKET, from Jason Gunthorpe. 11) Infoleak in ipv6_local_error(), flow label isn't completely initialized. From Eric Dumazet. 12) Handle mv88e6390 errata, from Andrew Lunn. 13) Making vhost/vsock CID hashing consistent, from Zha Bin. 14) Fix lack of UMH cleanup when it unexpectedly exits, from Taehee Yoo. 15) Bridge forwarding must clear skb->tstamp, from Paolo Abeni. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (87 commits) bnxt_en: Fix context memory allocation. bnxt_en: Fix ring checking logic on 57500 chips. mISDN: hfcsusb: Use struct_size() in kzalloc() net: clear skb->tstamp in bridge forwarding path net: bpfilter: disallow to remove bpfilter module while being used net: bpfilter: restart bpfilter_umh when error occurred net: bpfilter: use cleanup callback to release umh_info umh: add exit routine for UMH process isdn: i4l: isdn_tty: Fix some concurrency double-free bugs vhost/vsock: fix vhost vsock cid hashing inconsistent net: stmmac: Prevent RX starvation in stmmac_napi_poll() net: stmmac: Fix the logic of checking if RX Watchdog must be enabled net: stmmac: Check if CBS is supported before configuring net: stmmac: dwxgmac2: Only clear interrupts that are active net: stmmac: Fix PCI module removal leak tools/bpf: fix bpftool map dump with bitfields tools/bpf: test btf bitfield with >=256 struct member offset bpf: fix bpffs bitfield pretty print net: ethernet: mediatek: fix warning in phy_start_aneg tcp: change txhash on SYN-data timeout ...
2019-01-08cross-tree: phase out dma_zalloc_coherent() on headersLuis Chamberlain1-1/+1
The last few stragglers coccinelle doesn't pick up are on driver specific header files. Phase those out as well as dma_alloc_coherent() zeroes out the memory as well now too. Suggested-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Luis Chamberlain <mcgrof@kernel.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2019-01-04octeontx2-af: Fix a resource leak in an error handling path in 'cgx_probe()'Christophe JAILLET1-1/+3
If an error occurs after the call to 'pci_alloc_irq_vectors()', we must call 'pci_free_irq_vectors()' in order to avoid a resource leak. The same sequence is already in place in the corresponding 'cgx_remove()' function. Fixes: 1463f382f58d ("octeontx2-af: Add support for CGX link management") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Enable mkex profileVamsi Attunuru8-2/+213
The following set of NPC registers allow the driver to configure NPC to generate different key value schemes to compare against packet payload in MCAM search. NPC_AF_INTF(0..1)_KEX_CFG NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG Currently, the AF driver populates these registers to configure the default values to address the most common use cases such as key generation for channel number + DMAC. The secure firmware stores different configuration value of these registers to enable different NPC use case along with the name for the lookup. Patch loads profile binary from secure firmware over the exiting CGX mailbox interface and apply the profile. AF driver shall fall back to the default configuration in case of any errors. The AF consumer driver can know the selected profile on response to NPC_GET_KEX_CFG mailbox by introducing mkex_pfl_name in the struct npc_get_kex_cfg_rsp. Signed-off-by: Vamsi Attunuru <vamsi.attunuru@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Add LSO format configuration mailboxNithin Dabilpuram3-7/+91
NIX_AF_LSO_FORMAT(0..31)_FIELD(0..7) register enables an SW defined means to define LSO packet modification formats. 0..31 works as an index to choose the algorithm, On success, the mailbox returns the index to the client of chosen LSO algorithm selection. This index will be used in configuring the transmit descriptors. Add mailbox interface to dynamically reserve and configure LSO format. This commit also fixes 'sizem1' for NIX_LSOALG_TCP_FLAGS to '1' i.e 2 Bytes. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Add L3 and L4 packet verification mailboxVidhya Raman3-0/+55
Adds mailbox support for L4 checksum verification and L3 and L4 length verification configuration. Signed-off-by: Vidhya Raman <vraman@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Configure VLAN TPIDsNithin Dabilpuram1-0/+7
Setup TPID's for vlan0 and vlan1 for Tx VLAN insertion offloads. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Add support for Tx packet markingKrzysztof Kanas3-0/+133
NIX_AF_MARK_FORMAT(0..127)_CTL register enables an SW defined means to mark/insert various data in the packet based on final packet color from traffic shaping HW. 0..127 works as an index to choose the algorithm. On success, the mailbox returns the index to the client. Add NIX_MARK_FORMAT_CFG mailbox which reserves mark format based on tuple (offset, y_mask, y_val, r_mask, r_val) If the tuple is requested again for mark format that was already reserved, then it will be reused. If not it will reserve a new entry if space is available. Also on AF init commonly used marker format such as VLAN DEI, IPv4 ECN, IPv4 DSCP are reserved for AF consumers. Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Enable RSS with promiscuous modeVamsi Attunuru1-4/+31
This patch adds support for enabling RSS in promiscuous mode if RSS is already requested by the AF client. Signed-off-by: Vamsi Attunuru <vamsi.attunuru@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Define all NIX_AF_RX_DEF_* registersJerin Jacob1-5/+20
In order to support all NIX specific valid length errors and checksum errors on Rx, Update all NIX_AF_RX_DEF_* registers. Also sorted all registers in HRM definition order. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Enable inner IPv4 checksum and its error codeJerin Jacob1-1/+8
This patch enables the inner IPv4 checksum and defines the error code for Rx inner and outer checksum errors. Setting ERRCODE as 1 so that CQE descriptor can be embedded valid checksum error code and the driver can interpret checksum error as ERRLEV = LID + 1 and ERRCODE = 1. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Allow freeing single TLx Tx schedule queueNithin Dabilpuram1-1/+71
The default behavior was to free all the TLx Tx schedule queues. This patch adds support for freeing a single Tx schedule queue if TXSCHQ_FREE_ALL flag is not set. Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Restrict TL1 allocation and configurationNithin Dabilpuram3-18/+218
TL1 is the root node in the scheduling hierarchy and it is a global resource with a limited number. This patch introduces restriction and validation on the allocation of the TL1 nodes for the effective resource sharing across the AF consumers. - Limit TL1 allocation to 2 per lmac. One could be for the normal link and one for IEEE802.3br express link (Express Send DMA). Effectively all the VF's of an RVU PF(lmac) share the two TL1 schqs. - TL1 cannot be freed once allocated. - Allow VF's to only apply default config to TL1 if not already applied. PF's can always overwrite the TL1 config. - Consider NIX_AQ_INSTOP_WRITE while validating txschq when sq.ena is set. Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Add support for runtime RSS algo index reservationJerin Jacob4-94/+119
Introduced reserve_flowkey_alg_idx()to reserve RSS algorithm index, it would internally use set_flowkey_fields() to generate fields based on the flow key dynamically. On AF driver init, it would reserve a predefined set RSS algo indexes, which will be available all the time for all the AF driver consumers. The leftover algo indexes can be reserved at runtime through exiting nix_rss_flowkey_cfg mailbox message. The NIX_FLOW_KEY_TYPE_PORT is removed from predefined a set of RSS flow type as it is not used by any consumer. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Add support for dynamic flow cfg to RSS field generationJerin Jacob2-27/+87
Introduce state-based algorithm to convert the flow_key value to RSS algo field used by NIX_AF_RX_FLOW_KEY_ALGX_FIELDX register. The outer `for loop` goes over _all_ protocol field and the following variables depict the state machine forward progress logic. a) keyoff_marker - Enabled when hash byte length needs to be accounted in field->key_offset update. b) field_marker - Enabled when a new field needs to be selected. c) group_member - Enabled when a protocol is part of a group. This would remove the existing hard coding and enable to add new protocol support seamlessly. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Add response for RSS flow key cfg messageJerin Jacob4-73/+86
Added response for nix_rss_flowkey_cfg message to return selected RSS algorithm index. The FLOW_KEY_TYPE* definition is part of the mbox message and it will be used by the other consumers of AF driver hence moving to mbox.h. Also renamed FLOW_* definitions to NIX_FLOW_* to avoid global name space collisions, as we have various coming from include/uapi/linux/pkt_cls.h for example. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-03octeontx2-af: Skip NIXLF check for bcast MCE entrySunil Goutham2-6/+10
At the time of initial broadcast packet replication table init, NIXLFs are not yet attached to PF_FUNCs. Hence skipped checking NIXLF while submitting MCE entry init instruction to NIX admin queue. Also did a minor cleanup while installing bcast match entry in packet parser unit i.e NPC. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-23octeontx2-af: Bringup CGX LMAC links by defaultLinu Cherian3-0/+82
- Added new CGX firmware interface API for sending link up/down commands - Do link up for cgx lmac ports by default at the time of CGX driver probe. Since cgx link up in driver probe affects the Linux boot time, linkup procedure is kept threaded using workqueues. For this, a new cgx API cgx_lmac_linkup_start has been added. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-23octeontx2-af: Unregister cgx event callbacks gracefullyLinu Cherian3-1/+43
Added provision to unregister cgx event callbacks. This enables the exit path to ensure event callbacks are unregistered before workqueues get destroyed. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-23octeontx2-af: Handle non-contiguous CGX LMAC interfacesLinu Cherian5-28/+40
For this, cgx_id(struct cgx) definition has been changed to reflect cgx port id instead of device instance id. Now cgx_id can be directly used as channel offset for NPC configuration. Assumptions on contiguous cgx port ids has been removed from nix_calibrate_x2p as well. As a side effect, allocation of conversion tables that were based on cgx count are changed to cgx port id max value. Tables would return NULL for invalid cgx ports. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-23octeontx2-af: Misc cleanups in cgx driverLinu Cherian5-37/+50
* Do CGX init before NIX init This would add consistency in NIX code that depends on cgx ports * Few other misc cleanups - rvu_cgx_probe renamed as rvu_cgx_init for consistency - rvu_cgx_exit wrapper added to take care of the exit path - Added error check on cgx_lmac_event_handler_init - Minor cleanups in cgx.h related to tab alignment - Removed redundant ids from enum cgx_cmd_id Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Workarounds for HW errataSunil Goutham3-5/+37
Errata 35038 Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets the RX data path before configuration changes (e.g. disabling one or more RQs). Hardware clears [ENA] to indicate sync is done An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC [ENA] too early. Errata 35057 NIX may corrupt internal state when conditional clocks turn off. So turnon all clocks by default. Errata 35786 Parse nibble enable NPC configuration for KEY generation has to be identical for both Rx and Tx interfaces. Also corrected endianness configuration for NIX i.e NIX_AF_CFG[AF_BE] is bit8 and not bit1. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Add interrupt handlers for Master Enable eventLinu Cherian1-0/+113
- Add interrupt handlers for Master Enable events from PFs and Master Enable events from VFs of AF - Master Enable is required for the MSIX delivery to work - Master Enable bit trap handler doesn't have to do any anything other than clearing the TRPEND bit, since the enable/disable requirements are already taken care using mbox requests/flr handler. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Add FLR handling support for AF's VFsSunil Goutham1-19/+110
Added support to handle FLR for AF's VFs (i.e LBK VFs). Just the FLR interrupt enable/disable, handler registration etc, actual HW resource cleanup or LFs teardown logic is already there. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Configure AF VFs to talk over LBK channelsTomasz Duszynski4-7/+37
Configure AF VFs such that they are able to talk over consecutive loopback channels. If 8 VFs are attached to AF then communication will work as below: TX RX lbk0 -> lbk1 lbk1 -> lbk0 lbk2 -> lbk3 lbk3 -> lbk2 lbk4 -> lbk5 lbk5 -> lbk4 lbk6 -> lbk7 lbk7 -> lbk6 Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Enable sriov on AF to create VFsTomasz Duszynski2-3/+185
Enable all AF VFs during probe. Since AF's VFs work in pairs (eg: Pkts sent on VF0 are received by VF1 and viceversa), enable only even number of VFs out of totalVFs, which should again be less than number of loopback (LBK) channels. Also enable VF's mailbox interrupts. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Mbox communication support btw AF and it's VFsTomasz Duszynski3-95/+223
VFs attached to PFs other than AF can not communicate with AF directly. Instead they are supposed to first send message to the PF they are residing on and PF forwards it to the AF. Responses to messages are handled in the reverse order. On the other hand if VFs are on AF (PF0) itself then direct mailbox communication is possible since there's no other PF in the way. This patch addresses this particular case and adds support for handling it. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Marko Kallio <mkallio@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Teardown NPA, NIX LF upon receiving FLRGeetha sowjanya5-1/+156
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup resources held by that PF_FUNC. This patch cleans up, NIX LF - Stop ingress/egress traffic - Disable NPC MCAM entries being used. - Free Tx scheduler queues - Disable RQ/SQ/CQ HW contexts NPA LF - Disable Pool/Aura HW contexts In future teardown of SSO/SSOW/TIM/CPT will be added. Also added a mailbox message for a RVU PF to request AF, to perform FLR for a RVU VF under it. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Add FLR interrupt handlerGeetha sowjanya2-1/+121
RVU admin function (AF) has all the priviliges to cleanup HW state when VFIO triggers a PCIe function level reset (FLR) due to either reset or a VM crash. FLR for RVU PF1-PFn will trigger an IRQ to AF. This patch enables all RVU PF's FLR interrupts and registers a handler. Upon receiving an interrupt, a workqueue is scheduled to cleanup all hardware blocks being used by the PF which received the FLR. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Verify NPA/SSO/NIX PF_FUNC mappingSunil Goutham4-11/+62
While mapping a NIX LF to a NPA LF attached PF_FUNC or SSO LF attached PF_FUNC, verify if PF_FUNC is valid and if that PF_FUNC has a LF of that block attached to it or not. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Add support for stripping STAG/CTAGTomasz Duszynski5-21/+125
This works by shadowing existing UCAST MCAM entry with a new one additionally matching either NPC_LT_LB_CTAG or NPC_LT_LB_STAG. For this to fully work one needs to send properly configured NIX_VTAG_CFG message afterwards i.e with strip and capture enabled and type set to 0. On receiving tagged packet NIX will remove outer VLAN and capture TCI in NIX_RX_PARSE_S. Also simplified RX Vtag configuration flow With this setting STRIP/CAPTURE VTAG actions separately would be possible. Following combinations are possible: STRIP, STRIP and CAPTURE, CAPTURE or nothing (0 disables respective actions). Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Support to enable/disable default MCAM entriesSunil Goutham4-28/+122
For a PF/VF with a NIXLF attached has default/reserved MCAM entries for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be forwarded to NIXLF only after it's contexts are initialized. This patch keeps these default entries disabled and adds mbox messages for a PF/VF to enable these once NPA/NIXLF initialization is done. Likewise while PF/VF is being teared down, it can send the disable mailbox message to stop receiving traffic. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Add MKEX default profileSantosh Shukla3-25/+151
Added basic default MKEX profile. This profile tells hardware what data to extract from packet and where to place it (bit offset) in final KEY generated for the parsed packet. Based on the bit placement of the packet data, MCAM entries have to programmed for matching. Also added a msg to retrieve this MKEX profile from PF/VF which inturn can process it to determine how MCAM entry has to be populated. Signed-off-by: Santosh Shukla <sshukla@marvell.com> Signed-off-by: Yuri Tolstov <ytolstov@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Alloc and config NPC MCAM entry at a timeSunil Goutham3-0/+94
A new mailbox message is added to support allocating a MCAM entry along with a counter and configuring it in one go. This reduces the amount of mailbox communication involved in installing a new MCAM rule. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Map or unmap NPC MCAM entry and counterSunil Goutham3-4/+192
Alloc memory to save MCAM 'entry to counter' mapping and since multiple entries can map to same counter, added counter's reference count tracking. Do 'entry to counter' mapping when a entry is being installed and mbox msg sender requested to configure a counter as well. Mapping is removed when a entry or counter is being freed or a explicit mbox msg is received to unmap them. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Support for NPC MCAM countersSunil Goutham3-0/+190
NPC HW has counters which can be mapped to MCAM entries to gather entry match statistics. This patch adds support to allocate, free, clear and retrieve stats of NPC MCAM counters. New mailbox messages have been added for this. Similar to MCAM entries both contiguous and non-contiguous counter allocation is supported. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: MCAM entry installation supportSunil Goutham3-8/+228
Add support for a RVU PF/VF to enable, disable, configure and shuffle MCAM entries via mbox commands. This patch adds mailbox message formats and handling of these commands. As of now otherthan validating MCAM entry index, info like channel number e.t.c in MCAM config data sent by PF/VF are not validated. Also a max of 64 MCAM entries can be shuffled with a single mbox command. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: NPC MCAM entry alloc/free supportSunil Goutham4-5/+588
This patch adds NPC MCAM entry management and support for allocating and freeing them via mailbox. Both contiguous and non-contiguous allocations are supported. Incase of contiguous, if request cannot be met then max contiguous number of available entries are allocated. High or low priority index allocation w.r.t a reference MCAM index is also supported. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Relax resource lock into mutexStanislaw Kardach4-25/+30
Mailbox message handling is done in a workqueue context scheduled from interrupt handler. So resource locks does not need to be a spinlock. Therefore relax them into a mutex so that later on we may use them in routines that might sleep. Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Support to get NIX HW constants from AFKiran Kumar2-0/+12
This patch adds reading HW limits like number of Rx/Tx stats, number of queue IRQs supported per NIX LF from AF registers and sync them to PF/VF. Signed-off-by: Kiran Kumar <kirankumark@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Support to modify min/max allowed packet lengthsSunil Goutham5-1/+220
This patch adds support for RVU PF/VFs to modify min/max packet lengths allowed by HW. For VFs on PF0, settings will be automatically applied on LBK link. RX link's min/maxlen is configured to min/max of PF and it's all VFs. On the TX side if requested all SMQs attached to the requesting NIXLF will be updated with new min/max lengths. Also updates transmit credits for Tx links based on new maxlen. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-19octeontx2-af: Convert mbox handlers APIs to lowercaseSunil Goutham7-102/+107
This patch converts all mailbox message handler API names to lowercase. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-25octeontx2-af: Use GFP_ATOMIC under spin lockWei Yongjun1-1/+1
The function nix_update_mce_list() is called from nix_update_bcast_mce_list(), and a spin lock is held here, so we should use GFP_ATOMIC instead. Fixes: 4b05528ebf0c ("octeontx2-af: Update bcast list upon NIXLF alloc/free") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-24octeontx2-af: Copy the right amount of memoryDan Carpenter1-1/+1
This is a copy and paste bug where we copied the sizeof() from the chunk before. We're copying more data than intended but the destination is a union so it doesn't cause memory corruption. Fixes: ffb0abd7e9cb ("octeontx2-af: NIX AQ instruction enqueue support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-22octeontx2-af: Support for NIXLF's UCAST/PROMISC/ALLMULTI modesSunil Goutham4-1/+105
By default NIXLF is set in UCAST mode. This patch adds a new mailbox message which when sent by a RVU PF changes this default mode. When promiscuous mode is needed, the reserved promisc entry for each of RVU PF is setup to match against ingress channel number only, so that all pkts on that channel are accepted and forwarded to the mode change requesting PF_FUNC's NIXLF. PROMISC and ALLMULTI modes are supported only for PFs, for VFs only UCAST mode is supported. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-22octeontx2-af: Support for setting MAC addressSunil Goutham3-1/+35
Added a new mailbox message for a PF/VF to set/update it's NIXLF's MAC address. Also updates unicast NPC MCAM entry with this address as matching DMAC. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-22octeontx2-af: Support for changing RSS algorithmSunil Goutham4-1/+108
This patch adds support for a RVU PF/VF to change NIX Rx flowkey algorithm index in NPC RX RSS_ACTION. eg: a ethtool command changing RSS algorithm for a netdev interface would trigger this change in NPC. If PF/VF doesn't specify any MCAM entry index then default UCAST entry of the NIXLF attached to PF/VF will be updated with RSS_ACTION and flowkey index. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-22octeontx2-af: NIX Rx flowkey configuration for RSSSunil Goutham3-0/+187
Configure NIX RX flowkey algorithm configuration to support RSS (receive side scaling). Currently support for only L3/L4 2-tuple and 4-tuple hash of IPv4/v6/TCP/UDP/SCTP is added. HW supports upto 32 different flowkey algorithms which SW can define, this patch defines 9. NPC RX ACTION has to point to one of these flowkey indices for RSS to work. The configuration is dependent on NPC parse result's layer info. So if NPC KPU profile changes suchthat LID/LTYPE values of above said protocols change then this configuration will most likely be effected. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-22octeontx2-af: Install ucast and bcast pkt forwarding rulesSunil Goutham4-0/+375
Upon NIXLF_ALLOC install a unicast forwarding rule in NPC MCAM like below - Match pkt DMAC with NIXLF attached PF/VF's MAC address. - Ingress channel - Action is UCAST - Forward to PF_FUNC of this NIXLF And broadcast pkt forwarding rule as - Match L2B bit in MCAM search key - Ingress channel - Action is UCAST, for now, later it will be changed to MCAST. Only PFs can install this rule Upon NIXLF_FREE disable all MCAM entries in use by that NIXLF. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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