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path: root/drivers/net/ethernet/mellanox/mlxsw/cmd.h (follow)
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2019-06-13mlxsw: cmd: Free running clock PCI BAR and offsets via query firmwareShalom Toledo1-0/+12
Add free running clock PCI BAR and offset to query firmware command. Signed-off-by: Shalom Toledo <shalomt@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-08-09mlxsw: Replace license text with SPDX identifiers and adjust copyrightsJiri Pirko1-34/+2
Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-29mlxsw: cmd: Handle error after reset gracefullyJiri Pirko1-5/+11
There is an exception in command interface processing in case the MRSR register is written to. The register triggers FW reset and during the reset FW returns an error. So handle this by ignoring this error while writing to MRSR register. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-03mlxsw: pci: Check number of CQEs for CQE version 2Jiri Pirko1-1/+6
Check number of CQEs for CQE version 2 reported by QUERY_AQ_CAP command. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-03mlxsw: pci: Allow to use CQEs of version 1 and version 2Jiri Pirko1-3/+21
Use previously added resources to query FW support for multiple versions of CQEs. Use the biggest version supported. For SDQs, it has no sense to use version 2 as it does not introduce any new features, but it is twice the size of CQE version 1. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-08mlxsw: pci: Remove unused bitIdo Schimmel1-12/+0
The overrun ignore bit isn't supported by the device's firmware and was recently removed from the programmer's reference manual (PRM). Remove it from the driver as well. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-09mlxsw: cmd: Fix API name comments for event-queuesElad Raz1-5/+5
Probably some copy-paste error from "int_msix" that caused "int_" prefix to appear in the comments for all "eq_" APIs. Signed-off-by: Elad Raz <eladr@mellanox.com> Acked-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-23mlxsw: cmd: Push resource query defines to cmd.hJiri Pirko1-0/+5
Push cmd resource query related defines to cmd.h where they belong. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-07-24mlxsw: pci: Add resources query implementation.Nogah Frankel1-0/+32
Add resources query implementation. If exists, query the HW for its builtin resources instead of having them as consts in the code. Signed-off-by: Nogah Frankel <nogahf@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-07-05mlxsw: Add KVD sizes configuration into profileJiri Pirko1-0/+43
Up until now we only used hash-based tables in the device, but we are going to use the linear table for remote routes adjacency lists. Add the configuration fields that control the size of the linear table. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-16mlxsw: cmd: Introduce FID-offset flooding tablesIdo Schimmel1-0/+12
Packets destined to offloaded netdevs will be classified to FIDs in the device and flooded in case of BUM. The flooding table used is of type FID-offset, which allows one to create different flooding domains for different FIDs and specify the offset in the flooding table for each FID (not necessarily equal to FID or VID). Add support for this flooding table type, by exposing the configuration of the number of tables from this type and their size. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-16mlxsw: cmd: Introduce per-FID flooding tablesIdo Schimmel1-0/+13
In the newly introduced Spectrum switch ASIC, packets destined to not offloaded netdevs will be classified to special FIDs (vFIDs) in the device and flooded to the CPU port. The flooding table used is of type per-FID, which allows one to create different flooding domains for different vFIDs. While using a simple single-entry flood table is certainly sufficient at this point, we do plan to offload 802.1D bridges involving VLAN interfaces, thus making this change necessary. Add support for this flooding table type, by exposing the configuration of the number of tables from this type and their size. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-15mlxsw: cmd: Update CONFIG_PROFILE command documentationIdo Schimmel1-13/+11
The meaning of certain parameters in the profile passed to the device during initialization has changed, so update their documentation accordingly. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-15mlxsw: pci: Limit number of entries being sent in single MAP_FA cmdJiri Pirko1-0/+2
Firmware accepts only limited number of mapping entries for MAP_FA command. In order to prevent overflow, introduce a limit and in case the number of entries is bigger, call MAP_FA multiple times. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-30mlxsw: Introduce Mellanox switch driver coreJiri Pirko1-0/+1090
Add core components of Mellanox switch driver infrastructure. Core infrastructure is designed so that it can be used by multiple bus drivers (PCI now, I2C and SGMII are planned to be implemented in the future). Multiple switch kind drivers can be registered as well. This core serves as a glue between buses and drivers. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Elad Raz <eladr@mellanox.com> Reviewed-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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