linux-dev - Linux kernel development work

Age	Commit message (Collapse)	Author	Files	Lines
2016-03-13	mlxsw: pci: Implement reset done check	Jiri Pirko	1	-0/+3
	Firmware now tells us that the reset is done by passing a magic value via register. Use it to shorten the wait in case this is supported. With old firmware, we still wait until the timeout is reached. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-03	mlxsw: pci: Implement LAG processing for received packets	Jiri Pirko	1	-1/+3
	Completion queue element for receive queue provides information if the packet was received via LAG port. Extract this info and pass it along to core. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-16	mlxsw: spectrum: Add initial support for Spectrum ASIC	Jiri Pirko	1	-0/+1
	Add support for new generation Mellanox Spectrum ASIC, 10/25/40/50 and 100Gb/s Ethernet Switch. The initial driver implements bridge forwarding offload including bridge internal VLAN support, FDB static entries, FDB learning and HW ageing including their setup. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Elad Raz <eladr@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-15	mlxsw: pci: Remove MLXSW_PCI_RDQS/SDQS defines and checks	Jiri Pirko	1	-2/+0
	Remove strict number check of queues count as various ASICs have different counts. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-15	mlxsw: pci: Use MLXSW_PCI_CQS_MAX instead of MLXSW_PCI_CQS_COUNT	Jiri Pirko	1	-1/+1
	The count of CQs can be different for various ASICs, so just define maximal value and check for that. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-09	mlxsw: Strip FCS from incoming packets	Jiri Pirko	1	-0/+6
	FCS of incoming packets is already checked by HW. Just strip it out. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-30	mlxsw: Introduce Mellanox SwitchX-2 ASIC support	Jiri Pirko	1	-0/+1
	Benefit from the previously introduced Mellanox Switch infrastructure and add driver for SwitchX-2 ASIC. Note that this driver is very simple now. It implements bare minimum for getting device to work on slow-path. Fast-path offload functionality is going to be added soon. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Elad Raz <eladr@mellanox.com> Reviewed-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-30	mlxsw: Add PCI bus implementation	Jiri Pirko	1	-0/+220
	Add PCI bus implementation for Mellanox Technologies Switch ASICs. This includes firmware initialization, async queues manipulation and command interface implementation. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Elad Raz <eladr@mellanox.com> Reviewed-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>