aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/mellanox/mlxsw/port.h (follow)
AgeCommit message (Collapse)AuthorFilesLines
2019-10-31mlxsw: spectrum: Use PMTM register to get max module widthJiri Pirko1-2/+0
Currently the max module width is hard-coded according to ASIC type. That is not entirely correct, as the max module width might differ per-board. Use PMTM register to query FW for maximal width of a module. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-08-09mlxsw: Replace license text with SPDX identifiers and adjust copyrightsJiri Pirko1-35/+3
Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-24mlxsw: Query maximum number of ports from firmwareIdo Schimmel1-9/+1
We currently hard code the maximum number of ports in the driver, but this may change in future devices, so query it from the firmware instead. Fallback to a maximum of 64 ports in case this number can't be queried. This should only happen in SwitchX-2 for which this number is correct. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-30mlxsw: switchib: Introduce SwitchIB and SwitchIB silicon driverElad Raz1-0/+3
SwitchIB and SwitchIB-2 are Infiniband switches with up to 36 ports. This driver initialize the hardware and Firmware which implements the IB management and connection with the SM. Signed-off-by: Elad Raz <eladr@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-30mlxsw: switchx2: Add Infiniband switch partitionElad Raz1-0/+1
In order to put a port in Infiniband fabric it should be assigned to separate swid (Switch partition) that initialized as IB swid. Signed-off-by: Elad Raz <eladr@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-08-24mlxsw: spectrum: Add missing flood to router portIdo Schimmel1-0/+1
In case we have a layer 3 interface on top of a bridge (VLAN / FID RIF), then we should flood the following packet types to the router: * Broadcast: If DIP is the broadcast address of the interface, then we need to be able to get it to CPU by trapping it following route lookup. * Reserved IP multicast (224.0.0.X): Some control packets (e.g. OSPF) use this range and are trapped in the router block. Fixes: 99f44bb3527b ("mlxsw: spectrum: Enable L3 interfaces on top of bridge devices") Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-01mlxsw: spectrum: Introduce port splittingIdo Schimmel1-0/+2
Allow a user to split or unsplit a port using the newly introduced devlink ops. Once split, the original netdev is destroyed and 2 or 4 others are created, according to user configuration. The new ports are like any other port, with the sole difference of supporting a lower maximum speed. When unsplit, the reverse process takes place. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-17mlxsw: Treat local port 64 as validIdo Schimmel1-1/+1
MLXSW_PORT_MAX_PORTS represents the maximum number of local ports, which is 65 for both ASICs (SwitchX-2 and Spectrum) supported by this driver. Fixes: 93c1edb27f9e ("mlxsw: Introduce Mellanox switch driver core") Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-30mlxsw: Introduce Mellanox SwitchX-2 ASIC supportJiri Pirko1-0/+4
Benefit from the previously introduced Mellanox Switch infrastructure and add driver for SwitchX-2 ASIC. Note that this driver is very simple now. It implements bare minimum for getting device to work on slow-path. Fast-path offload functionality is going to be added soon. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Elad Raz <eladr@mellanox.com> Reviewed-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-30mlxsw: Add interface to access registers and process eventsIdo Schimmel1-0/+19
Ethernet Management Datagrams (EMADs) are Ethernet packets sent between the host and the device in order to configure the available device registers. Another use case is notifications sent from the device to the host, letting it know about certain events, such as port up / down. Add the ability to construct EMADs with provisions to construct and parse the registers' payloads. Implement EMAD transaction layer which is responsible for the reliable transmission of EMADs. Also, add an infrastructure used by the switch driver to register for particular events generated by the device. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Elad Raz <eladr@mellanox.com> Reviewed-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-30mlxsw: Introduce Mellanox switch driver coreJiri Pirko1-0/+52
Add core components of Mellanox switch driver infrastructure. Core infrastructure is designed so that it can be used by multiple bus drivers (PCI now, I2C and SGMII are planned to be implemented in the future). Multiple switch kind drivers can be registered as well. This core serves as a glue between buses and drivers. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Elad Raz <eladr@mellanox.com> Reviewed-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.