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2019-11-01r8169: fix wrong PHY ID issue with RTL8168dpHeiner Kallweit1-0/+4
As reported in [0] at least one RTL8168dp version has problems establishing a link. This chip version has an integrated RTL8211b PHY, however the chip seems to report a wrong PHY ID, resulting in a wrong PHY driver (for Generic Realtek PHY) being loaded. Work around this issue by adding a hook to r8168dp_2_mdio_read() for returning the correct PHY ID. [0] https://bbs.archlinux.org/viewtopic.php?id=246508 Fixes: 242cd9b5866a ("r8169: use phy_resume/phy_suspend") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-10r8169: fix jumbo packet handling on resume from suspendHeiner Kallweit1-24/+11
Mariusz reported that invalid packets are sent after resume from suspend if jumbo packets are active. It turned out that his BIOS resets chip settings to non-jumbo on resume. Most chip settings are re-initialized on resume from suspend by calling rtl_hw_start(), so let's add configuring jumbo to this function. There's nothing wrong with the commit marked as fixed, it's just the first one where the patch applies cleanly. Fixes: 7366016d2d4c ("r8169: read common register for PCI commit") Reported-by: Mariusz Bialonczyk <manio@skyboo.net> Tested-by: Mariusz Bialonczyk <manio@skyboo.net> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-09-23Merge tag 'pci-v5.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds1-1/+0
Pull PCI updates from Bjorn Helgaas: "Enumeration: - Consolidate _HPP/_HPX stuff in pci-acpi.c and simplify it (Krzysztof Wilczynski) - Fix incorrect PCIe device types and remove dev->has_secondary_link to simplify code that deals with upstream/downstream ports (Mika Westerberg) - After suspend, restore Resizable BAR size bits correctly for 1MB BARs (Sumit Saxena) - Enable PCI_MSI_IRQ_DOMAIN support for RISC-V (Wesley Terpstra) Virtualization: - Add ACS quirks for iProc PAXB (Abhinav Ratna), Amazon Annapurna Labs (Ali Saidi) - Move sysfs SR-IOV functions to iov.c (Kelsey Skunberg) - Remove group write permissions from sysfs sriov_numvfs, sriov_drivers_autoprobe (Kelsey Skunberg) Hotplug: - Simplify pciehp indicator control (Denis Efremov) Peer-to-peer DMA: - Allow P2P DMA between root ports for whitelisted bridges (Logan Gunthorpe) - Whitelist some Intel host bridges for P2P DMA (Logan Gunthorpe) - DMA map P2P DMA requests that traverse host bridge (Logan Gunthorpe) Amazon Annapurna Labs host bridge driver: - Add DT binding and controller driver (Jonathan Chocron) Hyper-V host bridge driver: - Fix hv_pci_dev->pci_slot use-after-free (Dexuan Cui) - Fix PCI domain number collisions (Haiyang Zhang) - Use instance ID bytes 4 & 5 as PCI domain numbers (Haiyang Zhang) - Fix build errors on non-SYSFS config (Randy Dunlap) i.MX6 host bridge driver: - Limit DBI register length (Stefan Agner) Intel VMD host bridge driver: - Fix config addressing issues (Jon Derrick) Layerscape host bridge driver: - Add bar_fixed_64bit property to endpoint driver (Xiaowei Bao) - Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC drivers separately (Xiaowei Bao) Mediatek host bridge driver: - Add MT7629 controller support (Jianjun Wang) Mobiveil host bridge driver: - Fix CPU base address setup (Hou Zhiqiang) - Make "num-lanes" property optional (Hou Zhiqiang) Tegra host bridge driver: - Fix OF node reference leak (Nishka Dasgupta) - Disable MSI for root ports to work around design problem (Vidya Sagar) - Add Tegra194 DT binding and controller support (Vidya Sagar) - Add support for sideband pins and slot regulators (Vidya Sagar) - Add PIPE2UPHY support (Vidya Sagar) Misc: - Remove unused pci_block_cfg_access() et al (Kelsey Skunberg) - Unexport pci_bus_get(), etc (Kelsey Skunberg) - Hide PM, VC, link speed, ATS, ECRC, PTM constants and interfaces in the PCI core (Kelsey Skunberg) - Clean up sysfs DEVICE_ATTR() usage (Kelsey Skunberg) - Mark expected switch fall-through (Gustavo A. R. Silva) - Propagate errors for optional regulators and PHYs (Thierry Reding) - Fix kernel command line resource_alignment parameter issues (Logan Gunthorpe)" * tag 'pci-v5.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (112 commits) PCI: Add pci_irq_vector() and other stubs when !CONFIG_PCI arm64: tegra: Add PCIe slot supply information in p2972-0000 platform arm64: tegra: Add configuration for PCIe C5 sideband signals PCI: tegra: Add support to enable slot regulators PCI: tegra: Add support to configure sideband pins PCI: vmd: Fix shadow offsets to reflect spec changes PCI: vmd: Fix config addressing when using bus offsets PCI: dwc: Add validation that PCIe core is set to correct mode PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driver dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding PCI: Add quirk to disable MSI-X support for Amazon's Annapurna Labs Root Port PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port PCI: Add ACS quirk for Amazon Annapurna Labs root ports PCI: Add Amazon's Annapurna Labs vendor ID MAINTAINERS: Add PCI native host/endpoint controllers designated reviewer PCI: hv: Use bytes 4 and 5 from instance ID as the PCI domain numbers dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries dt-bindings: PCI: tegra: Add sideband pins configuration entries PCI: tegra: Add Tegra194 PCIe support PCI: Get rid of dev->has_secondary_link flag ...
2019-09-01r8169: don't set bit RxVlan on RTL8125Heiner Kallweit1-2/+4
RTL8125 uses a different register for VLAN offloading config, therefore don't set bit RxVlan. Fixes: f1bce4ad2f1c ("r8169: add support for RTL8125") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add support for EEE on RTL8125Heiner Kallweit1-0/+24
This adds EEE support for RTL8125 based on the vendor driver. Supported is EEE for 100Mbps and 1Gbps. Realtek recommended to not yet enable EEE for 2.5Gbps due to potential compatibility issues. Also ethtool doesn't support yet controlling EEE for 2.5Gbps and 5Gbps. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add RTL8125 PHY initializationHeiner Kallweit1-3/+127
This patch adds PHY initialization magic copied from the r8125 vendor driver. In addition it supports loading the firmware for chip version RTL_GIGA_MAC_VER_61. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add support for RTL8125Heiner Kallweit2-18/+265
This adds support for 2.5Gbps chip RTL8125, it's partially based on the r8125 vendor driver. Tested with a Delock 89531 PCIe card against a Netgear GS110MX Multi-Gig switch. Firmware isn't strictly needed, but on some systems there may be compatibility issues w/o firmware. Firmware has been submitted to linux-firmware. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: don't use bit LastFrag in tx descriptor after sendHeiner Kallweit1-1/+1
On RTL8125 this bit is always cleared after send. Therefore check for tx_skb->skb being set what is functionally equivalent. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: read common register for PCI commitHeiner Kallweit1-1/+1
RTL8125 uses a different register number for IntrMask. To net have side effects by reading a random register let's use a register that is the same on all supported chip families. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: move disabling interrupt coalescing to RTL8169/RTL8168 initHeiner Kallweit1-2/+6
RTL8125 doesn't support the same coalescing registers, therefore move this initialization to the 8168/6169-specific init. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: factor out reading MAC address from registersHeiner Kallweit1-3/+10
For RTL8125 we will have to read the MAC address also from another register range, therefore create a small helper. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: restrict rtl_is_8168evl_up to RTL8168 chip versionsHeiner Kallweit1-1/+2
Extend helper rtl_is_8168evl_up to properly work once we add mac version numbers >51 for RTL8125. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: change interrupt mask type to u32Heiner Kallweit1-5/+11
RTL8125 uses a 32 bit interrupt mask even though only bits in the lower 16 bits are used. Change interrupt mask size to u32 to be prepared and reintroduce helper rtl_get_events. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-28PCI: Move ASPM declarations to linux/pci.hKrzysztof Wilczynski1-1/+0
Move ASPM definitions and function prototypes from include/linux/pci-aspm.h to include/linux/pci.h so users only need to include <linux/pci.h>: PCIE_LINK_STATE_L0S PCIE_LINK_STATE_L1 PCIE_LINK_STATE_CLKPM pci_disable_link_state() pci_disable_link_state_locked() pcie_no_aspm() No functional changes intended. Link: https://lore.kernel.org/r/20190827095620.11213-1-kw@linux.com Signed-off-by: Krzysztof Wilczynski <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-08-26r8169: improve DMA handling in rtl_rxHeiner Kallweit1-4/+3
Move the call to dma_sync_single_for_cpu after calling napi_alloc_skb. This avoids calling dma_sync_single_for_cpu w/o handing control back to device if the memory allocation should fail. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-23r8169: fix DMA issue on MIPS platformHeiner Kallweit1-0/+4
As reported by Aaro this patch causes network problems on MIPS Loongson platform. Therefore revert it. Fixes: f072218cca5b ("r8169: remove not needed call to dma_sync_single_for_device") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15r8169: sync EEE handling for RTL8168h with vendor driverHeiner Kallweit1-1/+11
Sync EEE init for RTL8168h with vendor driver and add two writes to vendor-specific registers. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-15r8169: use the generic EEE management functionsHeiner Kallweit1-148/+24
Now that the Realtek PHY driver maps the vendor-specific EEE registers to the standard MMD registers, we can remove all special handling and use the generic functions phy_ethtool_get/set_eee. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-14r8169: fix sporadic transmit timeout issueHeiner Kallweit1-0/+1
Holger reported sporadic transmit timeouts and it turned out that one path misses ringing the doorbell. Fix was suggested by Eric. Fixes: ef14358546b1 ("r8169: make use of xmit_more") Suggested-by: Eric Dumazet <edumazet@google.com> Tested-by: Holger Hoffstätte <holger@applied-asynchrony.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-11r8169: inline rtl8169_free_rx_databuffHeiner Kallweit1-17/+7
rtl8169_free_rx_databuff is used in only one place, so let's inline it. We can improve the loop because rtl8169_init_ring zero's RX_databuff before calling rtl8169_rx_fill, and rtl8169_rx_fill fills Rx_databuff starting from index 0. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-09r8169: fix performance issue on RTL8168evlHolger Hoffstätte1-3/+3
Disabling TSO but leaving SG active results is a significant performance drop. Therefore disable also SG on RTL8168evl. This restores the original performance. Fixes: 93681cd7d94f ("r8169: enable HW csum and TSO") Signed-off-by: Holger Hoffstätte <holger@applied-asynchrony.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-08r8169: allocate rx buffers using alloc_pages_nodeHeiner Kallweit1-26/+19
We allocate 16kb per rx buffer, so we can avoid some overhead by using alloc_pages_node directly instead of bothering kmalloc_node. Due to this change buffers are page-aligned now, therefore the alignment check can be removed. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-06Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller1-6/+8
Just minor overlapping changes in the conflicts here. Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-06r8169: sync PCIe PHY init with vendor driver 8.047.01Heiner Kallweit1-22/+38
Synchronize PCIe PHY initialization with vendor driver version 8.047.01. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-06r8169: add helper r8168_mac_ocp_modifyHeiner Kallweit1-46/+19
Add a helper for MAC OCP read-modify-write operations. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-06r8169: remove access to legacy register MultiIntrHeiner Kallweit1-4/+0
This code piece was inherited from RTL8139 code, the register at address 0x5c however has a different meaning on RTL8169 and is unused. So we can remove this. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-29r8169: make use of xmit_moreHeiner Kallweit1-5/+12
There was a previous attempt to use xmit_more, but the change had to be reverted because under load sometimes a transmit timeout occurred [0]. Maybe this was caused by a missing memory barrier, the new attempt keeps the memory barrier before the call to netif_stop_queue like it is used by the driver as of today. The new attempt also changes the order of some calls as suggested by Eric. [0] https://lkml.org/lkml/2019/2/10/39 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-27r8169: don't use MSI before RTL8168dHeiner Kallweit1-2/+7
It was reported that after resuming from suspend network fails with error "do_IRQ: 3.38 No irq handler for vector", see [0]. Enabling WoL can work around the issue, but the only actual fix is to disable MSI. So let's mimic the behavior of the vendor driver and disable MSI on all chip versions before RTL8168d. [0] https://bugzilla.kernel.org/show_bug.cgi?id=204079 Fixes: 6c6aa15fdea5 ("r8169: improve interrupt handling") Reported-by: Dušan Dragić <dragic.dusan@gmail.com> Tested-by: Dušan Dragić <dragic.dusan@gmail.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-27Revert ("r8169: remove 1000/Half from supported modes")Heiner Kallweit1-4/+1
This reverts commit a6851c613fd7fccc5d1f28d5d8a0cbe9b0f4e8cc. It was reported that RTL8111b successfully finishes 1000/Full autoneg but no data flows. Reverting the original patch fixes the issue. It seems to be a HW issue with the integrated RTL8211B PHY. This PHY version used also e.g. on RTL8168d, so better revert the original patch. Reported-by: Bernhard Held <berny156@gmx.de> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-27r8169: enable HW csum and TSOHeiner Kallweit1-5/+11
Enable HW csum and TSO per default except on known buggy chip versions. Realtek confirmed that RTL8168evl has a HW issue with TSO. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-27r8169: remove r8169_csum_workaroundHeiner Kallweit1-37/+2
The loop in r8169_csum_workaround is called only if in msdn_giant_send_check a copy of the skb header needs to be made and we don't have enough memory. Let's simply drop the packet in that case so that we can remove r8169_csum_workaround. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-27r8169: implement callback ndo_features_checkHeiner Kallweit1-24/+36
Implement callback ndo_features_check and move all feature checks there. This will allow us to get rid of r8169_csum_workaround() completely in a subsequent step. Like in the vendor driver disable HW csum for short packets on RTL8168b. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-27r8169: set GSO size and segment limitsHeiner Kallweit1-1/+12
Set GSO max size and max segment number as in the vendor driver. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-27r8169: align setting PME with vendor driverHeiner Kallweit1-2/+6
Align setting PME with the vendor driver. PMEnable is writable on RTL8169 only, on later chip versions it's read-only. PME_SIGNAL is used on chip versions from RTL8168evl with the exception of the RTL8168f family. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-24r8169: improve rtl_set_rx_modeHeiner Kallweit1-30/+22
This patch improves and simplifies rtl_set_rx_mode a little. No functional change intended. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-24r8169: fix a typo in a commentCorentin Musard1-1/+1
Replace "additonal" by "additional" in a comment. Typo found by checkpatch.pl. Signed-off-by: Corentin Musard <corentinmusard@gmail.com> Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-22r8169: improve rtl_rxHeiner Kallweit1-28/+15
This patch improves few aspects of rtl_rx, no functional change intended. 1. inline rtl8169_try_rx_copy 2. make pkt_size unsigned 3. use constant ETH_FCS_LEN instead of value 4 4. We just created the skb, so we don't need the checks in skb_put. Also we don't need the return value of skb_put. Set skb->tail and skb->len directly. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-20r8169: fix RTL8168g PHY initThomas Voegtle1-2/+2
This fixes a copy&paste error in the original patch. Setting the wrong register resulted in massive packet loss on some systems. Fixes: a2928d28643e ("r8169: use paged versions of phylib MDIO access functions") Tested-by: Thomas Voegtle <tv@lio96.de> Signed-off-by: Thomas Voegtle <tv@lio96.de> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-13r8169: fix issue with confused RX unit after PHY power-down on RTL8411bHeiner Kallweit1-0/+137
On RTL8411b the RX unit gets confused if the PHY is powered-down. This was reported in [0] and confirmed by Realtek. Realtek provided a sequence to fix the RX unit after PHY wakeup. The issue itself seems to have been there longer, the Fixes tag refers to where the fix applies properly. [0] https://bugzilla.redhat.com/show_bug.cgi?id=1692075 Fixes: a99790bf5c7f ("r8169: Reinstate ASPM Support") Tested-by: Ionut Radu <ionut.radu@gmail.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-07r8169: sync few chip names with vendor driverHeiner Kallweit1-4/+4
This patch syncs the name of few chip versions with the latest vendor driver version. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-02r8169: add random MAC address fallbackHeiner Kallweit1-13/+27
It was reported that the GPD MicroPC is broken in a way that no valid MAC address can be read from the network chip. The vendor driver deals with this by assigning a random MAC address as fallback. So let's do the same. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-02Revert "r8169: improve handling VLAN tag"Heiner Kallweit1-3/+2
This reverts commit 759d095741721888b6ee51afa74e0a66ce65e974. The patch was based on a misunderstanding. As Al Viro pointed out [0] it's simply wrong on big endian. So let's revert it. [0] https://marc.info/?t=156200975600004&r=1&w=2 Reported-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-29r8169: remove not needed call to dma_sync_single_for_deviceHeiner Kallweit1-1/+0
DMA_API_HOWTO.txt includes an example explaining when dma_sync_single_for_device() is not needed, and that example matches our use case. The buffer isn't changed by the CPU and direction is DMA_FROM_DEVICE, so we can remove the call to dma_sync_single_for_device(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-29r8169: consider that 32 Bit DMA is the defaultHeiner Kallweit1-8/+1
Documentation/DMA-API-HOWTO.txt states: By default, the kernel assumes that your device can address 32-bits of DMA addressing. For a 64-bit capable device, this needs to be increased, and for a device with limitations, it needs to be decreased. Therefore we don't need the 32 Bit DMA fallback configuration and can remove it. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-29r8169: improve handling VLAN tagHeiner Kallweit1-2/+3
The VLAN tag is stored in the descriptor in network byte order. Using swab16 works on little endian host systems only. Better play safe and use ntohs or htons respectively. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-21r8169: don't activate ASPM in chip if OS can't control ASPMHeiner Kallweit1-2/+6
Certain chip version / board combinations have massive problems if ASPM is active. If BIOS enables ASPM and doesn't let OS control it, then we may have a problem with the current code. Therefore check the return code of pci_disable_link_state() and don't enable ASPM in the network chip if OS can't control ASPM. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-15r8169: improve handling of Abit Fatal1ty F-190HDHeiner Kallweit1-8/+6
The Abit Fatal1ty F-190HD has a PCI ID quirk and the entry marks this board as not GBit-capable, what is wrong. According to [0] the board has a RTL8111B that is GBit-capable, therefore remove the RTL_CFG_NO_GBIT flag. [0] https://www.centos.org/forums/viewtopic.php?t=23390 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-14r8169: use helper rtl_is_8168evl_up for setting register MaxTxPacketSizeHeiner Kallweit1-20/+4
>From RTL8168e-vl the value in register MaxTxPacketSize is interpreted differently, therefore use new helper rtl_is_8168evl_up to set this register. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-14r8169: add helper rtl_is_8168evl_upHeiner Kallweit1-17/+12
Add helper rtl_is_8168evl_up to make the code better readable and to simplify it. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-13r8169: improve rtl_coalesce_infoHeiner Kallweit1-15/+6
tp->coalesce_info is used in rtl_coalesce_info() only, so we can remove this member. In addition replace phy_ethtool_get_link_ksettings with a direct access to tp->phydev->speed. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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