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path: root/drivers/net/ethernet/renesas/ravb.h (follow)
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2021-10-13ravb: Update ravb_emac_init_gbeth()Biju Das1-0/+6
This patch enables Receive/Transmit port of TOE and removes the setting of promiscuous bit from EMAC configuration mode register. This patch also update EMAC configuration mode comment from "PAUSE prohibition" to "EMAC Mode: PAUSE prohibition; Duplex; TX; RX; CRC Pass Through". Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-13ravb: Document PFRI register bitBiju Das1-1/+1
Document PFRI register bit, as it is documented on R-Car Gen3 and RZ/G2L hardware manuals. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Sergey Shtylyov <s.shtylyov@omp.ru> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-13ravb: Rename "nc_queue" feature bitBiju Das1-1/+1
Rename the feature bit "nc_queue" with "nc_queues" as AVB DMAC has RX and TX NC queues. There is no functional change. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Sergey Shtylyov <s.shtylyov@omp.ru> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-13ravb: Rename "tsrq" variableBiju Das1-1/+1
Rename the variable "tsrq" with "tccr_mask" as we are passing TCCR mask to the ravb_wait() function. There is no functional change. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Sergey Shtylyov <s.shtylyov@omp.ru> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-13ravb: Add carrier_counters to struct ravb_hw_infoBiju Das1-0/+3
RZ/G2L E-MAC supports carrier counters. Add a carrier_counter hw feature bit to struct ravb_hw_info to add this feature only for RZ/G2L. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-13ravb: Fillup ravb_rx_gbeth() stubBiju Das1-0/+1
Fillup ravb_rx_gbeth() function to support RZ/G2L. This patch also renames ravb_rcar_rx to ravb_rx_rcar to be consistent with the naming convention used in sh_eth driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-13ravb: Fillup ravb_rx_ring_format_gbeth() stubBiju Das1-0/+1
Fillup ravb_rx_ring_format_gbeth() function to support RZ/G2L. This patch also renames ravb_rx_ring_format to ravb_rx_ring_format_rcar to be consistent with the naming convention used in sh_eth driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-13ravb: Fillup ravb_alloc_rx_desc_gbeth() stubBiju Das1-0/+1
Fillup ravb_alloc_rx_desc_gbeth() function to support RZ/G2L. This patch also renames ravb_alloc_rx_desc to ravb_alloc_rx_desc_rcar to be consistent with the naming convention used in sh_eth driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-13ravb: Add rx_max_buf_size to struct ravb_hw_infoBiju Das1-0/+1
R-Car AVB-DMAC has maximum 2K size on RX buffer, whereas on RZ/G2L it is 8K. We need to allow for changing the MTU within the limit of the maximum size of a descriptor. Add a rx_max_buf_size variable to struct ravb_hw_info to handle this difference. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-02ravb: Initialize GbEthernet E-MACBiju Das1-4/+16
Initialize GbEthernet E-MAC found on RZ/G2L SoC. This patch also renames ravb_set_rate to ravb_set_rate_rcar and ravb_rcar_emac_init to ravb_emac_init_rcar to be consistent with the naming convention used in sh_eth driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ravb: Add half_duplex to struct ravb_hw_infoBiju Das1-0/+3
RZ/G2L supports half duplex mode. Add a half_duplex hw feature bit to struct ravb_hw_info for supporting half duplex mode for RZ/G2L. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ravb: Add magic_pkt to struct ravb_hw_infoBiju Das1-0/+1
E-MAC on R-Car supports magic packet detection, whereas RZ/G2L does not support this feature. Add magic_pkt to struct ravb_hw_info and enable this feature only for R-Car. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ravb: Add tsrq to struct ravb_hw_infoBiju Das1-0/+1
R-Car AVB-DMAC has 4 Transmit start request queues, whereas RZ/G2L has only 1 Transmit start request queue. Add a tsrq variable to struct ravb_hw_info to handle this difference. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ravb: Initialize GbEthernet DMACBiju Das1-1/+2
Initialize GbEthernet DMAC found on RZ/G2L SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ravb: Add support for RZ/G2L SoCBiju Das1-0/+2
RZ/G2L SoC has Gigabit Ethernet IP consisting of Ethernet controller (E-MAC), Internal TCP/IP Offload Engine (TOE) and Dedicated Direct memory access controller (DMAC). This patch adds compatible string for RZ/G2L and fills up the ravb_hw_info struct. Function stubs are added which will be used by gbeth_hw_info and will be filled incrementally. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ravb: Add nc_queue to struct ravb_hw_infoBiju Das1-1/+2
R-Car supports network control queue whereas RZ/G2L does not support it. Add nc_queue to struct ravb_hw_info, so that NC queue is handled only by R-Car. This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar to be consistent with the naming convention used in sh_eth driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ravb: Rename "no_ptp_cfg_active" and "ptp_cfg_active" variablesBiju Das1-2/+2
Rename the variable "no_ptp_cfg_active" with "gptp" and "ptp_cfg_active" with "ccc_gac" to match the HW features. There is no functional change. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Sergey Shtylyov <s.shtylyov@omp.ru> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ravb: Rename "ravb_set_features_rx_csum" function to "ravb_set_features_rcar"Biju Das1-1/+1
Rename "ravb_set_features_rx_csum" function to "ravb_set_features_rcar" and replace the function pointer "set_rx_csum_feature" with "set_feature". Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Sergey Shtylyov <s.shtylyov@omp.ru> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Add reset supportBiju Das1-0/+1
Reset support is present on R-Car. Let's support it, if it is available. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Factorise ravb_emac_init functionBiju Das1-0/+1
The E-MAC IP on the R-Car AVB module has different initialization parameters for RX frame size, duplex settings, different offset for transfer speed setting and has magic packet detection support compared to E-MAC on RZ/G2L Gigabit Ethernet module. Factorise the ravb_emac_init function to support the later SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Factorise ravb_dmac_init functionBiju Das1-0/+1
The DMAC IP on the R-Car AVB module has different initialization parameters for RCR, TGC, TCCR, RIC0, RIC2, and TIC compared to DMAC IP on the RZ/G2L Gigabit Ethernet module. Factorise the ravb_dmac_init function to support the later SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Factorise ravb_set_featuresBiju Das1-0/+1
RZ/G2L supports HW checksum on RX and TX whereas R-Car supports on RX. Factorise ravb_set_features to support this feature. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Factorise ravb_adjust_link functionBiju Das1-0/+1
R-Car supports 100 and 1000 Mbps transfer speed whereas RZ/G2L in addition support 10Mbps. Factorise ravb_adjust_link function in order to support 10Mbps speed. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Factorise ravb_rx functionBiju Das1-0/+1
R-Car uses an extended descriptor in RX whereas, RZ/G2L uses normal descriptor in RX. Factorise the ravb_rx function to support the later SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Factorise ravb_ring_init functionBiju Das1-0/+1
The ravb_ring_init function uses an extended descriptor in RX for R-Car and normal descriptor for RZ/G2L. Add a helper function for RX ring buffer allocation to support later SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Factorise ravb_ring_format functionBiju Das1-0/+1
The ravb_ring_format function uses an extended descriptor in RX for R-Car compared to the normal descriptor for RZ/G2L. Factorise RX ring buffer buildup to extend the support for later SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Factorise ravb_ring_free functionBiju Das1-0/+1
R-Car uses extended descriptor in RX, whereas RZ/G2L uses normal descriptor. Factorise ravb_ring_free function so that it can support later SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Add ptp_cfg_active to struct ravb_hw_infoBiju Das1-7/+1
There are some H/W differences for the gPTP feature between R-Car Gen3, R-Car Gen2, and RZ/G2L as below. 1) On R-Car Gen3, gPTP support is active in config mode. 2) On R-Car Gen2, gPTP support is not active in config mode. 3) RZ/G2L does not support the gPTP feature. Add a ptp_cfg_active hw feature bit to struct ravb_hw_info for supporting gPTP active in config mode for R-Car Gen3. This patch also removes enum ravb_chip_id, chip_id from both struct ravb_hw_info and struct ravb_private, as it is unused. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Add no_ptp_cfg_active to struct ravb_hw_infoBiju Das1-0/+1
There are some H/W differences for the gPTP feature between R-Car Gen3, R-Car Gen2, and RZ/G2L as below. 1) On R-Car Gen2, gPTP support is not active in config mode. 2) On R-Car Gen3, gPTP support is active in config mode. 3) RZ/G2L does not support the gPTP feature. Add a no_ptp_cfg_active hw feature bit to struct ravb_hw_info for handling gPTP for R-Car Gen2. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Add multi_irq to struct ravb_hw_infoBiju Das1-0/+1
R-Car Gen3 supports separate interrupts for E-MAC and DMA queues, whereas R-Car Gen2 and RZ/G2L have a single interrupt instead. Add a multi_irq hw feature bit to struct ravb_hw_info to enable this only for R-Car Gen3. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-25ravb: Remove the macros NUM_TX_DESC_GEN[23]Biju Das1-4/+0
For addressing 4 bytes alignment restriction on transmission buffer for R-Car Gen2 we use 2 descriptors whereas it is a single descriptor for other cases. Replace the macros NUM_TX_DESC_GEN[23] with magic number and add a comment to explain it. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Add tx_counters to struct ravb_hw_infoBiju Das1-0/+1
The register for retrieving TX counters is present only on R-Car Gen3 and RZ/G2L; it is not present on R-Car Gen2. Add the tx_counters hw feature bit to struct ravb_hw_info, to enable this feature specifically for R-Car Gen3 now and later extend it to RZ/G2L. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Add internal delay hw feature to struct ravb_hw_infoBiju Das1-0/+3
R-Car Gen3 supports TX and RX clock internal delay modes, whereas R-Car Gen2 and RZ/G2L do not support it. Add an internal_delay hw feature bit to struct ravb_hw_info to enable this only for R-Car Gen3. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Add net_features and net_hw_features to struct ravb_hw_infoBiju Das1-0/+2
On R-Car the checksum calculation on RX frames is done by the E-MAC module, whereas on RZ/G2L it is done by the TOE. TOE calculates the checksum of received frames from E-MAC and outputs it to DMAC. TOE also calculates the checksum of transmission frames from DMAC and outputs it E-MAC. Add net_features and net_hw_features to struct ravb_hw_info, to support subsequent SoCs without any code changes in the ravb_probe function. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Add gstrings_stats and gstrings_size to struct ravb_hw_infoBiju Das1-0/+2
The device stats strings for R-Car and RZ/G2L are different. R-Car provides 30 device stats, whereas RZ/G2L provides only 15. In addition, RZ/G2L has stats "rx_queue_0_csum_offload_errors" instead of "rx_queue_0_missed_errors". Add structure variables gstrings_stats and gstrings_size to struct ravb_hw_info, so that subsequent SoCs can be added without any code changes in the ravb_get_strings function. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Add stats_len to struct ravb_hw_infoBiju Das1-0/+1
R-Car provides 30 device stats, whereas RZ/G2L provides only 15. In addition, RZ/G2L has stats "rx_queue_0_csum_offload_errors" instead of "rx_queue_0_missed_errors". Replace RAVB_STATS_LEN macro with a structure variable stats_len to struct ravb_hw_info, to support subsequent SoCs without any code changes to the ravb_get_sset_count function. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Add max_rx_len to struct ravb_hw_infoBiju Das1-0/+1
The maximum descriptor size that can be specified on the reception side for R-Car is 2048 bytes, whereas for RZ/G2L it is 8096. Add the max_rx_len variable to struct ravb_hw_info for allocating different RX skb buffer sizes for R-Car and RZ/G2L using the netdev_alloc_skb function. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Add aligned_tx to struct ravb_hw_infoBiju Das1-0/+1
R-Car Gen2 needs a 4byte aligned address for the transmission buffer, whereas R-Car Gen3 doesn't have any such restriction. Add aligned_tx to struct ravb_hw_info to select the driver to choose between aligned and unaligned tx buffers. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Add struct ravb_hw_info to driver dataBiju Das1-0/+6
The DMAC and EMAC blocks of Gigabit Ethernet IP found on RZ/G2L SoC are similar to the R-Car Ethernet AVB IP. With a few changes in the driver we can support both IPs. This patch adds the struct ravb_hw_info to hold hw features, driver data and function pointers to support both the IPs. It also replaces the driver data chip type with struct ravb_hw_info by moving chip type to it. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-19ravb: Use unsigned int for num_tx_desc variable in struct ravb_privateBiju Das1-1/+1
The number of TX descriptors per packet is an unsigned value and the variable for holding this information should be unsigned. This patch replaces the data type of num_tx_desc variable in struct ravb_private from 'int' to 'unsigned int'. This patch also updates the data type of local variables to unsigned int, where the local variables are evaluated using num_tx_desc. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-07-21ravb: Remove extra TABBiju Das1-1/+1
Align the member description comments for struct ravb_desc by removing the extra TAB. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-12net: ethernet: ravb: Enable optional refclkAdam Ford1-0/+1
For devices that use a programmable clock for the AVB reference clock, the driver may need to enable them. Add code to find the optional clock and enable it when available. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-08ravb: update "undocumented" annotationsSergey Shtylyov1-13/+13
The "undocumented" annotations in the EtherAVB driver were done against the R-Car gen2 manuals; most of these registers/bits were then described in the R-Car gen3 manuals -- reflect this fact in the annotations (note that ECSIPR.LCHNGIP was documented in the recent R-Car gen2 manual)... Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-08ravb: remove APSR_DMSergey Shtylyov1-6/+5
According to the R-Car Series, 3rd Generation User's Manual: Hardware, Rev. 1.50, there's no APSR.DM field, instead there are 2 independent RX/TX clock internal delay bits. Follow the suit: remove #define APSR_DM and rename #define's APSR_DM_{R|T}DM to APSR_{R|T}DM. While at it, do several more things to the declaration of *enum* APSR_BIT: - remove superfluous indentation; - annotate APSR_MEMS as undocumented; - annotate APSR as R-Car Gen3 only. Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-01ravb: Add support for explicit internal clock delay configurationGeert Uytterhoeven1-0/+1
Some EtherAVB variants support internal clock delay configuration, which can add larger delays than the delays that are typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps" properties). Historically, the EtherAVB driver configured these delays based on the "rgmii-*id" PHY mode. This caused issues with PHY drivers that implement PHY internal delays properly[1]. Hence a backwards-compatible workaround was added by masking the PHY mode[2]. Add proper support for explicit configuration of the MAC internal clock delays using the new "[rt]x-internal-delay-ps" properties. Fall back to the old handling if none of these properties is present. [1] Commit bcf3440c6dd78bfe ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") [2] Commit 9b23203c32ee02cd ("ravb: Mask PHY mode to avoid inserting delays twice"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-10-01ravb: Split delay handling in parsing and applyingGeert Uytterhoeven1-1/+3
Currently, full delay handling is done in both the probe and resume paths. Split it in two parts, so the resume path doesn't have to redo the parsing part over and over again. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14ravb: implement MTU change while device is upUlrich Hecht1-1/+2
Pre-allocates buffers sufficient for the maximum supported MTU (2026) in order to eliminate the possibility of resource exhaustion when changing the MTU while the device is up. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-06ravb: TROCR register is only present on R-Car Gen3Simon Horman1-1/+1
Only use the TROCR register on R-Car Gen3 as it is not present on other SoCs. Offsets used for the undocumented registers are considered reserved and should not be written to. After some internal investigation with Renesas it remains unclear why this driver accesses these fields on R-Car Gen2 but regardless of what the historical reasons are the current code is considered incorrect. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-06ravb: remove undocumented endianness selectionSimon Horman1-1/+0
This patch removes the use of the undocumented BOC bit of the CCC register. Current documentation for EtherAVB (ravb) describes the offset of what the driver uses as the BOC bit as reserved and that only a value of 0 should be written. After some internal investigation with Renesas it remains unclear why this driver accesses these fields but regardless of what the historical reasons are the current code is considered incorrect. Based on work by Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-06ravb: remove undocumented counter processingSimon Horman1-4/+0
This patch removes the use of the undocumented counter registers CDCR, LCCR, CERCR, CEECR. Offsets used for undocumented registers are considered reserved and should not be written to. After some internal investigation with Renesas it remains unclear why this driver accesses these fields but regardless of what the historical reasons are the current code is considered incorrect. Based on work by Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: David S. Miller <davem@davemloft.net>
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