aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/stmicro/stmmac/common.h (follow)
AgeCommit message (Collapse)AuthorFilesLines
2014-09-01stmmac: fix the rx csum featureGiuseppe CAVALLARO1-0/+1
For new GMACs it is possible to turn-on/off the COE. In the current driver, when disabled the Rx-checksum via ethtool, the tool reported that csum was disabled but the HW continued to set the IPC. Indeed this is because the fix_features allows this. So the patch fixes this problem by adding the set_features. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-31stmmac: fix LPI TW timer value to 20.5us.nandini sharma1-1/+1
The value for LPI TW timer has to be updated to 0x1E that is the hardcoded value of 20.5us and it will apply to all EEE enabled Remote PHYs. Disadvantage is for PHY's that support lesser wakeup time but we can accept it waiting to implement LLDP to negotiate the Wakeup time of Remote PHY. Signed-off-by: nandini sharma <nandini.sharma@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-31stmmac: fix the EEE LPI Macro definitions.nandini sharma1-4/+4
This patch is to fix the definition of macros for EEE otherwise the LPI TX/RX entry/exit cannot be properly managed. Signed-off-by: Nandini Sharma <nandini.sharma@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-29stmmac: fix dma api misuseGiuseppe CAVALLARO1-1/+1
Enabling DMA_API_DEBUG, warnings are reported at runtime because the device driver frees DMA memory with wrong functions and it does not call dma_mapping_error after mapping dma memory. The first problem is fixed by of introducing a flag that helps us keeping track which mapping technique was used, so that we can use the right API for unmap. This approach was inspired by the e1000 driver, which uses a similar technique. Signed-off-by: Andre Draszik <andre.draszik@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Reviewed-by: Denis Kirjanov <kda@linux-powerpc.org> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-07-31net: stmmac: Support devicetree configs for mcast and ucast filter entriesVince Bridgers1-2/+6
This patch adds and modifies code to support multiple Multicast and Unicast Synopsys MAC filter configurations. The default configuration is defined to support legacy driver behavior, which is 64 Multicast bins. The Unicast filter code previously assumed all controllers support 32 or 16 Unicast addresses based on controller version number, but this has been corrected to support a default of 1 Unicast address. The filter configuration may be specified through the devicetree using a Synopsys specific device tree entry. This information was verified with Synopsys through Synopsys Support Case #8000684337 and shared with the maintainer. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-07-31net: stmmac: Correct set_filter for multicast and unicast casesVince Bridgers1-1/+1
This patch removes the check for the number of mulitcast addresses when using hash based filtering since it's not necessary. If the number of multicast addresses in the list exceeds the number of multicast hash bins, the bins will "fold" over into one of the bins configured and enabled for the particular component instance. The default number of maximum unicast addresses was changed from 32 to 1 since this number is not dependent on the component revision. The maximum number of multicast and unicast addresses is dependent on the configuration of the Synopsys EMAC configured by the SOC architect at the time the features were selected and configured for a particular component. Sadly, Synopsys does not provide a way to query the precise number supported by a particular component, so we must fall back on a devicetree entry. This configuration could vary from vendor to vendor (such as STMicro, Altera, etc). The multicast bins are set for every possible filtering case (including no entries) - previously the bits were set only if multicast filter entries were present. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-07-31net: stmmac: Change MAC interface to support multiple filter configurationsVince Bridgers1-19/+22
The synopsys EMAC can be configured for different numbers of multicast hash bins and perfect filter entries at device creation time and there's no way to query this configuration information at runtime. As a result, a devicetree parameter is required in order for the driver to program these filters correctly for a particular device instance. This patch modifies the 10/100/1000 MAC software interface such that these configuration parameters can be set at initialization time. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-11stmmac: fix chained modeGiuseppe CAVALLARO1-14/+6
This patch is to fix the chain mode that was broken and generated a panic. This patch reviews the chain/ring modes now shaing the same structure and taking care about the pointers and callbacks. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-01-21stmmac: Fix kernel crashes for jumbo framesVince Bridgers1-1/+3
These changes correct the following issues with jumbo frames on the stmmac driver: 1) The Synopsys EMAC can be configured to support different FIFO sizes at core configuration time. There's no way to query the controller and know the FIFO size, so the driver needs to get this information from the device tree in order to know how to correctly handle MTU changes and setting up dma buffers. The default max-frame-size is as currently used, which is the size of a jumbo frame. 2) The driver was enabling Jumbo frames by default, but was not allocating dma buffers of sufficient size to handle the maximum possible packet size that could be received. This led to memory corruption since DMAs were occurring beyond the extent of the allocated receive buffers for certain types of network traffic. kernel BUG at net/core/skbuff.c:126! Internal error: Oops - BUG: 0 [#1] SMP ARM Modules linked in: CPU: 0 PID: 563 Comm: sockperf Not tainted 3.13.0-rc6-01523-gf7111b9 #31 task: ef35e580 ti: ef252000 task.ti: ef252000 PC is at skb_panic+0x60/0x64 LR is at skb_panic+0x60/0x64 pc : [<c03c7c3c>] lr : [<c03c7c3c>] psr: 60000113 sp : ef253c18 ip : 60000113 fp : 00000000 r10: ef3a5400 r9 : 00000ebc r8 : ef3a546c r7 : ee59f000 r6 : ee59f084 r5 : ee59ff40 r4 : ee59f140 r3 : 000003e2 r2 : 00000007 r1 : c0b9c420 r0 : 0000007d Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 10c5387d Table: 2e8ac04a DAC: 00000015 Process sockperf (pid: 563, stack limit = 0xef252248) Stack: (0xef253c18 to 0xef254000) 3c00: 00000ebc ee59f000 3c20: ee59f084 ee59ff40 ee59f140 c04a9cd8 ee8c50c0 00000ebc ee59ff40 00000000 3c40: ee59f140 c02d0ef0 00000056 ef1eda80 ee8c50c0 00000ebc 22bbef29 c0318f8c 3c60: 00000056 ef3a547c ffe2c716 c02c9c90 c0ba1298 ef3a5838 ef3a5838 ef3a5400 3c80: 000020c0 ee573840 000055cb ef3f2050 c053f0e0 c0319214 22b9b085 22d92813 3ca0: 00001c80 004b8e00 ef3a5400 ee573840 ef3f2064 22d92813 ef3f2064 000055cb 3cc0: ef3f2050 c031a19c ef252000 00000000 00000000 c0561bc0 00000000 ff00ffff 3ce0: c05621c0 ef3a5400 ef3f2064 ee573840 00000020 ef3f2064 000055cb ef3f2050 3d00: c053f0e0 c031cad0 c053e740 00000e60 00000000 00000000 ee573840 ef3a5400 3d20: ef0a6e00 00000000 ef3f2064 c032507c 00010000 00000020 c0561bc0 c0561bc0 3d40: ee599850 c032799c 00000000 ee573840 c055a380 ef3a5400 00000000 ef3f2064 3d60: ef3f2050 c032799c 0101c7c0 2b6755cb c059a280 c030e4d8 000055cb ffffffff 3d80: ee574fc0 c055a380 ee574000 ee573840 00002b67 ee573840 c03fe9c4 c053fa68 3da0: c055a380 00001f6f 00000000 ee573840 c053f0e0 c0304fdc ef0a6e01 ef3f2050 3dc0: ee573858 ef031000 ee573840 c03055d8 c0ba0c40 ef000f40 00100100 c053f0dc 3de0: c053ffdc c053f0f0 00000008 00000000 ef031000 c02da948 00001140 00000000 3e00: c0563c78 ef253e5f 00000020 ee573840 00000020 c053f0f0 ef313400 ee573840 3e20: c053f0e0 00000000 00000000 c05380c0 ef313400 00001000 00000015 c02df280 3e40: ee574000 ef001e00 00000000 00001080 00000042 005cd980 ef031500 ef031500 3e60: 00000000 c02df824 ef031500 c053e390 c0541084 f00b1e00 c05925e8 c02df864 3e80: 00001f5c ef031440 c053e390 c0278524 00000002 00000000 c0b9eb48 c02df280 3ea0: ee8c7180 00000100 c0542ca8 00000015 00000040 ef031500 ef031500 ef031500 3ec0: c027803c ef252000 00000040 000000ec c05380c0 c0b9eb40 c0b9eb48 c02df940 3ee0: ef060780 ffffa4dd c0564a9c c056343c 002e80a8 00000080 ef031500 00000001 3f00: c053808c ef252000 fffec100 00000003 00000004 002e80a8 0000000c c00258f0 3f20: 002e80a8 c005e704 00000005 00000100 c05634d0 c0538080 c05333e0 00000000 3f40: 0000000a c0565580 c05380c0 ffffa4dc c05434f4 00400100 00000004 c0534cd4 3f60: 00000098 00000000 fffec100 002e80a8 00000004 002e80a8 002a20e0 c0025da8 3f80: c0534cd4 c000f020 fffec10c c053ea60 ef253fb0 c0008530 0000ffe2 b6ef67f4 3fa0: 40000010 ffffffff 00000124 c0012f3c 0000ffe2 002e80f0 0000ffe2 00004000 3fc0: becb6338 becb6334 00000004 00000124 002e80a8 00000004 002e80a8 002a20e0 3fe0: becb6300 becb62f4 002773bb b6ef67f4 40000010 ffffffff 00000000 00000000 [<c03c7c3c>] (skb_panic+0x60/0x64) from [<c02d0ef0>] (skb_put+0x4c/0x50) [<c02d0ef0>] (skb_put+0x4c/0x50) from [<c0318f8c>] (tcp_collapse+0x314/0x3ec) [<c0318f8c>] (tcp_collapse+0x314/0x3ec) from [<c0319214>] (tcp_try_rmem_schedule+0x1b0/0x3c4) [<c0319214>] (tcp_try_rmem_schedule+0x1b0/0x3c4) from [<c031a19c>] (tcp_data_queue+0x480/0xe6c) [<c031a19c>] (tcp_data_queue+0x480/0xe6c) from [<c031cad0>] (tcp_rcv_established+0x180/0x62c) [<c031cad0>] (tcp_rcv_established+0x180/0x62c) from [<c032507c>] (tcp_v4_do_rcv+0x13c/0x31c) [<c032507c>] (tcp_v4_do_rcv+0x13c/0x31c) from [<c032799c>] (tcp_v4_rcv+0x718/0x73c) [<c032799c>] (tcp_v4_rcv+0x718/0x73c) from [<c0304fdc>] (ip_local_deliver+0x98/0x274) [<c0304fdc>] (ip_local_deliver+0x98/0x274) from [<c03055d8>] (ip_rcv+0x420/0x758) [<c03055d8>] (ip_rcv+0x420/0x758) from [<c02da948>] (__netif_receive_skb_core+0x44c/0x5bc) [<c02da948>] (__netif_receive_skb_core+0x44c/0x5bc) from [<c02df280>] (netif_receive_skb+0x48/0xb4) [<c02df280>] (netif_receive_skb+0x48/0xb4) from [<c02df824>] (napi_gro_flush+0x70/0x94) [<c02df824>] (napi_gro_flush+0x70/0x94) from [<c02df864>] (napi_complete+0x1c/0x34) [<c02df864>] (napi_complete+0x1c/0x34) from [<c0278524>] (stmmac_poll+0x4e8/0x5c8) [<c0278524>] (stmmac_poll+0x4e8/0x5c8) from [<c02df940>] (net_rx_action+0xc4/0x1e4) [<c02df940>] (net_rx_action+0xc4/0x1e4) from [<c00258f0>] (__do_softirq+0x12c/0x2e8) [<c00258f0>] (__do_softirq+0x12c/0x2e8) from [<c0025da8>] (irq_exit+0x78/0xac) [<c0025da8>] (irq_exit+0x78/0xac) from [<c000f020>] (handle_IRQ+0x44/0x90) [<c000f020>] (handle_IRQ+0x44/0x90) from [<c0008530>] (gic_handle_irq+0x2c/0x5c) [<c0008530>] (gic_handle_irq+0x2c/0x5c) from [<c0012f3c>] (__irq_usr+0x3c/0x60) 3) The driver was setting the dma buffer size after allocating dma buffers, which caused a system panic when changing the MTU. BUG: Bad page state in process ifconfig pfn:2e850 page:c0b72a00 count:0 mapcount:0 mapping: (null) index:0x0 page flags: 0x200(arch_1) Modules linked in: CPU: 0 PID: 566 Comm: ifconfig Not tainted 3.13.0-rc6-01523-gf7111b9 #29 [<c001547c>] (unwind_backtrace+0x0/0xf8) from [<c00122dc>] (show_stack+0x10/0x14) [<c00122dc>] (show_stack+0x10/0x14) from [<c03c793c>] (dump_stack+0x70/0x88) [<c03c793c>] (dump_stack+0x70/0x88) from [<c00b2620>] (bad_page+0xc8/0x118) [<c00b2620>] (bad_page+0xc8/0x118) from [<c00b302c>] (get_page_from_freelist+0x744/0x870) [<c00b302c>] (get_page_from_freelist+0x744/0x870) from [<c00b40f4>] (__alloc_pages_nodemask+0x118/0x86c) [<c00b40f4>] (__alloc_pages_nodemask+0x118/0x86c) from [<c00b4858>] (__get_free_pages+0x10/0x54) [<c00b4858>] (__get_free_pages+0x10/0x54) from [<c00cba1c>] (kmalloc_order_trace+0x24/0xa0) [<c00cba1c>] (kmalloc_order_trace+0x24/0xa0) from [<c02d199c>] (__kmalloc_reserve.isra.21+0x24/0x70) [<c02d199c>] (__kmalloc_reserve.isra.21+0x24/0x70) from [<c02d240c>] (__alloc_skb+0x68/0x13c) [<c02d240c>] (__alloc_skb+0x68/0x13c) from [<c02d3930>] (__netdev_alloc_skb+0x3c/0xe8) [<c02d3930>] (__netdev_alloc_skb+0x3c/0xe8) from [<c0279378>] (stmmac_open+0x63c/0x1024) [<c0279378>] (stmmac_open+0x63c/0x1024) from [<c02e18cc>] (__dev_open+0xa0/0xfc) [<c02e18cc>] (__dev_open+0xa0/0xfc) from [<c02e1b40>] (__dev_change_flags+0x94/0x158) [<c02e1b40>] (__dev_change_flags+0x94/0x158) from [<c02e1c24>] (dev_change_flags+0x18/0x48) [<c02e1c24>] (dev_change_flags+0x18/0x48) from [<c0337bc0>] (devinet_ioctl+0x638/0x700) [<c0337bc0>] (devinet_ioctl+0x638/0x700) from [<c02c7aec>] (sock_ioctl+0x64/0x290) [<c02c7aec>] (sock_ioctl+0x64/0x290) from [<c0100890>] (do_vfs_ioctl+0x78/0x5b8) [<c0100890>] (do_vfs_ioctl+0x78/0x5b8) from [<c0100e0c>] (SyS_ioctl+0x3c/0x5c) [<c0100e0c>] (SyS_ioctl+0x3c/0x5c) from [<c000e760>] The fixes have been verified using reproducible, automated testing. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-01-16drivers/net: delete non-required instances of include <linux/init.h>Paul Gortmaker1-1/+0
None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. This covers everything under drivers/net except for wireless, which has been submitted separately. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-09-24stmicro: Remove extern from function prototypesJoe Perches1-6/+6
There are a mix of function prototypes with and without extern in the kernel sources. Standardize on not using extern for function prototypes. Function prototypes don't need to be written with extern. extern is assumed by the compiler. Its use is as unnecessary as using auto to declare automatic/local variables in a block. Signed-off-by: Joe Perches <joe@perches.com>
2013-07-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-2/+2
Conflicts: drivers/net/ethernet/freescale/fec_main.c drivers/net/ethernet/renesas/sh_eth.c net/ipv4/gre.c The GRE conflict is between a bug fix (kfree_skb --> kfree_skb_list) and the splitting of the gre.c code into seperate files. The FEC conflict was two sets of changes adding ethtool support code in an "!CONFIG_M5272" CPP protected block. Finally the sh_eth.c conflict was between one commit add bits set in the .eesr_err_check mask whilst another commit removed the .tx_error_check member and assignments. Signed-off-by: David S. Miller <davem@davemloft.net>
2013-07-02stmmac: dity-up and rework the driver debug levelsGiuseppe CAVALLARO1-10/+0
Prior this patch, the internal debugging was based on ifdef and also some printk were useless because many info are exposed via ethtool. This patch remove all the ifdef defines and now we only use netif_msg_XXX levels. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-06-19stmmac: fix EEE setupGiuseppe CAVALLARO1-2/+2
This patch fixes the EEE setup allowing to configure this support when the link changes. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-04-08stmmac: code tidy-upGiuseppe CAVALLARO1-44/+45
This patch tidies up the code. I have run Linden (and verified with checkpatch) many part of the driver trying to reorganize some sections respecting the codying-style rules in the points where it was not done. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-26stmmac: add the support for PTP hw clock driverRayagond Kokatanur1-0/+3
This patch implements PHC (ptp hardware clock) driver for stmmac driver to support 1588 PTP. V2: added support for FINE method, reduced loop delay and review spinlock. Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-26stmmac: add IEEE PTPv1 and PTPv2 support.Rayagond Kokatanur1-2/+20
This patch enhances the stmmac driver to support IEEE 1588-2002 PTP (Precision Time Protocol) version 1 and IEEE 1588-2008 PPT version 2. Precision Time Protocol(PTP),which enables precise synchronization of clocks in measurement and control systems implemented with technologies such as network communication,local computing, & distributed objects. Both PTPv1 and PTPv2 is selected at run-time using the HW capability register. The PTPv1 TimeStamp support can be used on chips that have the normal descriptor structures and PTPv2 TimeStamp support can be used on chips that have the Extended descriptors(DES4-5-6-7). All such sanity checks are done and verified by using HW capability register. V2: in this version the ethtool support has been included in this patch; Koptions have been completely removed (previously added to select PTP and PTPv2). PTPv1 and PTPv2 is now added in a single patch instead of two patches. get_timestamp() and get_systemtime() L/H have been combined into single APIs. Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-26stmmac: initial support to manage pcs modesGiuseppe CAVALLARO1-0/+21
This patch adds the minimal support to manage the PCS modes (RGMII/SGMII) and restart the ANE. Both TBI and RTBI are not yet supported. Thanks to Byungho that wrote some part of this code and tested SGMII too. The only thing to be fixed is the get/set pause in ethtool. Signed-off-by: Byungho An <bh74.an@samsung.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-26stmmac: start adding pcs and rgmii core irqGiuseppe CAVALLARO1-11/+14
This patch starts adding in the main ISR the management of the PCS and RGMII/SGMII core interrupts. This is to help further development on this area. Currently the core irq handler only clears the PCS and S-R_MII interrupts and reports the event in the ethtool stats. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Tested-by: Byungho An <bh74.an@samsung.com> Cc: Udit Kumar <udit-dlh.kumar@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-26stmmac: support extend descriptorsGiuseppe CAVALLARO1-7/+31
This patch is to support the extend descriptors available in the chips newer than the 3.50. In case of the extend descriptors cannot be supported, at runtime, the driver will continue to work using the old style. In detail, this support extends the main descriptor structure adding new descriptors: 4, 5, 6, 7. The desc4 gives us extra information about the received ethernet payload when it is carrying PTP packets or TCP/UDP/ICMP over IP packets. The descriptors 6 and 7 are used for saving HW L/H timestamps (PTP). V2: this new version removes the Koption added in the first implementation because all the checks now to verify if the extended descriptors are actually supported happen at probe time. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-26stmmac: reorganize chain/ring modes removing KoptionsGiuseppe CAVALLARO1-7/+18
Previously we had two Koptions to decide if the stmmac had to use either a ring or a chain to manage its descriptors. This patch removes the Kernel configuration options and it allow us to use the chain mode by passing a module option. Ring mode continues to be the default. Also with this patch, it will be easier to validate the driver built and guarantee that all the two modes always compile fine. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-26stmmac: add Rx watchdog support to mitigate the DMA irqsGiuseppe CAVALLARO1-3/+14
GMAC devices newer than databook 3.40 has an embedded timer that can be used for mitigating the number of interrupts. So this patch adds this optimizations. At any rate, the Rx watchdog can be disable (on bugged HW) by passing from the platform the riwt_off field. In this implementation the rx timer stored in the Reg9 is fixed to the max value. This will be tuned by using ethtool. V2: added a platform parameter to force to disable the rx-watchdog for example on new core where it is bugged. V3: do not disable NAPI when Rx watchdog is used. V4: a new extra statistic field has been added to show the early receive status in the interrupt handler. This patch also adds an extra check to avoid to call napi_schedule when the DMA_INTR_ENA_RIE bit is disabled in the Interrupt Mask register. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-26stmmac: add the initial tx coalesce schemaGiuseppe CAVALLARO1-6/+16
This patch adds a new schema used for mitigating the number of transmit interrupts. It is based on a SW timer and a threshold value. The timer is used to periodically call the stmmac_tx_clean function; the threshold is used for setting the IC (Interrupt on Completion bit). The ISR will then invoke the poll method. Also the patch improves some ethtool stat fields. V2: review the logic to manage the IC bit in the TDESC that was bugged because it didn't take care about the fragments. Also fix the tx_count_frames that has not to be limited to TX DMA ring. Thanks to Ben Hutchings. V3: removed the spin_lock irqsave/restore as D. Miller suggested. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-08-24stmmac: add header inclusion protectionRayagond Kokatanur1-0/+5
This patch adds "#ifndef __<header>_H" for protecting header from double inclusion. Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-07-01stmmac: add the Energy Efficient Ethernet supportGiuseppe CAVALLARO1-1/+30
This patch adds the Energy Efficient Ethernet support to the stmmac. Please see the driver's documentation for further details about this support in the driver. Thanks also goes to Rayagond Kokatanur for his first implementation. Note: to clearly manage and expose the lpi interrupt status and eee ethtool stats I've had to do some modifications to the driver's design and I found really useful to move other parts of the code (e.g. mmc irq stat) in the main directly. So this means that some core has been reworked to introduce the EEE. v1: initial patch v2: fixed some sparse issues (typos) v3: erroneously sent the v2 renamed as v3 v4: o Fixed the return value of the stmmac_eee_init as suggested by D.Miller o Totally reviewed the ethtool support for EEE o Added a new internal parameter to tune the SW timer for TX LPI. v5: do not change any eee setting in case of the stmmac_ethtool_op_set_eee fails (it has to return -EOPNOTSUPP in that case). Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-05-14stmmac: add mixed burst for DMAGiuseppe CAVALLARO1-2/+2
In mixed burst (MB) mode, the AHB master always initiates the bursts with fixed-size when the DMA requests transfers of size less than or equal to 16 beats. This patch adds the MB support and the flag that can be passed from the platform to select it. MB mode can also give some benefits in terms of performances on some platforms. v2: fixed Coding Style Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-05-14stmmac: extend mac addr reg and fix perfect fileringGiuseppe CAVALLARO1-1/+1
This patch is to extend the number of MAC address registers for 16 to 32. In fact, other new 16 registers are available in new chips and this can help on perfect filter mode for unicast. This patch also fixes the perfect filtering mode by setting the bit 31 in the MAC address registers. v2: fixed Coding Style. Signed-off-by: Gianni Antoniazzi <gianni.antoniazzi-ext@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19stmmac: verify the dma_cfg platform fieldsGiuseppe CAVALLARO1-0/+1
Recently the dma parameters that can be passed from the platform have been moved from the plat_stmmacenet_data to the stmmac_dma_cfg. In case of this new structure is not well allocated the driver can fails. This is an example how this field is managed in ST platforms static struct stmmac_dma_cfg gmac_dma_setting = { .pbl = 32, }; static struct plat_stmmacenet_data stih415_ethernet_platform_data[] = { { .dma_cfg = &gmac_dma_setting, .has_gmac = 1, [snip] This patch so verifies that the dma_cfg passed from the platform. In case of it is NULL there is no reason that the driver has to fail and some default values can be passed. These are ok for all the Synopsys chips and could impact on performances, only. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> cc: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-04stmmac: MDC clock dynamically based on the csr clock inputGiuseppe CAVALLARO1-0/+10
If a specific clk_csr value is passed from the platform this means that the CSR Clock Range selection cannot be changed at run-time and it is fixed (as reported in the driver documentation). Viceversa the driver will try to set the MDC clock dynamically according to the actual clock input. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Reviewed-by: Francesco Virlinzi <francesco.virlinzi@st.com> Reviewed-by: David Laight <david.laight@aculab.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-04stmmac: re-work the internal GMAC DMA platf parametersDeepak SIKRI1-1/+2
This patch re-works the internal GMAC DMA parameters passed from the platform. In the past, we only passed the pbl but, with new core, other parameters can be passed and are mandatory on some platforms. New parameters are documented in stmmac.txt because this patch has an impact for many platforms. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-04stmmac: sanitize the rx coe and add the type-1 csum (v2)Deepak SIKRI1-3/+3
This patch sanities the RX coe and adds the Type-1 Rx checksum offload engine (COE). So the RX COE can be passed through the platform but can be fixed at run-time in case of the core has the HW capability register. Also to support the Type-1 Rx COE the driver must append the HW checksum at the end of payload in case the Rx checksum engine was used to offload the HW checksum. This v2 version also fixes the IPC that has to be enabled and verified. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-02-15stmmac: do not discard frame on dribbling bit assertGiuseppe CAVALLARO1-0/+1
If this bit is set and the CRC error is reset, then the packet is valid. Only report this as stat info. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-12-21stmmac: add the experimental PCI supportGiuseppe CAVALLARO1-0/+7
This patch adds the PCI support (as EXPERIMENTAL) this has been also tested on XLINX XC2V3000 FF1152AMT0221 D1215994A VIRTEX FPGA board. To support the PCI bus the main part has been reworked and both the platform and the PCI specific parts have been moved into different files. Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-10-27stmmac: update normal descriptor structure (v2)Giuseppe CAVALLARO1-4/+4
This patch updates the normal descriptor structure to work fine on new GMAC Synopsys chips. Normal descriptors were designed on the old MAC10/100 databook 1.91 where some bits were reserved: for example the tx checksum insertion and rx checksum offload. The patch maintains the back-compatibility with old MAC devices (tested on STx7109 MAC10/100) and adds new fields that actually new GMAC devices can use. For example, STx7109 (MAC10/100) will pass from the platform tx_coe = 0, enh_desc = 0, has_gmac = 0. A platform like Loongson1B (GMAC) will pass: tx_coe = 1, enh_desc = 0, has_gmac = 1. Thanks to Kelvin, he enhanced the normal descriptors for GMAC (on MIPS Loongson1B platform). Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-10-19stmmac: add CHAINED descriptor mode support (V4)Giuseppe CAVALLARO1-0/+13
This patch enhances the STMMAC driver to support CHAINED mode of descriptor. STMMAC supports DMA descriptor to operate both in dual buffer(RING) and linked-list(CHAINED) mode. In RING mode (default) each descriptor points to two data buffer pointers whereas in CHAINED mode they point to only one data buffer pointer. In CHAINED mode each descriptor will have pointer to next descriptor in the list, hence creating the explicit chaining in the descriptor itself, whereas such explicit chaining is not possible in RING mode. First version of this work has been done by Rayagond. Then the patch has been reworked avoiding ifdef inside the C code. A new header file has been added to define all the functions needed for managing enhanced and normal descriptors. In fact, these have to be specialized according to the ring/chain usage. Two new C files have been also added to implement the helper routines needed to manage: jumbo frames, chain and ring setup (i.e. desc3). Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-10-19stmmac: use predefined macros for HW cap register fields (V4)Rayagond Kokatanur1-0/+30
Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-09-15stmmac: add HW DMA feature register (v3)Giuseppe CAVALLARO1-0/+33
New GMAC chips have an extra register to indicate the presence of the optional features/functions of the DMA core. This patch adds this support and all the HW cap are exported via debugfs. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-09-15stmmac: rework the code to get the Synopsys ID (v3)Giuseppe CAVALLARO1-0/+1
The Synopsys ID is now passed from the MAC core to the main. This info will be used for managing the HW cap register (supported in the new GMAC generations). Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-09-15stmmac: add MMC support exported via ethtool (v3)Giuseppe CAVALLARO1-0/+1
This patch adds the MMC management counters support. MMC module is an extension of the register address space and all the hardware counters can be accessed via ethtoo -S ethX. Note that, the MMC interrupts remain masked and the logic to handle this kind of interrupt will be added later (if actually useful). Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-09-15stmmac: remove the mmc code (v3)Giuseppe CAVALLARO1-11/+0
DWMAC Management Counters (MMC) are not fully support. The minimal support added in the past allowed to only disable counters (if present) and mask their interrupts. This patch prepares the driver to support the MMC removing obsolete code. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-08-11stmmac: Move the STMicroelectronics driverJeff Kirsher1-0/+252
Move the STMicroelectronics driver into driver/net/ethernet/stmicro/ and make the necessary Kconfig and Makefile changes. CC: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.