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2019-08-30net: sgi: ioc3-eth: Fix IPG settingsThomas Bogendoerfer1-2/+2
The half/full duplex settings for inter packet gap counters/timer were reversed. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: use csum_foldThomas Bogendoerfer1-5/+1
replace open coded checksum folding by csum_fold. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: use dma-direct for dma allocationsThomas Bogendoerfer1-33/+113
Replace the homegrown DMA memory allocation, which only works on SGI-IP27 machines, with the generic dma allocations. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: refactor rx buffer allocationThomas Bogendoerfer1-50/+45
Move common code for rx buffer setup into ioc3_alloc_skb and deal with allocation failures. Also clean up allocation size calculation. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: split ring cleaning/freeing and allocationThomas Bogendoerfer1-15/+13
Do tx ring cleaning and freeing of rx buffers, when chip is shutdown and allocate buffers before bringing chip up. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: introduce chip start functionThomas Bogendoerfer1-20/+29
ioc3_init did everything from reset to init rings to starting the chip. This change move out chip start into a new function as preparation for easier handling of receive buffer allocation failures. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: separate tx and rx ring handlingThomas Bogendoerfer1-12/+8
After allocation of descriptor memory is now done once in probe handling of tx ring is completely done by ioc3_clean_tx_ring. So we remove the remaining tx ring actions out of ioc3_alloc_rings and ioc3_free_rings and rename it to ioc3_[alloc|free]_rx_bufs to better describe what they are doing. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: get rid of ioc3_clean_rx_ring()Thomas Bogendoerfer1-21/+1
Move clearing of the descriptor valid bit into ioc3_alloc_rings. This makes ioc3_clean_rx_ring obsolete. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: allocate space for desc rings only onceThomas Bogendoerfer1-53/+52
Memory for descriptor rings are allocated/freed, when interface is brought up/down. Since the size of the rings is not changeable by hardware, we now allocate rings now during probe and free it, when device is removed. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: use defines for constants dealing with desc ringsThomas Bogendoerfer1-18/+24
Descriptor ring sizes of the IOC3 are more or less fixed size. To make clearer where there is a relation to ring sizes use defines. Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30net: sgi: ioc3-eth: remove checkpatch errors/warningThomas Bogendoerfer1-145/+130
Before massaging the driver further fix oddities found by checkpatch like - wrong indention - comment formatting - use of printk instead or netdev_xxx/pr_xxx Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30MIPS: SGI-IP27: restructure ioc3 register accessThomas Bogendoerfer1-233/+185
Break up the big ioc3 register struct into functional pieces to make use in sub-function drivers more straightforward. And while doing that get rid of all volatile access by using readX/writeX. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: spider_net: Use struct_size() helperGustavo A. R. Silva1-4/+2
One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct spider_net_card { ... struct spider_net_descr darray[0]; }; Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. So, replace the following form: sizeof(struct spider_net_card) + (tx_descriptors + rx_descriptors) * sizeof(struct spider_net_descr) with: struct_size(card, darray, tx_descriptors + rx_descriptors) Notice that, in this case, variable alloc_size is not necessary, hence it is removed. Building: allmodconfig powerpc. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add support for EEE on RTL8125Heiner Kallweit1-0/+24
This adds EEE support for RTL8125 based on the vendor driver. Supported is EEE for 100Mbps and 1Gbps. Realtek recommended to not yet enable EEE for 2.5Gbps due to potential compatibility issues. Also ethtool doesn't support yet controlling EEE for 2.5Gbps and 5Gbps. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add RTL8125 PHY initializationHeiner Kallweit1-3/+127
This patch adds PHY initialization magic copied from the r8125 vendor driver. In addition it supports loading the firmware for chip version RTL_GIGA_MAC_VER_61. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add support for RTL8125Heiner Kallweit2-18/+265
This adds support for 2.5Gbps chip RTL8125, it's partially based on the r8125 vendor driver. Tested with a Delock 89531 PCIe card against a Netgear GS110MX Multi-Gig switch. Firmware isn't strictly needed, but on some systems there may be compatibility issues w/o firmware. Firmware has been submitted to linux-firmware. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: don't use bit LastFrag in tx descriptor after sendHeiner Kallweit1-1/+1
On RTL8125 this bit is always cleared after send. Therefore check for tx_skb->skb being set what is functionally equivalent. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: read common register for PCI commitHeiner Kallweit1-1/+1
RTL8125 uses a different register number for IntrMask. To net have side effects by reading a random register let's use a register that is the same on all supported chip families. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: move disabling interrupt coalescing to RTL8169/RTL8168 initHeiner Kallweit1-2/+6
RTL8125 doesn't support the same coalescing registers, therefore move this initialization to the 8168/6169-specific init. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: factor out reading MAC address from registersHeiner Kallweit1-3/+10
For RTL8125 we will have to read the MAC address also from another register range, therefore create a small helper. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: restrict rtl_is_8168evl_up to RTL8168 chip versionsHeiner Kallweit1-1/+2
Extend helper rtl_is_8168evl_up to properly work once we add mac version numbers >51 for RTL8125. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: change interrupt mask type to u32Heiner Kallweit1-5/+11
RTL8125 uses a 32 bit interrupt mask even though only bits in the lower 16 bits are used. Change interrupt mask size to u32 to be prepared and reintroduce helper rtl_get_events. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29Merge tag 'mlx5-updates-2019-08-22' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linuxDavid S. Miller20-112/+280
Saeed Mahameed says: ==================== mlx5-updates-2019-08-22 Misc updates for mlx5e net device driver 1) Maxim and Tariq add the support for LAG TX port affinity distribution When VF LAG is enabled, VFs netdevs will round-robin the TX affinity of their tx queues among the different LAG ports. 2) Aya adds the support for ip-in-ip RSS. 3) Marina adds the support for ip-in-ip TX TSO and checksum offloads. 4) Moshe adds a device internal drop counter to mlx5 ethtool stats. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: not allow SSU loopback while execute ethtool -t devYufeng Mo4-2/+75
The current loopback mode is to add 0x1F to the SMAC address as the DMAC address and enable the promiscuous mode. However, if the VF address is the same as the DMAC address, the loopback test fails. Loopback can be enabled in three places: SSU, MAC, and serdes. By default, SSU loopback is enabled, so if the SMAC and the DMAC are the same, the packets are looped back in the SSU. If SSU loopback is disabled, packets can reach MAC even if SMAC is the same as DMAC. Therefore, this patch disables the SSU loopback before the loopback test. In this way, the SMAC and DMAC can be the same, and the promiscuous mode does not need to be enabled. And this is not valid in version 0x20. This patch also uses a macro to replace 0x1F. Fixes: c39c4d98dc65 ("net: hns3: Add mac loopback selftest support in hns3 driver") Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: check reset interrupt status when reset failsHuazhong Tan2-4/+4
Currently, the reset interrupt will be cleared firstly, so when reset fails, if interrupt status register has reset interrupt, it means there is a new coming reset. Fixes: 72e2fb07997c ("net: hns3: clear reset interrupt status in hclge_irq_handle()") Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: add phy selftest functionYufeng Mo2-19/+138
Currently, the loopback test supports only mac selftest and serdes selftest. This patch adds phy selftest. Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: implement .process_hw_error for hns3 clientWeihang Li7-2/+78
When hardware or IMP get specified error it may need the client to take some special operations. This patch implements the hns3 client's process_hw_errorx. Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: optimize waiting time for TQP resetZhongzhu Liu2-5/+7
This patch optimizes the waiting time for TQP reset. Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com> Reviewed-by: Yunsheng Lin <linyunsheng@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: fix incorrect type in assignment.Guojia Liao2-18/+30
This patch fixes some incorrect type in assignment reported by sparse. Those sparse warning as below: - warning : restricted __le16 degrades to integer - warning : cast from restricted __le32 - warning : expected restricted __le32 - warning : cast from restricted __be32 - warning : cast from restricted __be16 - warning : cast to restricted __le16 Signed-off-by: Guojia Liao <liaoguojia@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: make some reusable codes into a functionYonglong Liu1-26/+28
In hclge_dcb.c, these pair of codes: hclge_notify_client(hdev, HNAE3_DOWN_CLIENT); hclge_notify_client(hdev, HNAE3_UNINIT_CLIENT); and hclge_notify_client(hdev, HNAE3_INIT_CLIENT); hclge_notify_client(hdev, HNAE3_UP_CLIENT); are called many times, so make them into a function. Signed-off-by: Yonglong Liu <liuyonglong@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: optimize some log printingsYufeng Mo3-29/+30
To better identify abnormal conditions, this patch modifies or adds some logs to show driver status more accurately. Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: reduce the parameters of some functionsGuojia Liao1-14/+14
This patch simplifies parameters of some functions by deleting unused parameter. Signed-off-by: Guojia Liao <liaoguojia@huawei.com> Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: modify base parameter of kstrtouint in hclge_dbg_dump_tm_mapHuazhong Tan1-3/+4
This patch replaces kstrtouint()'s patameter base with 0 in the hclge_dbg_dump_tm_mac(), which makes it more flexible. Also uses a macro to replace string "dump tm map", since it has been used multiple times. Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: use macro instead of magic numberHuazhong Tan2-3/+6
This patch uses macro to replace some magic number. Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: code optimization for debugfs related to "dump reg"Zhongzhu Liu2-110/+132
For making the code more readable, this patch uses a array to keep the information about the dumping register, and then uses it to parse the parameter cmd_buf which passing into hclge_dbg_dump_reg_cmd(). Also replaces parameter "base" of kstrtouint with 0 in the hclge_dbg_dump_reg_common(), which makes it more flexible. Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29dpaa2-eth: Add pause frame supportIoana Radulescu6-13/+177
Starting with firmware version MC10.18.0, we have support for L2 flow control. Asymmetrical configuration (Rx or Tx only) is supported, but not pause frame autonegotioation. Pause frame configuration is done via ethtool. By default, we start with flow control enabled on both Rx and Tx. Changes are propagated to hardware through firmware commands, using two flags (PAUSE, ASYM_PAUSE) to specify Rx and Tx pause configuration, as follows: PAUSE | ASYM_PAUSE | Rx pause | Tx pause ---------------------------------------- 0 | 0 | disabled | disabled 0 | 1 | disabled | enabled 1 | 0 | enabled | enabled 1 | 1 | enabled | disabled The hardware can automatically send pause frames when the number of buffers in the pool goes below a predefined threshold. Due to this, flow control is incompatible with Rx frame queue taildrop (both mechanisms target the case when processing of ingress frames can't keep up with the Rx rate; for large frames, the number of buffers in the pool may never get low enough to trigger pause frames as long as taildrop is enabled). So we set pause frame generation and Rx FQ taildrop as mutually exclusive. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29dpaa2-eth: Use stored link settingsIoana Radulescu2-14/+7
Whenever a link state change occurs, we get notified and save the new link settings in the device's private data. In ethtool get_link_ksettings, use the stored state instead of interrogating the firmware each time. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29dpaa2-eth: Remove support for changing link settingsIoana Radulescu1-50/+1
We only support fixed-link for now, so there is no point in offering users the option to change link settings via ethtool. Functionally there is no change, since firmware prevents us from changing link parameters anyway. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-28mlxsw: spectrum_ptp: Add counters for GC eventsPetr Machata4-1/+132
On Spectrum-1, timestamped PTP packets and the corresponding timestamps need to be kept in caches until both are available, at which point they are matched up and packets forwarded as appropriate. However, not all packets will ever see their timestamp, and not all timestamps will ever see their packet. It is necessary to dispose of such abandoned entries, so a garbage collector was introduced in commit 5d23e4159772 ("mlxsw: spectrum: PTP: Garbage-collect unmatched entries"). If these GC events happen often, it is a sign of a problem. However because this whole mechanism is taking place behind the scenes, there is no direct way to determine whether garbage collection took place. Therefore to fix this, on Spectrum-1 only, expose four artificial ethtool counters for the GC events: GCd timestamps and packets, in TX and RX directions. Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-28mlxsw: Bump firmware version to 13.2000.1886Ido Schimmel1-1/+1
The new version supports extended error reporting from firmware via a new TLV in the EMAD packet. Similar to netlink extended ack. It also fixes an issue in the PCI code that can result in false AER errors under high Tx rate. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-28mlxsw: spectrum: Prevent auto negotiation on number of lanesShalom Toledo2-20/+77
After 50G-1-lane and 100G-2-lanes link modes were introduced, the driver is facing situations in which the hardware auto negotiates not only on speed and type, but also on number of lanes. Prevent auto negotiation on number of lanes by allowing only port speeds that can be supported on a given port according to its width. Signed-off-by: Shalom Toledo <shalomt@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-28mlxsw: Remove 56G speed supportAmit Cohen3-31/+0
Commit 275e928f1911 ("mlxsw: spectrum: Prevent force of 56G") prevented the driver from setting a speed of 56G when auto-negotiation is off. This is the only speed supported by mlxsw that cannot be set when auto-negotiation is off, which makes it difficult to write generic tests. Further, the speed is not supported by newer ASICs such as Spectrum-2 and to the best of our knowledge it is not used by current users. Therefore, remove 56G support from mlxsw. Signed-off-by: Amit Cohen <amitc@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-28Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queueDavid S. Miller10-387/+688
Jeff Kirsher says: ==================== 100GbE Intel Wired LAN Driver Updates 2019-08-26 This series contains updates to ice driver only. Usha fixes the statistics reported on 4 port NICs which were reporting the incorrect statistics due to using the incorrect port identifier. Victor fixes an issue when trying to traverse to the first node of a requested layer by adding a sibling head pointer for each layer per traffic class. Anirudh cleans up the locking and logic for enabling and disabling VSI's to make it more consistent. Updates the driver to do dynamic allocation of queue management bitmaps and arrays, rather than statically allocating them which consumes more memory than required. Refactor the logic in ice_ena_msix_range() for clarity and add additional checks for when requested resources exceed what is available. Jesse updates the debugging print statements to make it more useful when dealing with link and PHY related issues. Krzysztof adds a local variable to the VSI rebuild path to improve readability. Akeem limits the reporting of MDD events from VFs so that the kernel log is not clogged up with MDD events which are duplicate or potentially false positives. Fixed a reset issue that would result in the system getting into a state that could only be resolved by a reboot by testing if the VF is in a disabled state during a reset. Michal adds a check to avoid trying to access memory that has not be allocated by checking the number of queue pairs. Jake fixes a static analysis warning due to a cast of a u8 to unsigned long, so just update ice_is_tc_ena() to take a unsigned long so that a cast is not necessary. Colin Ian King fixes a potential infinite loop where a u8 is being compared to an int. Maciej refactors the queue handling functions that work on queue arrays so that the logic can be done for a single queue. Paul adds support for VFs to enable and disable single queues. Henry fixed the order of operations in ice_remove() which was trying to use adminq operations that were already disabled. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-28net/mlx5e: Support TSO and TX checksum offloads for IP-in-IPMarina Varshaver1-0/+11
tunnels Add TX offloads support for IP-in-IP tunneled packets by reporting the needed netdev features. Signed-off-by: Marina Varshaver <marinav@mellanox.com> Signed-off-by: Avihu Hagag <avihuh@mellanox.com> Reviewed-by: Aya Levin <ayal@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-08-28net/mlx5e: Improve stateless offload capability checkMarina Varshaver3-4/+7
Use generic function for checking tunnel stateless offload capability instead of separate macros. Signed-off-by: Marina Varshaver <marinav@mellanox.com> Reviewed-by: Aya Levin <ayal@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-08-28net/mlx5e: Support RSS for IP-in-IP and IPv6 tunneled packetsAya Levin2-1/+49
Add support for inner header RSS on IP-in-IP and IPv6 tunneled packets. Add rules to the steering table regarding outer IP header, with IPv4/6->IP-in-IP. Tunneled packets with protocol numbers: 0x4 (IP-in-IP) and 0x29 (IPv6) are RSS-ed on the inner IP header. Separate FW dependencies between flow table inner IP capabilities and GRE offload support. Allowing this feature even if GRE offload is not supported. Tested with multi stream TCP traffic tunneled with IPnIP. Verified that: Without this patch, only a single RX ring was processing the traffic. With this patch, multiple RX rings were processing the traffic. Verified with and without GRE offload support. Signed-off-by: Aya Levin <ayal@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-08-28net/mlx5e: Change function's position to a more fitting fileAya Levin3-6/+8
Move function which indicates whether tunnel inner flow table is supported from en.h to en_fs.c. It fits better right after tunnel protocol rules definitions. Signed-off-by: Aya Levin <ayal@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-08-28net/mlx5e: Add device out of buffer counterMoshe Shemesh1-13/+25
Added the following packets drop counter: Device out of buffer - counts packets which were dropped due to full device internal receive queue. This counter will be shown on ethtool as a new counter called dev_out_of_buffer. The counter is read from FW by command QUERY_VNIC_ENV. Signed-off-by: Moshe Shemesh <moshe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-08-28net/mlx5e: Support LAG TX port affinity distributionMaxim Mikityanskiy4-22/+53
When the VF LAG is in use, round-robin the TX affinity of channels among the different ports, if supported by the firmware. Create a set of TISes per port, while doing round-robin of the channels over the different sets. Let all SQs of a channel share the same set of TISes. If lag_tx_port_affinity HCA cap bit is supported, num_lag_ports > 1 and we aren't the LACP owner (PF in the regular use), assign the affinities, otherwise use tx_affinity == 0 in TIS context to let the FW assign the affinities itself. The TISes of the LACP owner are mapped only to the native physical port. For VFs, the starting port for round-robin is determined by its vhca_id, because a VF may have only one channel if attached to a single-core VM. Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com> Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Mark Bloch <markb@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-08-28net/mlx5e: Expose new function for TIS destroy loopTariq Toukan3-10/+13
For better modularity and code sharing. Function internal change to be introduced in the next patches. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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