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path: root/drivers/net/phy/bcm7xxx.c (follow)
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2015-06-28net: phy: bcm7xxx: workaround MDIO management controller initial readFlorian Fainelli1-0/+7
The initial MDIO read or write towards the BCM7xxx integrated PHY may fail, workaround this by inserting a dummy MII_BMSR read to force the MDIO management controller to see at least one valid transaction and get out of stuck state out of reset. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-08net: phy: bcm7xxx: update workaround to fix 100BaseT corner casesFlorian Fainelli1-2/+5
Update the AFE_TX_CONFIG value to solve marginal rise/fall issues observed when the link is operating in 100BaseT. This workaround applies to GPHY revisions D0, E0 and newer. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-25net: phy: bcm7xxx: Fix 7425 PHY ID and flagsFlorian Fainelli1-1/+1
While adding support for 7425 PHY in the 7xxx PHY driver, the ID that was used was actually coming from an external PHY: a BCM5461x. Fix this by using the proper ID for the internal 7425 PHY and set the PHY_IS_INTERNAL flag, otherwise consumers of this PHY driver would not be able to properly identify it as such. Fixes: d068b02cfdfc2 ("net: phy: add BCM7425 and BCM7429 PHYs") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Petri Gynther <pgynther@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-03-09net: phy: bcm7xxx: add alternate id for 7439Florian Fainelli1-0/+1
BCM7439 has an alternate PHY OUI: 0xae025080 which is to be found in some variants of this chip. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-08net: phy: bcm7xxx: add an explicit version check for GPHY rev G0Florian Fainelli1-0/+2
GPHY revision G0 has its version rolled over to 0x10, introduce an explicit check for that revision and invoke the proper workaround function for it. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: bcm7xxx: add workaround for PHY revision E0 and F0Florian Fainelli1-0/+29
PHY revisions E0 and F0 share the same shorter workaround initialization sequence. Dedicate a special function for these two PHY revisions to perform the needed workaround sequence. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: bcm7xxx: add PHY revision D0 workaround sequenceFlorian Fainelli1-0/+46
PHY revision D0 requires a specific workaround sequence which needs to be applied to get the HW to behave properly in all corner cases conditions. Do this based on the revision we just read out of the HW using a specific function. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: bcm7xxx: introduce r_rc_cal_reset helperFlorian Fainelli1-5/+10
This function performs a R/RC calibration reset and will start being used by more than one function in the next patches, create a helper function to factor code. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: bcm7xxx: drop A0 revision workaround and fix B0 workaroundFlorian Fainelli1-38/+3
bcm7445_config_init() was working around non-production version of the PHY HW block, so just remove it entirely. bcm7xxx_28nm_afe_config_init() was running for all PHY revisions greater than B0, but this workaround sequence is really specific to the B0 PHY revision, so rename the function accordingly and update the GPHY macro to use the generic config_init callback. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: bcm7xxx: only show PHY revision onceFlorian Fainelli1-1/+2
bcm7xxx_28nm_config_init() can be called as frequently as needed by the PHY library upon suspend/resume cycles and interface bring up/down, just print the PHY revision once and for all in order not to spam kernel logs. Fixes: d8ebfed3f11b ("net: phy: bcm7xxx: utilize PHY revision in config_init") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: replace phy_drivers_register callsJohan Hovold1-14/+1
Replace module init/exit which only calls phy_drivers_register with module_phy_driver macro. Tested using Micrel driver, and otherwise compile-tested only. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-01net: phy: add BCM7425 and BCM7429 PHYsPetri Gynther1-0/+28
Signed-off-by: Petri Gynther <pgynther@google.com> Acked-by: Florian Fainelli <f.fainelli@gmai.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: phy: bcm7xxx: utilize PHY revision in config_initFlorian Fainelli1-6/+15
Now that the GENET and SF2 drivers have been updated to communicate us what is the revision of the BCM7xxx integrated PHY, utilize that information in the config_init() callback to call into the appropriate workaround function based on our revision. While at it, we also print the revision and patch level to help debug new chips. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: phy: bcm7xxx: do not use PHY_BRCM_100MBPS_WARFlorian Fainelli1-2/+2
There is no need for the PHY driver to check PHY_BRCM_100MBPS_WAR since that is redundant with checking the PHY device supported features. Get rid of that workaround flag. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-27net: phy: bcm7xxx: add BCM7250 and BCM7364 PHY entriesFlorian Fainelli1-0/+4
Add two new entries to the Broadcom BCM7xxx internal PHY driver for BCM7250 and BCM7364 chips. Those chips share the usual 28nm process Gigabit PHY sequence and require the same workarounds so far. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-27net: phy: bcm7xxx: introduce helper macroFlorian Fainelli1-36/+18
All 28nm Gigabit PHYs supported by the driver have the same callbacks, the only differences being the 32-bits OUI and the name. Use a macro to factor this, making it easier in the future to add new entries. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-23net: phy: bcm7xxx: enable EEE at the PHY levelFlorian Fainelli1-0/+31
The 28nm Gigabit PHY on BCM7xxx chips comes out of reset with absolutely no EEE capabilities, such that we would actually return that we do not support EEE when accessing 3.20 (MDIO_PCS_EEE_ABLE) registers. Poke through the vendor-specific C45 register to enable EEE globally at the PHY level, and advertise supported EEE modes. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-23net: phy: bcm7xxx: enable auto power downFlorian Fainelli1-1/+26
The 28nm process BCM7xxx internal Gigabit PHYs all support automatic power down, turn on that feature as part of the configuration initialization callback. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-16net: phy: bcm7xxx: remove suspend callback for 28nm PHYsFlorian Fainelli1-4/+1
BCM7xxx internal Gigabit PHY on 28nm process do not need anything special to be done during suspend, remove the suspend callback since it might be harmful rather than useful. While at it, update the comment above bcm7xxx_suspend() to reflect that it applies only to 40nm and 65nm process PHY devices. Fixes: b560a58c45c6 ("net: phy: add Broadcom BCM7xxx internal PHY driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@greenl8ke.davemloft.net>
2014-08-16net: phy: bcm7xxx: re-advertise all supported modes out of suspendFlorian Fainelli1-3/+20
The BCM7xxx internal Gigabit PHYs on 28nm process platforms come out reset without any half-duplex or "hub" compatible advertised modes, which was causing auto-negotiation issues coming out of S3 suspend/resume, we just could not establish a link with a half-duplex only link partner. Make sure that the resume function properly re-configures the PHY device to advertise all supported modes. Fixes: b560a58c45c6 ("net: phy: add Broadcom BCM7xxx internal PHY driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@greenl8ke.davemloft.net>
2014-08-16net: phy: bcm7xxx: remove 28nm wildcard entryFlorian Fainelli1-14/+0
A wildcard entry with the 32-bits OUI 0x600d8400 was added as part of the BCM7xxx internal PHY driver, but that entry might match other PHYs that are not covered by this driver, so let's just remove it. Fixes: b560a58c45c6 ("net: phy: add Broadcom BCM7xxx internal PHY driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@greenl8ke.davemloft.net>
2014-03-26net: phy: bcm7xxx: properly clear AFE_RX_LP_COUNTERFlorian Fainelli1-1/+1
The AFE_RX_LP_COUNTER kept the last 3 bits set, which would not properly clear the EEE LPI mode errors bits. Make sure that those bits are set to 0 to ensure the PHY timing is always good even during EEE wake-up. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-26net: phy: bcm7xxx: fix spurious MDIO failures during workaroundFlorian Fainelli1-15/+15
Writing first to the AFE registers, and then the VCO, RCAL, RC_CAL registers turned out to unveil some spurious MDIO read/write failures which would make the workaround partially applied. The fix is to write first to the VCO, RCAL, RC_CAL registers, and then write to the AFE registers. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-26net: phy: bcm7xxx: define constants for our registersFlorian Fainelli1-11/+27
Define constants for the various registers used in bcm7xxx_28nm_afe_config_init() to help clarify what this workaround is about. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-02-14net: phy: add Broadcom BCM7xxx internal PHY driverFlorian Fainelli1-0/+343
This patch adds support for the Broadcom BCM7xxx Set Top Box SoCs internal PHYs. This driver supports the following generation of SoCs: - BCM7366, BCM7439, BCM7445 (28nm process) - all 40nm and 65nm (older MIPS-based SoCs) The PHYs on these SoCs require a bunch of workarounds to operate correctly, both during configuration time and at suspend/resume time, the driver handles that for us. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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