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2019-05-28igc: Remove the obsolete workaroundSasha Neftin2-58/+3
Enables a resend request after the completion timeout workaround is not relevant for i225 device. This patch is clean code relevant this workaround. Minor cosmetic fixes, replace the 'spaces' with 'tabs' Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-05-28igc: Clean up unused pointersSasha Neftin1-3/+0
Few function pointers from phy_operations structure were unused. This patch cleans those. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-05-28igc: Fix double definitionsSasha Neftin1-3/+0
Collision threshold and threshold's shift has been defined twice. This patch comes to fix that. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-05-28igb: mark expected switch fall-throughGustavo A. R. Silva1-1/+1
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. This patch fixes the following warning: drivers/net/ethernet/intel/igb/e1000_82575.c: In function ‘igb_get_invariants_82575’: drivers/net/ethernet/intel/igb/e1000_82575.c:636:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (igb_sgmii_uses_mdio_82575(hw)) { ^ drivers/net/ethernet/intel/igb/e1000_82575.c:642:2: note: here case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES: ^~~~ Warning level 3 was used: -Wimplicit-fallthrough=3 Notice that, in this particular case, the code comment is modified in accordance with what GCC is expecting to find. This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: "Gustavo A. R. Silva" <gustavo@embeddedor.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-05-28igb: mark expected switch fall-throughGustavo A. R. Silva1-1/+1
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. This patch fixes the following warning: drivers/net/ethernet/intel/igb/igb_main.c: In function ‘__igb_notify_dca’: drivers/net/ethernet/intel/igb/igb_main.c:6694:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (dca_add_requester(dev) == 0) { ^ drivers/net/ethernet/intel/igb/igb_main.c:6701:2: note: here case DCA_PROVIDER_REMOVE: ^~~~ Warning level 3 was used: -Wimplicit-fallthrough=3 Notice that, in this particular case, the code comment is modified in accordance with what GCC is expecting to find. This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: "Gustavo A. R. Silva" <gustavo@embeddedor.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-05-28igb/igc: warn when fatal read failure happensFeng Tang2-0/+2
Failed in read the HW register is very serious for igb/igc driver, as its hw_addr will be set to NULL and cause the adapter be seen as "REMOVED". We saw the error only a few times in the MTBF test for suspend/resume, but can hardly get any useful info to debug. Adding WARN() so that we can get the necessary information about where and how it happens, and use it for root causing and fixing this "PCIe link lost issue" This affects igb, igc. Signed-off-by: Feng Tang <feng.tang@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Acked-by: Sasha Neftin <sasha.neftin@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-05-28fsl/fman: include IPSEC SPI in the Keygen extractionMadalin Bucur1-1/+2
The keygen extracted fields are used as input for the hash that determines the incoming frames distribution. Adding IPSEC SPI so different IPSEC flows can be distributed to different CPUs. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-28net: mvpp2: cls: Check RSS table index validity when creating a contextMaxime Chevallier1-0/+3
Make sure we don't use an out-of-bound index for the per-port RSS context array. As of today, the global context creation in mvpp22_rss_context_create will prevent us from reaching this case, but we should still make sure we are using a sane value anyway. Reported-by: kbuild test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-27enetc: fix le32/le16 degrading to integer warningsY.b. Lu1-7/+9
Fix blow sparse warning introduced by a previous patch. - restricted __le32 degrades to integer - restricted __le16 degrades to integer Fixes: d39823121911 ("enetc: add hardware timestamping support") Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26r8169: remove support for RTL_GIGA_MAC_VER_01Heiner Kallweit1-34/+9
RTL_GIGA_MAC_VER_01 is RTL8169, the ancestor of the chip family. It didn't have an internal PHY and I've never seen it in the wild. What isn't there doesn't need to be maintained, so let's remove support for it. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26r8169: improve RTL8168d PHY initializationHeiner Kallweit1-101/+52
Certain parts of the PHY initialization are the same for sub versions 1 and 2 of RTL8168d. So let's factor this out to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26r8169: change type of member mac_version in rtl8169_privateHeiner Kallweit1-2/+6
Use the appropriate enum type for member mac_version. And don't assign a fixed value to RTL_GIGA_MAC_NONE, there's no benefit in it. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26r8169: remove unneeded return statement in rtl_hw_init_8168gHeiner Kallweit1-2/+1
Remove not needed return statement. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26r8169: remove rtl_hw_init_8168epHeiner Kallweit1-9/+3
rtl_hw_init_8168ep() can be removed, this simplifies the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26cxgb4: Make t4_get_tp_e2c_map staticYueHaibing1-1/+1
Fix sparse warning: drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:6216:14: warning: symbol 't4_get_tp_e2c_map' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26net: phy: bcm87xx: improve bcm87xx_config_init and feature detectionHeiner Kallweit1-12/+8
PHY drivers don't have to and shouldn't fiddle with phylib internals. Most of the code in bcm87xx_config_init() can be removed because phylib takes care. In addition I replaced usage of PHY_10GBIT_FEC_FEATURES with an implementation of the get_features callback. PHY_10GBIT_FEC_FEATURES is used by this driver only and it's questionable whether there will be any other PHY supporting this mode only. Having said that in one of the next kernel versions we may decide to remove it. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26net: phy: tja11xx: Add TJA11xx PHY driverMarek Vasut3-0/+430
Add driver for the NXP TJA1100 and TJA1101 PHYs. These PHYs are special BroadRReach 100BaseT1 PHYs used in automotive. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: Jean Delvare <jdelvare@suse.com> Cc: linux-hwmon@vger.kernel.org Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26net: hns3: fix for FEC configurationJian Shen1-0/+7
The FEC capbility may be changed with port speed changes. Driver needs to read the active FEC mode, and update FEC capability when port speed changes. Fixes: 7e6ec9148a1d ("net: hns3: add support for FEC encoding control") Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26net: hns3: add aRFS support for PFJian Shen4-0/+238
This patch adds aRFS support for PF. The aRFS rules are also stored in the hardware flow director table, Use the existing filter management functions to insert TCPv4/UDPv4/TCPv6/UDPv6 flow director filters. To avoid rule conflict, once user adds flow director rules with ethtool, the aRFS will be disabled, and clear exist aRFS rules. Once all user configure rules were removed, aRFS can work again. Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26net: hns3: refine the flow director handleJian Shen2-32/+112
In order to be compatible with aRFS rules, this patch adds spin_lock for flow director rule adding, deleting, querying, and packages the rule configuration. Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26net: hns3: initialize CPU reverse mappingJian Shen1-29/+48
Allocate CPU rmap and add entry for each irq. CPU rmap is used in aRFS to get the queue number of the rx completion interrupts. In additional, remove the calling of irq_set_affinity_notifier() in hns3_nic_init_irq(), because we have registered notifier in irq_cpu_rmap_add() for each vector, otherwise it may cause use-after-free issue. Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26net: ethernet: add ag71xx driverOleksij Rempel3-1/+1908
Add support for Atheros/QCA AR7XXX/AR9XXX/QCA95XX built-in ethernet mac support Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qed*: Add iWARP 100g supportMichal Kalderon1-0/+31
Add iWARP engine affinity setting for supporting iWARP over 100g. iWARP cannot be distinguished by the LLH from L2, hence the engine division will affect L2 as well. For this reason we add a parameter to devlink to determine the engine division. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qed: Add qed devlink parameters tableMichal Kalderon2-0/+113
The table currently contains a single parameter for configuring whether iWARP should be enabled on a 100g device. Enabling iWARP on a 100g device impacts L2 performance and is therefore not enabled by default. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qed: Set the doorbell address correctlyMichal Kalderon2-12/+19
In 100g mode the doorbell bar is united for both engines. Set the correct offset in the hwfn so that the doorbell returned for RoCE is in the affined hwfn. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Denis Bolotin <denis.bolotin@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qedr: Change the MSI-X vectors selection to be based on affined engineMichal Kalderon1-2/+2
Use the msix vectors of the affined hwfn and not the leading one. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qed: Modify offload protocols to use the affined engineMichal Kalderon4-189/+273
To enable 100g support for offload protocols each PF gets a dedicated engine to work on from the MFW. This patch modifies the code to use the affined hwfn instead of the leading one. The offload protocols require the ll2 to be opened on both engines, and not just the affined hwfn. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qed*: Change hwfn used for sb initializationMichal Kalderon2-21/+29
When initializing status blocks use the affined hwfn instead of the leading one for RDMA / Storage Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qed: Add llh ppfid interface and 100g support for offload protocolsMichal Kalderon11-339/+1203
This patch refactors the current llh implementation. It exposes a hw resource called ppfid (port-pfid) and implements an API for configuring the resource. Default configuration which was used until now limited the number of filters per PF and did not support engine affinity per protocol. The new API enables allocating more filter rules per PF and enables affinitizing protocol packets to a certain engine which enables full 100g protocol offload support. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qed: Modify api for performing a dmae to another PFMichal Kalderon8-39/+52
This patch modifies the dmae API to enable performing a dmae operation to another PF. This enables sharing between the llh entries between PFs and thus increasing the amount of filters per PF under certain configurations. The llh entries require using the dmae since the memory is widebus, which requires atomicity in access. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-25net: mvpp2: cls: Support steering to RSS contextsMaxime Chevallier1-4/+54
When steering to an RXQ, we can perform an extra RSS step to assign a queue from an RSS table. This is done by setting the RSS_EN attribute in the C2 engine. In that case, the RXQ that is assigned is the global RSS context id, that is then translated to an RSS table using the RXQ2RSS table. An example using ethtool to steer to RXQ 2 and 3 would be : ethtool -X eth0 weight 0 0 1 1 context new (This would print the allocated context id, let's say it's 1) ethtool -N eth0 flow-type udp4 dst-port 1234 context 1 loc 0 The hash parameters are the ones that are globally configured for RSS : ethtool -N eth0 rx-flow-hash udp4 sdfn When an RSS context is removed while there are active classification rules using this context, these rules are removed. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-25net: mvpp2: cls: Extract the RSS context when parsing the ethtool ruleMaxime Chevallier1-0/+6
ethtool_rx_flow_rule_create takes into parameter the ethtool flow spec, which doesn't contain the rss context id. We therefore need to extract it ourself before parsing the ethtool rule. The FLOW_RSS flag is only set in info->fs.flow_type, and not info->flow_type. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-25net: mvpp2: cls: Use RSS contexts to handle RSS tablesMaxime Chevallier4-41/+255
The PPv2 controller has 8 RSS tables that are shared across all ports on a given PPv2 instance. The previous implementation allocated one table per port, leaving others unused. By using RSS contexts, we can make use of multiple RSS tables per port, one being the default table (always id 0), the other ones being used as destinations for flow steering, in the same way as rx rings. This commit introduces RSS contexts management in the PPv2 driver. We always reserve one table per port, allocated when the port is probed. The global table list is stored in the struct mvpp2, as it's a global resource. Each port then maintains a list of indices in that global table, that way each port can have it's own numbering scheme starting from 0. One limitation that seems unavoidable is that the hashing parameters are shared across all RSS contexts for a given port. Hashing parameters for ctx 0 will be applied to all contexts. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-25net: mvpp2: cls: Bypass C2 internals FIFOs at initMaxime Chevallier2-0/+8
The C2 TCAM has internal FIFOs that are only useful for the built-in self-tests. Disable these FIFOS at init, as recommended in the functionnal specs. Suggested-by: Alan Winkowski <walan@marvell.com> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-25net: mvpp2: cls: Use the correct number of rules in various placesMaxime Chevallier3-4/+4
As of today, the classification offload implementation only supports 4 different rules to be offloaded. This number has been hardcoded in the rule insertion function, and the wrong define is being used elsewhere. Use the correct #define everywhere to make sure we always check for the correct number of rules. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: Prevent missing interrupts when running NAPIJose Abreu1-0/+3
When we trigger NAPI we are disabling interrupts but in case we receive or send a packet in the meantime, as interrupts are disabled, we will miss this event. Trigger both NAPI instances (RX and TX) when at least one event happens so that we don't miss any interrupts. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwmac4/5: Clear unused address entriesJose Abreu1-2/+8
In case we don't use a given address entry we need to clear it because it could contain previous values that are no longer valid. Found out while running stmmac selftests. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwxgmac2: Do not disable whole RX in dma_stop_rx()Jose Abreu1-4/+0
We don't need to disable the whole RX when dma_stop_rx() is called because there may be the need of just disabling 1 DMA channel. This is also needed for stmmac Flow Control selftest. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwmac4/5: Do not disable whole RX in dma_stop_rx()Jose Abreu1-4/+0
We don't need to disable the whole RX when dma_stop_rx() is called because there may be the need of just disabling 1 DMA channel. This is also needed for stmmac Flow Control selftest. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwmac4/5: Fix Hash FilterJose Abreu2-0/+3
In order for hash filter to work we need to set the HPF bit. Fout out while running stmmac selftests Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwmac1000: Clear unused address entriesJose Abreu1-0/+6
In case we don't use a given address entry we need to clear it because it could contain previous values that are no longer valid. Found out while running stmmac selftests. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwmac1000: Fix Hash FilterJose Abreu1-0/+1
In order for hash filter to work we need to set the HPF bit. Found out while running stmmac selftests. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: Introduce selftests supportJose Abreu5-0/+889
We add support for selftests on stmmac driver with 9 basic sanity checks for now: - MAC Loopback - PHY Loopback - MMC Counters - EEE - Hash Filter Multicast - Perfect Filter Unicast - Multicast Filter All - Unicast Filter All - Flow Control This allows for fast tracking of regressions in the driver and helps in spotting mis-configuration of HW. Changes from v1: - Fix build error as module (David) - Check for link status before running tests Changes from RFC v2: - Return proper error code in stmmac_test_mmc (Corentin) - Use only 1 MMC counter in stmmac_test_mmc (Alexandre) Changes from RFC v1: - Change test_loopback to test_mac_loopback (Andrew) - Change timeout to retries (Andrew) - Add MC/UC filter tests (Andrew) - Only test in offline mode (Andrew) - Do not call phy_loopback twice (Alexandre) Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Corentin Labbe <clabbe.montjoie@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwxgmac2: Also pass control frames while in promisc modeJose Abreu2-1/+2
In order for the selftests to run the Flow Control selftest we need to also pass pause frames to the stack. Pass this type of frames while in promiscuous mode. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwmac4/5: Also pass control frames while in promisc modeJose Abreu2-1/+2
In order for the selftests to run the Flow Control selftest we need to also pass pause frames to the stack. Pass this type of frames while in promiscuous mode. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwmac1000: Also pass control frames while in promisc modeJose Abreu2-1/+2
In order for the selftests to run the Flow Control selftest we need to also pass pause frames to the stack. Pass this type of frames while in promiscuous mode. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: Switch MMC functions to HWIF callbacksJose Abreu7-10/+40
XGMAC has a different MMC module. Lets use HWIF callbacks for MMC module so that correct callbacks are automatically selected. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: ethernet: stmmac: dwmac-sun8i: Enable control of loopbackCorentin Labbe1-0/+13
This patch enable use of set_mac_loopback in dwmac-sun8i Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwxgmac2: Add MAC loopback supportJose Abreu2-0/+14
In preparation for the addition of stmmac selftests we implement the MAC loopback callback in dwxgmac2 core. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-24net: stmmac: dwmac4/5: Add MAC loopback supportJose Abreu2-0/+16
In preparation for the addition of stmmac selftests we implement the MAC loopback callback in dwmac4/5 cores. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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