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2021-03-15net: qualcomm: rmnet: don't use C bit-fields in rmnet checksum headerAlex Elder1-25/+13
Replace the use of C bit-fields in the rmnet_map_ul_csum_header structure with a single two-byte (big endian) structure member, and use masks to encode or get values within it. The content of these fields can be accessed using simple bitwise AND and OR operations on the (host byte order) value of the new structure member. Previously rmnet_map_ipv4_ul_csum_header() would update C bit-field values in host byte order, then forcibly fix their byte order using a combination of byte swap operations and types. Instead, just compute the value that needs to go into the new structure member and save it with a simple byte-order conversion. Make similar simplifications in rmnet_map_ipv6_ul_csum_header(). Finally, in rmnet_map_checksum_uplink_packet() a set of assignments zeroes every field in the upload checksum header. Replace that with a single memset() operation. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: don't use C bit-fields in rmnet checksum trailerAlex Elder1-1/+1
Replace the use of C bit-fields in the rmnet_map_dl_csum_trailer structure with a single one-byte field, using constant field masks to encode or get at embedded values. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: use masks instead of C bit-fieldsAlex Elder2-3/+5
The actual layout of bits defined in C bit-fields (e.g. int foo : 3) is implementation-defined. Structures defined in <linux/if_rmnet.h> address this by specifying all bit-fields twice, to cover two possible layouts. I think this pattern is repetitive and noisy, and I find the whole notion of compiler "bitfield endianness" to be non-intuitive. Stop using C bit-fields for the command/data flag and the pad length fields in the rmnet_map structure, and define a single-byte flags field instead. Define a mask for the single-bit "command" flag, and another mask for the encoded pad length. The content of both fields can be accessed using a simple bitwise AND operation. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: kill RMNET_MAP_GET_*() accessor macrosAlex Elder4-21/+16
The following macros, defined in "rmnet_map.h", assume a socket buffer is provided as an argument without any real indication this is the case. RMNET_MAP_GET_MUX_ID() RMNET_MAP_GET_CD_BIT() RMNET_MAP_GET_PAD() RMNET_MAP_GET_CMD_START() RMNET_MAP_GET_LENGTH() What they hide is pretty trivial accessing of fields in a structure, and it's much clearer to see this if we do these accesses directly. So rather than using these accessor macros, assign a local variable of the map header pointer type to the socket buffer data pointer, and derereference that pointer variable. In "rmnet_map_data.c", use sizeof(object) rather than sizeof(type) in one spot. Also, there's no need to byte swap 0; it's all zeros irrespective of endianness. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: simplify some byte order logicAlex Elder1-10/+6
In rmnet_map_ipv4_ul_csum_header() and rmnet_map_ipv6_ul_csum_header() the offset within a packet at which checksumming should commence is calculated. This calculation involves byte swapping and a forced type conversion that makes it hard to understand. Simplify this by computing the offset in host byte order, then converting the result when assigning it into the header field. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15e1000e: Remove the runtime suspend restriction on CNP+Chen Yu1-1/+1
Although there is platform issue of runtime suspend support on CNP, it would be more flexible to let the user decide whether to disable runtime or not because: 1. This can be done in userspace via echo on > /sys/devices/pci0000\:00/0000\:00\:1f.d/power/control 2. More and more NICs would support runtime suspend, disabling the runtime suspend on them by default would impact the validation. Only disable runtime suspend on CNP in case of any user space regression. Signed-off-by: Chen Yu <yu.c.chen@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15e1000e: Leverage direct_complete to speed up s2ramChen Yu1-1/+9
The NIC is put in runtime suspend status when there is no cable connected. As a result, it is safe to keep non-wakeup NIC in runtime suspended during s2ram because the system does not rely on the NIC plug event nor WoL to wake up the system. Besides that, unlike the s2idle, s2ram does not need to manipulate S0ix settings during suspend. This patch introduces the .prepare() for e1000e so that if the NIC is runtime suspended the subsequent suspend/resume hooks will be skipped so as to speed up the s2ram. The pm core will check whether the NIC is a wake up device so there's no need to check it again in .prepare(). DPM_FLAG_SMART_PREPARE flag should be set during probe to ask the pci subsystem to honor the driver's prepare() result. Besides, the NIC remains runtime suspended after resumed from s2ram as there is no need to resume it. Tested on i7-2600K with 82579V NIC Before the patch: e1000e 0000:00:19.0: pci_pm_suspend+0x0/0x160 returned 0 after 225146 usecs e1000e 0000:00:19.0: pci_pm_resume+0x0/0x90 returned 0 after 140588 usecs After the patch: echo disabled > //sys/devices/pci0000\:00/0000\:00\:19.0/power/wakeup becomes 0 usecs because the hooks will be skipped. Suggested-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: Chen Yu <yu.c.chen@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15net: ipa: make ipa_table_hash_support() inlineAlex Elder2-6/+4
In review, Alexander Duyck suggested that ipa_table_hash_support() was trivial enough that it could be implemented as a static inline function in the header file. But the patch had already been accepted. Implement his suggestion. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: phy: add Marvell 88X2222 transceiver supportIvan Bornyakov3-0/+526
Add basic support for the Marvell 88X2222 multi-speed ethernet transceiver. This PHY provides data transmission over fiber-optic as well as Twinax copper links. The 88X2222 supports 2 ports of 10GBase-R and 1000Base-X on the line-side interface. The host-side interface supports 4 ports of 10GBase-R, RXAUI, 1000Base-X and 2 ports of XAUI. This driver, however, supports only XAUI on the host-side and 1000Base-X/10GBase-R on the line-side, for now. The SGMII is also supported over 1000Base-X. Interrupts are not supported. Internal registers access compliant with the Clause 45 specification. Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: dwmac-imx: add platform level clocks management for i.MXJoakim Zhang1-24/+36
Split clocks settings from init callback into clks_config callback, which could support platform level clocks management. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: add platform level clocks managementJoakim Zhang1-0/+10
This patch intends to add platform level clocks management. Some platforms may have their own special clocks, they also need to be managed dynamically. If you want to manage such clocks, please implement clks_config callback. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: add clocks management for gmac driverJoakim Zhang4-37/+174
This patch intends to add clocks management for stmmac driver: If CONFIG_PM enabled: 1. Keep clocks disabled after driver probed. 2. Enable clocks when up the net device, and disable clocks when down the net device. If CONFIG_PM disabled: Keep clocks always enabled after driver probed. Note: 1. It is fine for ethtool, since the way of implementing ethtool_ops::begin in stmmac is only can be accessed when interface is enabled, so the clocks are ticked. 2. The MDIO bus has a different life cycle to the MAC, need ensure clocks are enabled when _mdio_read/write() need clocks, because these functions can be called while the interface it not opened. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: phylink: Fix phylink_err() function name error in phylink_major_configOng Boon Leong1-1/+1
if pl->mac_ops->mac_finish() failed, phylink_err should use "mac_finish" instead of "mac_prepare". Fixes: b7ad14c2fe2d4 ("net: phylink: re-implement interface configuration with PCS") Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15stmmac: intel: add pcs-xpcs for Intel mGbE controllerOng Boon Leong1-1/+14
Intel mGbE controller such as those in EHL & TGL uses pcs-xpcs driver for SGMII interface. To ensure mdio bus scanning does not assign phy_device to MDIO-addressable entities like intel serdes and pcs-xpcs, we set up to phy_mask to skip them. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: ensure phydev is attached to phylink for C37 ANOng Boon Leong1-1/+1
As the support for MAC-side SGMII C37 AN is added to pcs-xpcs, phydev should be attached to phylink during driver's open(). So, we change the condition to "Not C73 AN" instead. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: make in-band AN mode parsing is supported for non-DTOng Boon Leong1-0/+2
Not all platform uses DT, so phylink_parse_mode() will skip in-band setup of pl->supported and pl->link_config.advertising entirely. So, we add the setting of ovr_an_inband flag to make it works for non-DT platform. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: phylink: make phylink_parse_mode() support non-DT platformOng Boon Leong1-2/+3
Certain platform does not support DT, so we make phylink_parse_mode() to allow non-DT platform to use it to setup in-band AN advertising. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: pcs: add C37 SGMII AN support for intel mGbE controllerOng Boon Leong1-1/+166
XPCS IP supports C37 SGMII AN process and it is used in intel multi-GbE controller as MAC-side SGMII. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: pcs: rearrange C73 functions to prepare for C37 support laterOng Boon Leong1-28/+66
The current implementation for XPCS is validated for C73, so we rename them to have _c73 suffix and introduce a set of functions to use an_mode flag to switch between C73 and C37 AN later. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: ethernet: neterion: Fix a typo in the file s2io.cBhaskar Chowdhury1-1/+1
s/structue/structure/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: ethernet: intel: igb: Typo fix in the file igb_main.cBhaskar Chowdhury1-1/+1
s/structue/structure/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15ethernet: amazon: ena: A typo fix in the file ena_com.hBhaskar Chowdhury1-1/+1
Mundane typo fix. Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15bonding: Added -ENODEV interpret for slaves optionJianlin Lv1-0/+9
When the incorrect interface name is stored in the slaves/active_slave option of the bonding sysfs, the kernel does not record the log that interface does not exist. This patch adds a log for -ENODEV error, which will facilitate users to figure out such issue. Signed-off-by: Jianlin Lv <Jianlin.Lv@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: dsa: hellcreek: Offload bridge port flagsKurt Kanzenbach1-25/+104
The switch implements unicast and multicast filtering per port. Add support for it. By default filtering is disabled. Signed-off-by: Kurt Kanzenbach <kurt@kmk-computers.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: hdlc_x25: Prevent racing between "x25_close" and "x25_xmit"/"x25_rx"Xie He1-1/+41
"x25_close" is called by "hdlc_close" in "hdlc.c", which is called by hardware drivers' "ndo_stop" function. "x25_xmit" is called by "hdlc_start_xmit" in "hdlc.c", which is hardware drivers' "ndo_start_xmit" function. "x25_rx" is called by "hdlc_rcv" in "hdlc.c", which receives HDLC frames from "net/core/dev.c". "x25_close" races with "x25_xmit" and "x25_rx" because their callers race. However, we need to ensure that the LAPB APIs called in "x25_xmit" and "x25_rx" are called before "lapb_unregister" is called in "x25_close". This patch adds locking to ensure when "x25_xmit" and "x25_rx" are doing their work, "lapb_unregister" is not yet called in "x25_close". Reasons for not solving the racing between "x25_close" and "x25_xmit" by calling "netif_tx_disable" in "x25_close": 1. We still need to solve the racing between "x25_close" and "x25_rx"; 2. The design of the HDLC subsystem assumes the HDLC hardware drivers have full control over the TX queue, and the HDLC protocol drivers (like this driver) have no control. Controlling the queue here in the protocol driver may interfere with hardware drivers' control of the queue. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Xie He <xie.he.0141@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15ice: optimize for XDP_REDIRECT in xsk pathMagnus Karlsson1-4/+8
Optimize ice_run_xdp_zc() for the XDP program verdict being XDP_REDIRECT in the xsk zero-copy path. This path is only used when having AF_XDP zero-copy on and in that case most packets will be directed to user space. This provides a little over 100k extra packets in throughput on my server when running l2fwd in xdpsock. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Tested-by: George Kuruvinakunnel <george.kuruvinakunnel@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15ixgbe: optimize for XDP_REDIRECT in xsk pathMagnus Karlsson1-4/+7
Optimize ixgbe_run_xdp_zc() for the XDP program verdict being XDP_REDIRECT in the xsk zero-copy path. This path is only used when having AF_XDP zero-copy on and in that case most packets will be directed to user space. This provides a little under 100k extra packets in throughput on my server when running l2fwd in xdpsock. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Tested-by: Vishakha Jambekar <vishakha.jambekar@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15i40e: optimize for XDP_REDIRECT in xsk pathMagnus Karlsson1-4/+7
Optimize i40e_run_xdp_zc() for the XDP program verdict being XDP_REDIRECT in the xsk zero-copy path. This path is only used when having AF_XDP zero-copy on and in that case most packets will be directed to user space. This provides a little over 100k extra packets in throughput on my server when running l2fwd in xdpsock. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Tested-by: George Kuruvinakunnel <george.kuruvinakunnel@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15rtw88: 8822c: support FW crash dump when FW crashZong-Zhe Yang7-14/+172
Although FW crash logs are already supported for dumping in driver, the logs may not be sufficient to analyze field issues. To improve this part, we add a support to dump FW memory. When driver receives FW crash notifications, driver uses DDMA, which is a HW ability, to copy specified FW memory to FW fifo. Driver can then dump these information from FW fifo. With this support, not only FW crash log but also specified FW memory will be dumped while FW crash. Besides, specified registers are also dumped. This feature is implemeted on 8822C first due to difference of FW layouts between ICs. In addition, we add a debugfs to trigger FW crash. It can simulate the process of crash, dump and reset. Through it, we can also check if a reset is ongoing. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210309060121.9099-1-pkshih@realtek.com
2021-03-15wilc1000: use wilc handler as cookie in request_threaded_irq()Ajay Singh1-9/+5
Use same cookie for request_threaded_irq() & free_irq() to properly free IRQ during module unload. free_irq() already uses *wilc* handler so the changes are required for request_threaded_irq(). Signed-off-by: Ajay Singh <ajay.kathat@microchip.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210225042302.17048-1-ajay.kathat@microchip.com
2021-03-15wilc1000: write value to WILC_INTR2_ENABLE registerMarcus Folkesson1-1/+1
Write the value instead of reading it twice. Fixes: c5c77ba18ea6 ("staging: wilc1000: Add SDIO/SPI 802.11 driver") Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210224163706.519658-1-marcus.folkesson@gmail.com
2021-03-15wilc1000: Support chip sleep over SPIDavid Mosberger-Tang2-4/+58
chip_allow_sleep() only supported wakeup via SDIO, which made the driver unusable over SPI. This code is a straight forward port from the driver in the linux-at91 repository. Signed-off-by: David Mosberger-Tang <davidm@egauge.net> Acked-by: Ajay Singh <ajay.kathat@microchip.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210224033317.1507603-1-davidm@egauge.net
2021-03-15rtw88: remove unnecessary variablewengjianfeng1-2/+1
The variable ret is defined at the beginning and initialized to 0 until the function returns ret, and the variable ret is not reassigned.Therefore, we do not need to define the variable ret, just return 0 directly at the end of the function. Signed-off-by: wengjianfeng <wengjianfeng@yulong.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210223075438.13676-1-samirweng1979@163.com
2021-03-15rtw88: coex: add power off settingPing-Ke Shih3-0/+7
Clear WL/BT on/off bit in scoreboard register that is used to exchange WL/BT status. Since the status is preserved after warm reboot, we must clear it when WL is going to down. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210219054140.7835-1-pkshih@realtek.com
2021-03-15Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.gitKalle Valo26-480/+1972
ath.git patches for v5.13. Major changes: ath11k * add initial support for QCN9074, but not enabled yet due to firmware problems * enable radar detection for 160MHz secondary segment * handle beacon misses in station mode
2021-03-15Merge 5.12-rc3 into tty-nextGreg Kroah-Hartman85-338/+714
Resolves a merge issue with: drivers/tty/hvc/hvcs.c and we want the tty/serial fixes from 5.12-rc3 in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-15thermal/drivers/core: Use a char pointer for the cooling device nameDaniel Lezcano1-1/+1
We want to have any kind of name for the cooling devices as we do no longer want to rely on auto-numbering. Let's replace the cooling device's fixed array by a char pointer to be allocated dynamically when registering the cooling device, so we don't limit the length of the name. Rework the error path at the same time as we have to rollback the allocations in case of error. Tested with a dummy device having the name: "Llanfairpwllgwyngyllgogerychwyrndrobwllllantysiliogogogoch" A village on the island of Anglesey (Wales), known to have the longest name in Europe. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Tested-by: Ido Schimmel <idosch@nvidia.com> Link: https://lore.kernel.org/r/20210314111333.16551-1-daniel.lezcano@linaro.org
2021-03-14mlxsw: spectrum: Report extra metadata to psample moduleIdo Schimmel1-2/+52
Make use of the previously added metadata and report it to the psample module. The metadata is read from the skb's control block, which was initialized by the bus driver (i.e., 'mlxsw_pci') after decoding the packet's Completion Queue Element (CQE). Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: spectrum: Remove mlxsw_sp_sample_receive()Ido Schimmel3-27/+17
The function resolves the psample sampling group from the Rx port because this is the only form of sampling the driver currently supports. Subsequent patches are going to add support for Tx-based and policy-based sampling, in which case the sampling group would not be resolved from the Rx port. Therefore, move this code to the Rx-specific sampling listener. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: spectrum: Remove unnecessary RCU read-side critical sectionIdo Schimmel1-4/+1
Since commit 7d8e8f3433dc ("mlxsw: core: Increase scope of RCU read-side critical section"), all Rx handlers are called from an RCU read-side critical section. Remove the unnecessary rcu_read_lock() / rcu_read_unlock(). Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: pci: Set extra metadata in skb control blockIdo Schimmel2-0/+68
Packets that are mirrored / sampled to the CPU have extra metadata encoded in their corresponding Completion Queue Element (CQE). Retrieve this metadata from the CQE and set it in the skb control block so that it could be accessed by the switch driver (i.e., 'mlxsw_spectrum'). Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: Create dedicated field for Rx metadata in skb control blockIdo Schimmel3-3/+7
Next patch will need to encode more Rx metadata in the skb control block, so create a dedicated field for it and move the cookie index there. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: pci: Add more metadata fields to CQEv2Ido Schimmel1-0/+71
The Completion Queue Element version 2 (CQEv2) includes various metadata fields for packets that are mirrored / sampled to the CPU. Add these fields so that they could be used by a later patch. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14netdevsim: Add dummy psample implementationIdo Schimmel5-2/+299
Allow netdevsim to report "sampled" packets to the psample module by periodically generating packets from a work queue. The behavior can be enabled / disabled (default) and the various meta data attributes can be controlled via debugfs knobs. This implementation enables both testing of the psample module with all the optional attributes as well as development of user space applications on top of psample such as hsflowd and a Wireshark dissector for psample generic netlink packets. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14psample: Encapsulate packet metadata in a structIdo Schimmel1-4/+4
Currently, callers of psample_sample_packet() pass three metadata attributes: Ingress port, egress port and truncated size. Subsequent patches are going to add more attributes (e.g., egress queue occupancy), which also need an indication whether they are valid or not. Encapsulate packet metadata in a struct in order to keep the number of arguments reasonable. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14net: dsa: bcm_sf2: Fill in BCM4908 CFP entriesFlorian Fainelli1-1/+1
The BCM4908 switch has 256 CFP entrie, update that setting so CFP can be used. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14hv_netvsc: Add a comment clarifying batching logicShachar Raindel1-0/+20
The batching logic in netvsc_send is non-trivial, due to a combination of the Linux API and the underlying hypervisor interface. Add a comment explaining why the code is written this way. Signed-off-by: Shachar Raindel <shacharr@microsoft.com> Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Reviewed-by: Dexuan Cui <decui@microsoft.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14net: arcnet: com20020 fix error handlingTong Zhang1-15/+19
There are two issues when handling error case in com20020pci_probe() 1. priv might be not initialized yet when calling com20020pci_remove() from com20020pci_probe(), since the priv is set at the very last but it can jump to error handling in the middle and priv remains NULL. 2. memory leak - the net device is allocated in alloc_arcdev but not properly released if error happens in the middle of the big for loop [ 1.529110] BUG: kernel NULL pointer dereference, address: 0000000000000008 [ 1.531447] RIP: 0010:com20020pci_remove+0x15/0x60 [com20020_pci] [ 1.536805] Call Trace: [ 1.536939] com20020pci_probe+0x3f2/0x48c [com20020_pci] [ 1.537226] local_pci_probe+0x48/0x80 [ 1.539918] com20020pci_init+0x3f/0x1000 [com20020_pci] Signed-off-by: Tong Zhang <ztong0001@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13net: stmmac: Set FIFO sizes for ipq806xJonathan McDowell1-0/+2
Commit eaf4fac47807 ("net: stmmac: Do not accept invalid MTU values") started using the TX FIFO size to verify what counts as a valid MTU request for the stmmac driver. This is unset for the ipq806x variant. Looking at older patches for this it seems the RX + TXs buffers can be up to 8k, so set appropriately. (I sent this as an RFC patch in June last year, but received no replies. I've been running with this on my hardware (a MikroTik RB3011) since then with larger MTUs to support both the internal qca8k switch and VLANs with no problems. Without the patch it's impossible to set the larger MTU required to support this.) Signed-off-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13drivers: net: vxlan.c: Fix declaration issueSanjana Srinidhi1-0/+1
Added a blank line after structure declaration. This is done to maintain code uniformity. Signed-off-by: Sanjana Srinidhi <sanjanasrinidhi1810@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>