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2022-07-25mlxsw: pci: Simplify FRC clock readingAmit Cohen2-9/+12
Currently, the reading of FRC values (high and low) is done using macro which calls to a function. In addition, to calculate the offset of FRC, a simple macro is used. This code can be simplified by adding an helper function and calculating the offset explicitly instead of using an additional macro for that. Add the helper function and convert the existing code. This helper will be used later to read UTC clock. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: spectrum_ptp: Initialize the clock to zero as part of initializationAmit Cohen1-2/+1
As lately recommended in the mailing list[1], set the clock to zero time as part of initialization. The idea is that when the clock reads 'Jan 1, 1970', then it is clearly wrong and user will not mistakenly think that the clock is set correctly. If as part of initialization, the driver sets the clock, user might see correct date and time (maybe with a small shift) and assume that there is no need to sync the clock. Fix the existing code of Spectrum-1 to set the 'timecounter' to zero. [1]: https://lore.kernel.org/netdev/20220201191041.GB7009@hoboy.vegasvil.org/ Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: Rename 'read_frc_capable' bit to 'read_clock_capable'Danielle Ratson3-3/+3
Rename the 'read_frc_capable' bit to 'read_clock_capable' since now it can be both the FRC and UTC clocks. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: resources: Add resource identifier for maximum number of FIDsAmit Cohen1-0/+2
Add a resource identifier for maximum number of FIDs so that it could be later used to query the information from firmware. In Spectrum-2 and Spectrum-3, the correction field of PTP packets which are sent as control packets is not updated at egress port. To overcome this limitation, some packets will be sent as data packets. The header should include FID, which is supposed to be 'Max FID + port - 1'. As preparation, add the required resource, to be able to query the value from firmware later. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: spectrum: Fix the shift of FID field in TX headerDanielle Ratson1-1/+1
Currently, the field FID in TX header is defined, but is not used as it is relevant only for data packets. mlxsw driver currently sends all host-generated traffic as control packets and not as data packets. In Spectrum-2 and Spectrum-3, the correction field of PTP packets which are sent as control packets is not updated at egress port. To overcome this limitation while adding support for PTP, some packets will be sent as data packets. Fix the wrong shift in the definition, to allow using the field later. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: Set time stamp type as part of config profileDanielle Ratson4-1/+38
The type of time stamp field in the CQE is configured via the CONFIG_PROFILE command during driver initialization. Add the definition of the relevant fields to the command's payload and set the type to UTC for Spectrum-2 and above. This configuration can be done as part of the preparations to PTP support, as the type of the time stamp will not break any existing behavior. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: cmd: Add UTC related fields to query firmware commandDanielle Ratson1-0/+26
Add UTC sec and nsec PCI BAR and offset to query firmware command for a future use. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: pci_hw: Add 'time_stamp' and 'time_stamp_type' fields to CQEv2Danielle Ratson1-0/+78
The Completion Queue Element version 2 (CQEv2) includes various metadata fields of packets. Add 'time_stamp' and 'time_stamp_type' fields along with functions to extract the seconds and nanoseconds for a future use. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: reg: Add Monitoring Time Precision Correction Port Configuration RegisterDanielle Ratson1-0/+62
In Spectrum-2, all the packets are time stamped, the MTPCPC register is used to configure the types of packets that will adjust the correction field and which port will trap PTP packets. If ingress correction is set on a port for a given packet type, then when such a packet is received via the port, the current time stamp is subtracted from the correction field. If egress correction is set on a port for a given packet type, then when such a packet is transmitted via the port, the current time stamp is added to the correction field. Assuming the systems is configured correctly, the above means that the correction field will contain the transient delay between the ports. Add this register for a future use in order to support PTP in Spectrum-2. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: reg: Add MTUTC register's fields for supporting PTP in Spectrum-2Danielle Ratson2-4/+31
The MTUTC register configures the HW UTC counter. Add the relevant fields and operations to support PTP in Spectrum-2 and update mlxsw_reg_mtutc_pack() with the new fields for a future use. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25mlxsw: Rename mlxsw_reg_mtptptp_pack() to mlxsw_reg_mtptpt_pack()Danielle Ratson2-4/+4
The right name of the register is MTPTPT, which refers to Monitoring Precision Time Protocol Trap Register. Therefore, rename the function mlxsw_reg_mtptptp_pack() to mlxsw_reg_mtptpt_pack(). Signed-off-by: Danielle Ratson <danieller@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/klassert/ipsec-nextDavid S. Miller1-1/+1
Steffen Klassert says: ==================== pull request (net-next): ipsec-next 2022-07-20 1) Don't set DST_NOPOLICY in IPv4, a recent patch made this superfluous. From Eyal Birger. 2) Convert alg_key to flexible array member to avoid an iproute2 compile warning when built with gcc-12. From Stephen Hemminger. 3) xfrm_register_km and xfrm_unregister_km do always return 0 so change the type to void. From Zhengchao Shao. 4) Fix spelling mistake in esp6.c From Zhang Jiaming. 5) Improve the wording of comment above XFRM_OFFLOAD flags. From Petr Vaněk. Please pull or let me know if there are problems. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: macb: Update tsu clk usage in runtime suspend/resume for VersalHarini Katakam2-2/+16
On Versal TSU clock cannot be disabled irrespective of whether PTP is used. Hence introduce a new Versal config structure with a "need tsu" caps flag and check the same in runtime_suspend/resume before cutting off clocks. More information on this for future reference: This is an IP limitation on versions 1p11 and 1p12 when Qbv is enabled (See designcfg1, bit 3). However it is better to rely on an SoC specific check rather than the IP version because tsu clk property itself may not represent actual HW tsu clock on some chip designs. Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: macb: Sort CAPS flags by bit positionsHarini Katakam1-2/+2
Sort capability flags by the bit position set. Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: macsec: fix potential resource leak in macsec_add_rxsa() and macsec_add_txsa()Jianglei Nie1-2/+2
init_rx_sa() allocates relevant resource for rx_sa->stats and rx_sa-> key.tfm with alloc_percpu() and macsec_alloc_tfm(). When some error occurs after init_rx_sa() is called in macsec_add_rxsa(), the function released rx_sa with kfree() without releasing rx_sa->stats and rx_sa-> key.tfm, which will lead to a resource leak. We should call macsec_rxsa_put() instead of kfree() to decrease the ref count of rx_sa and release the relevant resource if the refcount is 0. The same bug exists in macsec_add_txsa() for tx_sa as well. This patch fixes the above two bugs. Fixes: 3cf3227a21d1 ("net: macsec: hardware offloading infrastructure") Signed-off-by: Jianglei Nie <niejianglei2021@163.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25macsec: always read MACSEC_SA_ATTR_PN as a u64Sabrina Dubroca1-3/+3
Currently, MACSEC_SA_ATTR_PN is handled inconsistently, sometimes as a u32, sometimes forced into a u64 without checking the actual length of the attribute. Instead, we can use nla_get_u64 everywhere, which will read up to 64 bits into a u64, capped by the actual length of the attribute coming from userspace. This fixes several issues: - the check in validate_add_rxsa doesn't work with 32-bit attributes - the checks in validate_add_txsa and validate_upd_sa incorrectly reject X << 32 (with X != 0) Fixes: 48ef50fa866a ("macsec: Netlink support of XPN cipher suites (IEEE 802.1AEbw)") Signed-off-by: Sabrina Dubroca <sd@queasysnail.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25macsec: limit replay window size with XPNSabrina Dubroca1-4/+12
IEEE 802.1AEbw-2013 (section 10.7.8) specifies that the maximum value of the replay window is 2^30-1, to help with recovery of the upper bits of the PN. To avoid leaving the existing macsec device in an inconsistent state if this test fails during changelink, reuse the cleanup mechanism introduced for HW offload. This wasn't needed until now because macsec_changelink_common could not fail during changelink, as modifying the cipher suite was not allowed. Finally, this must happen after handling IFLA_MACSEC_CIPHER_SUITE so that secy->xpn is set. Fixes: 48ef50fa866a ("macsec: Netlink support of XPN cipher suites (IEEE 802.1AEbw)") Signed-off-by: Sabrina Dubroca <sd@queasysnail.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25macsec: fix error message in macsec_add_rxsa and _txsaSabrina Dubroca1-2/+2
The expected length is MACSEC_SALT_LEN, not MACSEC_SA_ATTR_SALT. Fixes: 48ef50fa866a ("macsec: Netlink support of XPN cipher suites (IEEE 802.1AEbw)") Signed-off-by: Sabrina Dubroca <sd@queasysnail.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25macsec: fix NULL deref in macsec_add_rxsaSabrina Dubroca1-1/+2
Commit 48ef50fa866a added a test on tb_sa[MACSEC_SA_ATTR_PN], but nothing guarantees that it's not NULL at this point. The same code was added to macsec_add_txsa, but there it's not a problem because validate_add_txsa checks that the MACSEC_SA_ATTR_PN attribute is present. Note: it's not possible to reproduce with iproute, because iproute doesn't allow creating an SA without specifying the PN. Fixes: 48ef50fa866a ("macsec: Netlink support of XPN cipher suites (IEEE 802.1AEbw)") Link: https://bugzilla.kernel.org/show_bug.cgi?id=208315 Reported-by: Frantisek Sumsal <fsumsal@redhat.com> Signed-off-by: Sabrina Dubroca <sd@queasysnail.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: ipa: Fix typo 'the the' in commentSlark Xiao1-1/+1
Replace 'the the' with 'the' in the comment. Signed-off-by: Slark Xiao <slark_xiao@163.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25nfp: bpf: Fix typo 'the the' in commentSlark Xiao1-1/+1
Replace 'the the' with 'the' in the comment. Signed-off-by: Slark Xiao <slark_xiao@163.com> Acked-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: ethernet: mtk_eth_soc: add support for page_pool_get_statsLorenzo Bianconi2-3/+35
Introduce support for the page_pool stats API into mtk_eth_soc driver. Report page_pool stats through ethtool. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: ethernet: mtk_eth_soc: add xmit XDP supportLorenzo Bianconi2-22/+180
Introduce XDP support for XDP_TX verdict and ndo_xdp_xmit function pointer. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: ethernet: mtk_eth_soc: introduce xdp ethtool countersLorenzo Bianconi2-2/+36
Report xdp stats through ethtool Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: ethernet: mtk_eth_soc: add basic XDP supportLorenzo Bianconi2-19/+145
Introduce basic XDP support to mtk_eth_soc driver. Supported XDP verdicts: - XDP_PASS - XDP_DROP - XDP_REDIRECT Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-25net: ethernet: mtk_eth_soc: rely on page_pool for single page buffersLorenzo Bianconi3-40/+156
Rely on page_pool allocator for single page buffers in order to keep them dma mapped and add skb recycling support. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queueJakub Kicinski6-35/+299
Tony Nguyen says: ==================== 100GbE Intel Wired LAN Driver Updates 2022-07-21 This series contains updates to ice driver only. Karol adds implementation for GNSS write; data is written to the GNSS module through TTY device using u-blox UBX protocol. * '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: ice: add write functionality for GNSS TTY ice: add i2c write command ==================== Link: https://lore.kernel.org/r/20220721202842.3276257-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-22net: usb: ax88179_178a: wol optimizationsJustin Chen1-24/+28
- Check if wol is supported on reset instead of everytime get_wol is called. - Save wolopts in private data instead of relying on the HW to save it. - Defer enabling WoL until suspend instead of enabling it everytime set_wol is called. Signed-off-by: Justin Chen <justinpopo6@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-22net: usb: ax88179_178a: move priv to driver_privJustin Chen1-13/+19
We need more space to save WoL context. So lets allocate memory for ax88179_data instead of using struct usbnet data field which only supports 5 words. We continue to use the struct usbnet data field for multicast filters. However since we no longer have the private data stored there, we can shift it to the beginning. Signed-off-by: Justin Chen <justinpopo6@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-22net: usb: ax88179_178a: restore state on resumeJustin Chen1-26/+1
The hardware state was only partially restored, which meant certain functionality was broken on resume. Do a full HW reset on resume to fix this. Signed-off-by: Justin Chen <justinpopo6@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-22net: usb: ax88179_178a: clean up pm callsJustin Chen1-88/+59
Instead of passing in_pm flags all over the place, use the private struct to handle in_pm mode. Signed-off-by: Justin Chen <justinpopo6@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-22net: usb: ax88179_178a: remove redundant init codeJustin Chen1-81/+4
Bind and reset are basically doing the same thing. Remove the duplicate code and have bind call into reset. Signed-off-by: Justin Chen <justinpopo6@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-22mlxsw: core: Fix use-after-free calling devl_unlock() in mlxsw_core_bus_device_unregister()Jiri Pirko1-2/+2
Do devl_unlock() before freeing the devlink in mlxsw_core_bus_device_unregister() function. Reported-by: Ido Schimmel <idosch@nvidia.com> Fixes: 72a4c8c94efa ("mlxsw: convert driver to use unlocked devlink API during init/fini") Signed-off-by: Jiri Pirko <jiri@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Link: https://lore.kernel.org/r/20220721142424.3975704-1-jiri@resnulli.us Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-22iavf: Check for duplicate TC flower filter before parsingAvinash Dayanand1-22/+33
Record of all the TC flower filters are kept for local book keeping, so take advantage of that and check for duplicate filter even before sending a request to the PF driver. Signed-off-by: Avinash Dayanand <avinash.dayanand@intel.com> Signed-off-by: Jun Zhang <xuejun.zhang@intel.com> Tested-by: Bharathi Sreenivas <bharathi.sreenivas@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-07-22i40e: Refactor tc mqprio checksPrzemyslaw Patynowski3-11/+25
Refactor bitwise checks for whether TC MQPRIO is enabled into one single method for improved readability. Signed-off-by: Przemyslaw Patynowski <przemyslawx.patynowski@intel.com> Signed-off-by: Jan Sokolowski <jan.sokolowski@intel.com> Tested-by: Bharathi Sreenivas <bharathi.sreenivas@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-07-22wifi: mac80211_hwsim: handle links for wmediumd/virtioJohannes Berg1-5/+35
For wmediumd/virtio, handle both the RX channel for links, as well as the link addresses when links are added/removed. Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-07-22wifi: mac80211_hwsim: fix address translation for MLOJohannes Berg1-20/+34
There are two issues here: we need to do the translation even in case mac80211 selected a link, and we should only translate the A3 if it's the BSSID. Fix both. Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-07-22sfc: attach/detach EF100 representors along with their owning PFEdward Cree5-3/+59
Since representors piggy-back on the PF's queues for TX, they can only accept new TXes while the PF is up. Thus, any operation which detaches the PF must first detach all its VFreps. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22sfc: hook up ef100 representor TXEdward Cree3-1/+38
Implement .ndo_start_xmit() by calling into the parent PF's TX path. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22sfc: support passing a representor to the EF100 TX pathEdward Cree7-17/+123
A non-null efv in __ef100_enqueue_skb() indicates that the packet is from that representor, should be transmitted with a suitable option descriptor (to instruct the switch to deliver it to the representee), and should not be accounted to the parent PF's stats or BQL. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22sfc: determine representee m-port for EF100 representorsEdward Cree5-1/+96
An MAE port, or m-port, is a port (source/destination for traffic) on the Match-Action Engine (the internal switch on EF100). Representors will use their representee's m-port for two purposes: as a destination override on TX from the representor, and as a source match in 'default rules' to steer representee traffic (when not matched by e.g. a TC flower rule) to representor RX via the parent PF's receive queue. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22sfc: phys port/switch identification for ef100 repsEdward Cree2-2/+39
Requires storing VF index in struct efx_rep. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22sfc: add basic ethtool ops to ef100 repsEdward Cree1-0/+26
Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22sfc: add skeleton ef100 VF representorsEdward Cree8-11/+196
No net_device_ops yet, just a placeholder netdev created per VF. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22sfc: detect ef100 MAE admin privilege/capability at probe timeEdward Cree4-0/+55
One PCIe function per network port (more precisely, per m-port group) is responsible for configuring the Match-Action Engine which performs switching and packet modification in the slice to support flower/OVS offload. The GRP_MAE bit in the privilege mask indicates whether a given function has this capability. At probe time, call MCDIs to read the calling function's privilege mask, and store the GRP_MAE bit in a new ef100_nic_data member. Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22sfc: update EF100 register descriptionsEdward Cree1-23/+60
Signed-off-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22net: marvell: prestera: use netif_is_any_bridge_port instead of open codeJuhee Kang1-2/+2
The open code which is netif_is_bridge_port() || netif_is_ovs_port() is defined as a new helper function on netdev.h like netif_is_any_bridge_port that can check both IFF flags in 1 go. So use netif_is_any_bridge_port() function instead of open code. This patch doesn't change logic. Signed-off-by: Juhee Kang <claudiajkang@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-22mlxsw: use netif_is_any_bridge_port() instead of open codeJuhee Kang1-3/+1
The open code which is netif_is_bridge_port() || netif_is_ovs_port() is defined as a new helper function on netdev.h like netif_is_any_bridge_port that can check both IFF flags in 1 go. So use netif_is_any_bridge_port() function instead of open code. This patch doesn't change logic. Signed-off-by: Juhee Kang <claudiajkang@gmail.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-21net: sungem_phy: Add of_node_put() for reference returned by of_get_parent()Liang He1-0/+1
In bcm5421_init(), we should call of_node_put() for the reference returned by of_get_parent() which has increased the refcount. Fixes: 3c326fe9cb7a ("[PATCH] ppc64: Add new PHY to sungem") Signed-off-by: Liang He <windhl@126.com> Link: https://lore.kernel.org/r/20220720131003.1287426-1-windhl@126.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-21net: pcs: xpcs: propagate xpcs_read error to xpcs_get_state_c37_sgmiiVladimir Oltean1-1/+1
While phylink_pcs_ops :: pcs_get_state does return void, xpcs_get_state() does check for a non-zero return code from xpcs_get_state_c37_sgmii() and prints that as a message to the kernel log. However, a non-zero return code from xpcs_read() is translated into "return false" (i.e. zero as int) and the I/O error is therefore not printed. Fix that. Fixes: b97b5331b8ab ("net: pcs: add C37 SGMII AN support for intel mGbE controller") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20220720112057.3504398-1-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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