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2019-06-19nvmem: Broaden the selection of NVMEM_SNVS_LPGPRFabio Estevam1-1/+1
The SNVS LPGR IP block is also found on other i.MX SoCs that are not covered by the current SOC_IMX6 || SOC_IMX7D logic. One example is the i.MX7ULP. To avoid keep expanding the SoC logic selection, make it broader by using the more generic ARCH_MXC symbol instead. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19nvmem: imx: add i.MX8 nvmem driverPeng Fan1-0/+7
This patch adds i.MX8 nvmem ocotp driver to access fuse via RPC to i.MX8 system controller. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25nvmem: core: add NVMEM_SYSFS KconfigSrinivas Kandagatla1-0/+10
Many nvmem providers are not very keen on having default sysfs nvmem entry, as most of the usecases for them are inside kernel itself. And in some cases read/writes to some areas in nvmem are restricted and trapped at secure monitor level, so accessing them from userspace would result in board reboots. This patch adds new NVMEM_SYSFS Kconfig to make binary sysfs entry an optional one. This provision will give more flexibility to users. This patch also moves existing sysfs code to a new file so that its not compiled in when its not really required. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Gaurav Kohli <gkohli@codeaurora.org> Tested-by: Gaurav Kohli <gkohli@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25nvmem: Add driver for STM32 factory-programmed read only memFabrice Gasnier1-0/+10
Add a read only nvmem driver for STM32 factory-programmed memory area (on-chip non-volatile storage). Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25nvmem: imx-ocotp: broaden Kconfig dependencyLucas Stach1-2/+2
The i.MX OCOTP controller is used in numerous Freescale/NXP SoCs from the MXC family, so the strict dependency on the i.MX6 SoC is too narrow. Broaden it to cover all the MXC familiy members. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-03-06Merge tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-miscLinus Torvalds1-1/+1
Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver patch pull request for 5.1-rc1. The largest thing by far is the new habanalabs driver for their AI accelerator chip. For now it is in the drivers/misc directory but will probably move to a new directory soon along with other drivers of this type. Other than that, just the usual set of individual driver updates and fixes. There's an "odd" merge in here from the DRM tree that they asked me to do as the MEI driver is starting to interact with the i915 driver, and it needed some coordination. All of those patches have been properly acked by the relevant subsystem maintainers. All of these have been in linux-next with no reported issues, most for quite some time" * tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (219 commits) habanalabs: adjust Kconfig to fix build errors habanalabs: use %px instead of %p in error print habanalabs: use do_div for 64-bit divisions intel_th: gth: Fix an off-by-one in output unassigning habanalabs: fix little-endian<->cpu conversion warnings habanalabs: use NULL to initialize array of pointers habanalabs: fix little-endian<->cpu conversion warnings habanalabs: soft-reset device if context-switch fails habanalabs: print pointer using %p habanalabs: fix memory leak with CBs with unaligned size habanalabs: return correct error code on MMU mapping failure habanalabs: add comments in uapi/misc/habanalabs.h habanalabs: extend QMAN0 job timeout habanalabs: set DMA0 completion to SOB 1007 habanalabs: fix validation of WREG32 to DMA completion habanalabs: fix mmu cache registers init habanalabs: disable CPU access on timeouts habanalabs: add MMU DRAM default page mapping habanalabs: Dissociate RAZWI info from event types misc/habanalabs: adjust Kconfig to fix build errors ...
2019-02-05nvmem: zynqmp: Added zynqmp nvmem firmware driverNava kishore Manne1-0/+10
This patch adds zynqmp nvmem firmware driver to access the SoC revision information from the hardware register. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-03nvmem: allow to select i.MX nvmem driver for i.MX 7DStefan Agner1-1/+1
The imx-ocotp nvmem driver supports the i.MX 7D SoC too. Allow to select the imx-ocotp driver even if only the i.MX 7D SoC has been selected. Fixes: 711d45477931 ("nvmem: octop: Add i.MX7D support") Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-07-15nvmem: Add Spreadtrum SC27XX efuse supportFreeman Liu1-0/+11
This patch add the efuse driver which is embeded in Spreadtrum SC27XX series PMICs. The sc27xx efuse contains 32 blocks and each block's data width is 16 bits. Signed-off-by: Freeman Liu <freeman.liu@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-05-14nvmem: Add RAVE SP EEPROM driverAndrey Smirnov1-0/+6
Add driver providing access to EEPROMs connected to RAVE SP devices Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Aleksander Morgado <aleksander@aleksander.es> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-04Merge tag 'char-misc-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-miscLinus Torvalds1-2/+2
Pull char/misc updates from Greg KH: "Here is the big set of char/misc driver patches for 4.17-rc1. There are a lot of little things in here, nothing huge, but all important to the different hardware types involved: - thunderbolt driver updates - parport updates (people still care...) - nvmem driver updates - mei updates (as always) - hwtracing driver updates - hyperv driver updates - extcon driver updates - ... and a handful of even smaller driver subsystem and individual driver updates All of these have been in linux-next with no reported issues" * tag 'char-misc-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (149 commits) hwtracing: Add HW tracing support menu intel_th: Add ACPI glue layer intel_th: Allow forcing host mode through drvdata intel_th: Pick up irq number from resources intel_th: Don't touch switch routing in host mode intel_th: Use correct method of finding hub intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate stm class: Make dummy's master/channel ranges configurable stm class: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate MAINTAINERS: Bestow upon myself the care for drivers/hwtracing hv: add SPDX license id to Kconfig hv: add SPDX license to trace Drivers: hv: vmbus: do not mark HV_PCIE as perf_device Drivers: hv: vmbus: respect what we get from hv_get_synint_state() /dev/mem: Avoid overwriting "err" in read_mem() eeprom: at24: use SPDX identifier instead of GPL boiler-plate eeprom: at24: simplify the i2c functionality checking eeprom: at24: fix a line break eeprom: at24: tweak newlines eeprom: at24: refactor at24_probe() ...
2018-04-04nvmem: disallow modular CONFIG_NVMEMArnd Bergmann1-1/+1
The new of_get_nvmem_mac_address() helper function causes a link error with CONFIG_NVMEM=m: drivers/of/of_net.o: In function `of_get_nvmem_mac_address': of_net.c:(.text+0x168): undefined reference to `of_nvmem_cell_get' of_net.c:(.text+0x19c): undefined reference to `nvmem_cell_read' of_net.c:(.text+0x1a8): undefined reference to `nvmem_cell_put' I could not come up with a good solution for this, as the code is always built-in. Using an #if IS_REACHABLE() check around it would solve the link time issue but then stop it from working in that configuration. Making of_nvmem_cell_get() an inline function could also solve that, but seems a bit ugly since it's somewhat larger than most inline functions, and it would just bring that problem into the callers. Splitting the function into a separate file might be an alternative. This uses the big hammer by making CONFIG_NVMEM itself a 'bool' symbol, which avoids the problem entirely but makes the vmlinux larger for anyone that might use NVMEM support but doesn't need it built-in otherwise. Fixes: 9217e566bdee ("of_net: Implement of_get_nvmem_mac_address helper") Cc: Mike Looijmans <mike.looijmans@topic.nl> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: David S. Miller <davem@davemloft.net> Cc: netdev@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mike Looijmans Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-14nvmem: add i.MX7 support to snvs-lpgprAndrey Yurovsky1-2/+2
The i.MX7 family has similar SNVS hardware so make the snvs-lpgpr support it along with the i.MX6 family. The register interface is the same except for the number and offset of the general purpose registers. Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: uniphier: add UniPhier eFuse driverKeiji Hayashibara1-0/+11
Add eFuse driver for Socionext UniPhier series SoC. Note that eFuse device is under soc-glue and this register implements as read only. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-20nvmem: add a driver for the Amlogic Meson6/Meson8/Meson8b SoCsMartin Blumenstingl1-0/+10
This adds a driver to access the efuse on Amlogic Meson6, Meson8 and Meson8b SoCs. These SoCs are accessing the efuse IP block directly through the registers in the "secbus" region. This makes it different from the Meson GX efuse driver which uses the "secure monitor" firmware to access the efuse. The efuse on Meson6 can only read one byte at a time, while the efuse on Meson8 and Meson8b always reads 4 bytes at a time. The new driver supports both, but due to lack of hardware Meson6 support was not tested. The hardware also supports writing. However, this is currently not supported by the driver. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-20nvmem: meson-efuse: indicate that this driver is only for Meson GX SoCsMartin Blumenstingl1-2/+2
The current Amlogic Meson eFuse driver only supports the 64-bit SoCs (GXBB and newer). Older SoCs cannot be supported by the same driver because they do not use the meson secure monitor firmware to access the hardware. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-04nvmem: add snvs_lpgpr driverOleksij Rempel1-0/+10
This is a driver for Low Power General Purpose Register (LPGPR) available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS) of this chip. It is a 32-bit read/write register located in the low power domain. Since LPGPR is located in the battery-backed power domain, LPGPR can be used by any application for retaining data during an SoC power-down mode. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-04-08nvmem: Add driver for the i.MX IIMMichael Grzeschik1-0/+11
This adds a readonly nvmem driver for the i.MX IC Identification Module (IIM). The IIM is found on the older i.MX SoCs like the i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and the i.MX53. The IIM can control up to 8 fuse banks with 256 bit each. Not all of the banks are equipped on the different SoCs. The actual number of fuses differ from 512 on the i.MX27 and 1152 on the i.MX53. The fuses are one time writable, but writing is currently not supported in the driver. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-11-10nvmem: Add the Broadcom OTP controller driverJonathan Richardson1-0/+12
Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP controller. These controllers are used on SoC's such as Cygnus and Stingray. Reviewed-by: Ray Jui <ray.jui@broadcom.com> Tested-by: Jonathan Richardson <jonathan.richardson@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Oza Pawandeep <oza@broadcom.com> Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-11-10nvmem: add NXP LPC18xx OTP driverJoachim Eastwood1-0/+10
Add simple read only driver for the internal OTP (One Time Programmable) memory found on all NXP LPC18xx and LPC43xx devices. The OTP memory is split into 4 banks each with 4 32-bits word. Some of the banks contain predefined data while others are for general purpose and user programmable via the OTP API in ROM. Note that writing to the OTP memory is not yet supported. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-01nvmem: amlogic: Add Amlogic Meson EFUSE driverCarlo Caione1-0/+10
Add Amlogic EFUSE driver to access hardware data like ethernet address, serial number or IDs. Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-06-25nvmem: imx-ocotp: add COMPILE_TEST for proper test coverageSrinivas Kandagatla1-1/+2
This patch add COMPILE_TEST to imx-ocotp driver so that it can be compile tested on other platforms with zero day testing. Also adds HAS_IOMEM dependancy as the users of devm_ioremap_resource() which are compile-testable should depend on HAS_IOMEM. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-06-25nvmem: mtk-efuse: remove nvmem regmap dependencySrinivas Kandagatla1-1/+0
Regmap raw accessors are bus specific implementations, using regmap raw apis in nvmem breaks nvmem providers based on regmap mmio. This patch moves to nvmem support in the driver to use callback instead of regmap, which is what the nvmem core supports now. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01nvmem: sunxi-sid: remove nvmem regmap dependencySrinivas Kandagatla1-1/+0
This patch moves to nvmem support in the driver to use callback instead of regmap. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01nvmem: qfprom: remove nvmem regmap dependencySrinivas Kandagatla1-1/+0
This patch moves to nvmem support in the driver to use callback instead of regmap. Reported-by: Rajendra Nayak <rjendra@qti.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01nvmem: core: remove regmap dependencySrinivas Kandagatla1-1/+0
nvmem uses regmap_raw_read/write apis to read/write data from providers, regmap raw apis stopped working with recent kernels which removed raw accessors on mmio bus. This resulted in broken nvmem for providers which are based on regmap mmio bus. This issue can be fixed temporarly by moving to other regmap apis, but we might hit same issue in future. Moving to interfaces based on read/write callbacks from providers would be more robust. This patch removes regmap dependency from nvmem and introduces read/write callbacks from the providers. Without this patch nvmem providers like qfprom based on regmap mmio bus would not work. Reported-by: Rajendra Nayak <rjendra@qti.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01nvmem: Fix build error of missing devm_ioremap_resource on UMKrzysztof Kozlowski1-0/+2
The devres.o gets linked if HAS_IOMEM is present so on ARCH=um allyesconfig (COMPILE_TEST) failed on many files with: drivers/built-in.o: In function `mtk_thermal_probe': mtk_thermal.c:(.text+0x394618): undefined reference to `devm_ioremap_resource' The users of devm_ioremap_resource() which are compile-testable should depend on HAS_IOMEM. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-03-05nvmem: Fix dependencies for !HAS_IOMEM archsRichard Weinberger1-0/+4
Not every arch has io memory. So, unbreak the build by fixing the dependencies. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-07nvmem: mediatek: Add Mediatek EFUSE driverAndrew-CT Chen1-0/+11
Add Mediatek EFUSE driver to access hardware data like thermal sensor calibration or HDMI impedance. Signed-off-by: Andrew-CT Chen <andrew-ct.chen@mediatek.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-07nvmem: NXP LPC18xx EEPROM memory NVMEM driverAriel D'Alessandro1-0/+9
This commit adds support for NXP LPC18xx EEPROM memory found in NXP LPC185x/3x and LPC435x/3x/2x/1x devices. EEPROM size is 16384 bytes and it can be entirely read and written/erased with 1 word (4 bytes) granularity. The last page (128 bytes) contains the EEPROM initialization data and is not writable. Erase/program time is less than 3ms. The EEPROM device requires a ~1500 kHz clock (min 800 kHz, max 1600 kHz) that is generated dividing the system bus clock by the division factor, contained in the divider register (minus 1 encoded). EEPROM will be kept in Power Down mode except during read/write calls. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-04nvmem: Adding bindings for rockchip-efuseZhengShunQian1-0/+10
There are some SoC specified values store in eFuse, such as the cpu_leakage and cpu_version, this driver can expose these values to /sys base on nvmem. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-04nvmem: add driver for ocotp in i.MX23 and i.MX28Stefan Wahren1-0/+11
This patch brings read-only support for the On-Chip OTP cells in the i.MX23 and i.MX28 processor. The driver implements the new NVMEM provider API. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-04nvmem: imx-ocotp: Add i.MX6 OCOTP driverPhilipp Zabel1-0/+11
This driver handles the i.MX On-Chip OTP Controller found in i.MX6Q/D, i.MX6S/DL, i.MX6SL, and i.MX6SX SoCs. Currently it just returns the values stored in the shadow registers. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-04nvmem: Add Vybrid OCOTP supportSanchayan Maity1-0/+10
The patch adds support for the On Chip One Time Programmable Peripheral (OCOTP) on the Vybrid platform. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-05nvmem: sunxi: Move the SID driver to the nvmem frameworkMaxime Ripard1-0/+11
Now that we have the nvmem framework, we can consolidate the common driver code. Move the driver to the framework, and hopefully, it will fix the sysfs file creation race. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [srinivas.kandagatla: Moved to regmap based EEPROM framework] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-05nvmem: qfprom: Add Qualcomm QFPROM support.Srinivas Kandagatla1-0/+15
This patch adds QFPROM support driver which is used by other drivers like thermal sensor and cpufreq. On MSM parts there are some efuses (called qfprom) these fuses store things like calibration data, speed bins.. etc. Drivers like cpufreq, thermal sensors would read out this data for configuring the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-05nvmem: Add a simple NVMEM framework for nvmem providersSrinivas Kandagatla1-0/+13
This patch adds just providers part of the framework just to enable easy review. Up until now, NVMEM drivers like eeprom were stored in drivers/misc, where they all had to duplicate pretty much the same code to register a sysfs file, allow in-kernel users to access the content of the devices they were driving, etc. This was also a problem as far as other in-kernel users were involved, since the solutions used were pretty much different from on driver to another, there was a rather big abstraction leak. This introduction of this framework aims at solving this. It also introduces DT representation for consumer devices to go get the data they require (MAC Addresses, SoC/Revision ID, part numbers, and so on) from the nvmems. Having regmap interface to this framework would give much better abstraction for nvmems on different buses. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [Maxime Ripard: intial version of eeprom framework] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>