aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci/host (follow)
AgeCommit message (Collapse)AuthorFilesLines
2015-07-01Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds1-4/+3
Pull irq fixes from Thomas Gleixner: "This contains: - a series of fixes for interrupt drivers to prevent a potential race when installing a chained interrupt handler - a fix for cpumask pointer misuse - a fix for using the wrong interrupt number from struct irq_data - removal of unused code and outdated comments - a few new helper functions which allow us to cleanup the interrupt handling code further in 4.3 I decided against doing the cleanup at the end of this merge window and rather do the preparatory steps for 4.3, so we can run the final ABI change at the end of the 4.3 merge window with less risk" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (26 commits) ARM/LPC32xx: Use irq not hwirq for __irq_set_handler_locked() genirq: Implement irq_set_handler_locked()/irq_set_chip_handler_name_locked() genirq: Introduce helper irq_desc_get_irq() genirq: Remove irq_node() genirq: Clean up outdated comments related to include/linux/irqdesc.h mn10300: Fix incorrect use of irq_data->affinity MIPS/ralink: Fix race in installing chained IRQ handler MIPS/pci: Fix race in installing chained IRQ handler MIPS/ath25: Fix race in installing chained IRQ handler MIPS/ath25: Fix race in installing chained IRQ handler m68k/psc: Fix race in installing chained IRQ handler avr32/at32ap: Fix race in installing chained IRQ handler sh/intc: Fix race in installing chained IRQ handler sh/intc: Fix potential race in installing chained IRQ handler pinctrl/sun4i: Fix race in installing chained IRQ handler pinctrl/samsung: Fix race in installing chained IRQ handler pinctrl/samsung: Fix race in installing chained IRQ handler pinctrl/exynos: Fix race in installing chained IRQ handler pinctrl/st: Fix race in installing chained IRQ handler pinctrl/adi2: Fix race in installing chained IRQ handler ...
2015-06-25Mohit Kumar has movedPratyush Anand1-1/+1
Mohit's email-id doesn't exist anymore as he has left the company. Replace ST's id with mohit.kumar.dhaka@gmail.com. Signed-off-by: Pratyush Anand <pratyush.anand@gmail.com> Cc: Mohit Kumar <mohit.kumar.dhaka@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-06-25Pratyush Anand has movedPratyush Anand1-2/+2
pratyush.anand@st.com email-id doesn't exist anymore as I have left the company. Replace ST's id with pratyush.anand@gmail.com. Signed-off-by: Pratyush Anand <pratyush.anand@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-06-25PCI/keystone: Fix race in installing chained IRQ handlerThomas Gleixner1-4/+3
Fix a race where a pending interrupt could be received and the handler called before the handler's data has been setup, by converting to irq_set_chained_handler_and_data(). Search and conversion was done with coccinelle: @@ expression E1, E2, E3; @@ ( -if (irq_set_chained_handler(E1, E3) != 0) - BUG(); | -irq_set_chained_handler(E1, E3); ) -irq_set_handler_data(E1, E2); +irq_set_chained_handler_and_data(E1, E3, E2); @@ expression E1, E2, E3; @@ ( -if (irq_set_chained_handler(E1, E3) != 0) - BUG(); ... | -irq_set_chained_handler(E1, E3); ... ) -irq_set_handler_data(E1, E2); +irq_set_chained_handler_and_data(E1, E3, E2); Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org
2015-06-18Merge branches 'pci/host-xgene' and 'pci/hotplug' into nextBjorn Helgaas1-4/+41
* pci/host-xgene: PCI: xgene: Allow config access to Root Port even when link is down PCI: xgene: Disable Configuration Request Retry Status for v1 silicon * pci/hotplug: PCI: pciehp: Inline the "handle event" functions into the ISR PCI: pciehp: Rename queue_interrupt_event() to pciehp_queue_interrupt_event() PCI: pciehp: Make queue_interrupt_event() void PCI: pciehp: Clean up debug logging
2015-06-18PCI: xgene: Allow config access to Root Port even when link is downDuc Dang1-3/+1
Previously, when a Root Port's link was down, we didn't allow config access to the Root Port, which meant that if the Root Port led to an empty slot, "lspci" didn't even show the Root Port. Allow config access to Root Port even when link is down. [bhelgaas: changelog, fold in unused var fix] Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-06-18PCI: xgene: Disable Configuration Request Retry Status for v1 siliconDuc Dang1-1/+40
When a CPU reads the Vendor and Device ID of a non-existent device, the controller should fabricate return data of 0xFFFFFFFF. Configuration Request Retry Status (CRS) is not applicable in this case because the device doesn't exist at all. The X-Gene v1 PCIe controller has a bug in the CRS logic such that when CRS is enabled, it fabricates return data of 0xFFFF0001 for this case, which means "the device exists but is not ready." That causes the PCI core to retry the read until it times out after 60 seconds. Disable CRS capability advertisement by clearing the CRS Software Visibility bit in the Root Capabilities Register. [bhelgaas: changelog and comment] Tested-by: Ian Campbell <ian.campbell@citrix.com> Tested-by: Marcin Juszkiewicz <mjuszkiewicz@redhat.com> Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Tanmay Inamdar <tinamdar@apm.com>
2015-06-16Merge branches 'pci/host-designware', 'pci/host-designware-common', 'pci/host-generic', 'pci/host-imx6', 'pci/host-iproc' and 'pci/host-xgene' into nextBjorn Helgaas15-191/+929
* pci/host-designware: PCI: designware: Use iATU0 for cfg and IO, iATU1 for MEM PCI: designware: Consolidate outbound iATU programming functions PCI: designware: Add support for x8 links * pci/host-designware-common: PCI: designware: Wait for link to come up with consistent style PCI: layerscape: Factor out ls_pcie_establish_link() PCI: layerscape: Use dw_pcie_link_up() consistently PCI: dra7xx: Use dw_pcie_link_up() consistently PCI: imx6: Rename imx6_pcie_start_link() to imx6_pcie_establish_link() * pci/host-generic: of/pci: Fix pci_address_to_pio() conversion of CPU address to I/O port * pci/host-imx6: PCI: imx6: Add #define PCIE_RC_LCSR PCI: imx6: Use "u32", not "uint32_t" PCI: imx6: Add speed change timeout message * pci/host-iproc: PCI: iproc: Free resource list after registration PCI: iproc: Directly add PCI resources PCI: iproc: Add BCMA PCIe driver PCI: iproc: Allow override of device tree IRQ mapping function * pci/host-xgene: arm64: dts: Add APM X-Gene PCIe MSI nodes PCI: xgene: Add APM X-Gene v1 PCIe MSI/MSIX termination driver
2015-06-16PCI: imx6: Add #define PCIE_RC_LCSRBjorn Helgaas1-1/+3
Define PCIE_RC_LCSR and use it instead of the bare offset "0x80." No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-06-16PCI: imx6: Use "u32", not "uint32_t"Bjorn Helgaas1-10/+10
Use "u32", not "uint32_t", for consistency. Use "tmp", not "temp", for consistency within the driver. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Richard Zhu <Richard.Zhu@freescale.com>
2015-06-12PCI: imx6: Add speed change timeout messageTroy Kisky1-17/+27
Currently, the timeout is never detected as count has a value of -1 if a timeout happens, but the code is checking for 0. Also, this patch removes the unneeded final wait if a timeout occurs. [bhelgaas: reworked starting from http://lkml.kernel.org/r/1433543864-7252-1-git-send-email-troy.kisky@boundarydevices.com] Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-06-10PCI: designware: Wait for link to come up with consistent styleBjorn Helgaas6-66/+51
All the DesignWare-based host drivers loop waiting for the link to come up, but they do it several ways that are needlessly different. Wait for the link to come up in a consistent style across all the DesignWare drivers. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-06-10PCI: layerscape: Factor out ls_pcie_establish_link()Bjorn Helgaas1-6/+13
All other DesignWare-based drivers have a *_establish_link() function. This functionality is trivial for Layerscape, but factor out a ls_pcie_establish_link() for consistency with the other drivers. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-06-10PCI: layerscape: Use dw_pcie_link_up() consistentlyBjorn Helgaas1-1/+1
All the other DesignWare-based drivers use dw_pcie_link_up(), so use it in this driver, too, for consistency. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-06-10PCI: dra7xx: Use dw_pcie_link_up() consistentlyBjorn Helgaas1-2/+1
We already use dw_pcie_link_up() once in dra7xx_pcie_establish_link(), but we duplicate its code later. Use dw_pcie_link_up() for consistency. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-06-05PCI: xgene: Add APM X-Gene v1 PCIe MSI/MSIX termination driverDuc Dang4-0/+627
APM X-Gene v1 SoC supports its own implementation of MSI, which is not compliant to GIC V2M specification for MSI Termination. There is a single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports. This MSI block supports 2048 MSI termination ports coalesced into 16 physical HW IRQ lines and shared across all 5 PCIe ports. As there are only 16 HW IRQs to serve 2048 MSI vectors, to support set_affinity correctly for each MSI vectors, the 16 HW IRQs are statically allocated to 8 X-Gene v1 cores (2 HW IRQs for each cores). To steer MSI interrupt to target CPU, MSI vector is moved around these HW IRQs lines. With this approach, the total MSI vectors this driver supports is reduced to 256. [bhelgaas: squash doc, driver, maintainer update] Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
2015-06-02PCI: imx6: Rename imx6_pcie_start_link() to imx6_pcie_establish_link()Bjorn Helgaas1-2/+2
Rename imx6_pcie_start_link() to imx6_pcie_establish_link() to follow the convention of other DesignWare-based host drivers. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-05-27PCI: iproc: Free resource list after registrationHauke Mehrtens2-8/+8
The resource list is only used in the setup process and was never freed. pci_add_resource() allocates a memory area to store the list item. Fix the memory leak. Tested-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ray Jui <rjui@broadcom.com>
2015-05-27PCI: iproc: Directly add PCI resourcesHauke Mehrtens4-10/+5
The struct iproc_pcie.resources member was pointing to a stack variable and is invalid after the registration function returned. Remove this pointer and add a parameter to the function. Tested-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ray Jui <rjui@broadcom.com>
2015-05-27PCI: designware: Use pci_scan_root_bus() for simplicityYijing Wang1-3/+1
After b97ea289cf6a ("PCI: Assign resources before drivers claim devices (pci_scan_root_bus())"), pci_scan_root_bus() no longer adds the devices, so it is equivalent to: pci_create_root_bus() pci_scan_child_bus() Use pci_scan_root_bus() to simplify the code. [bhelgaas: changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Mohit Kumar <mohit.kumar@st.com>
2015-05-27PCI: tegra: Remove tegra_pcie_scan_bus()Yijing Wang1-16/+0
After b97ea289cf6a ("PCI: Assign resources before drivers claim devices (pci_scan_root_bus())"), pci_scan_root_bus() no longer adds the devices, so it is equivalent to tegra_pcie_scan_bus(). Remove tegra_pcie_scan_bus() (the hw.scan method), so we use the generic pci_scan_root_bus() path. [bhelgaas: changelog] Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Thierry Reding <treding@nvidia.com>
2015-05-26PCI: mvebu: Remove mvebu_pcie_scan_bus()Yijing Wang1-17/+1
After b97ea289cf6a ("PCI: Assign resources before drivers claim devices (pci_scan_root_bus())"), pci_scan_root_bus() no longer adds the devices, so it is equivalent to mvebu_pcie_scan_bus(). Remove mvebu_pcie_scan_bus() (the hw.scan method), so we use the generic pci_scan_root_bus() path. We also need to use pci_common_init_dev() instead of pci_common_init() so we can supply the host bridge device pointer. [bhelgaas: changelog] Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> CC: Jason Cooper <jason@lakedaemon.net>
2015-05-20PCI: designware: Use iATU0 for cfg and IO, iATU1 for MEMJisheng Zhang1-36/+45
Most transactions' type are cfg0 and MEM, so the current iATU usage is not balanced: iATU0 is hot while iATU1 is rarely used. Refactor the iATU usage so we use iATU0 for cfg and IO and iATU1 for MEM. This allocation idea comes from Minghuan Lian <Minghuan.Lian@freescale.com>: [bhelgaas: use link with Message-ID] Link: http://lkml.kernel.org/r/1429091315-31891-3-git-send-email-Minghuan.Lian@freescale.com Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-05-20PCI: designware: Consolidate outbound iATU programming functionsJisheng Zhang1-70/+39
Currently, the outbound iATU programming functions are similar: the only difference is index, type, addr and size. Consolidate these functions into one. This saves about 1700 bytes in text: text data bss dec hex filename 9276 204 4 9484 250c pcie-designware.o-before 7532 204 4 7740 1e3c pcie-designware.o Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-05-20PCI: iproc: Add BCMA PCIe driverHauke Mehrtens3-0/+124
This driver adds support for the PCIe 2.0 controller found on the BCMA bus. This controller can be found on (mostly) all Broadcom BCM470X / BCM5301X ARM SoCs. The driver found in the Broadcom SDK does some more stuff, like setting up some DMA memory areas, chaining MPS and MRRS to 512 and also some PHY changes like "improving" the PCIe jitter and doing some special initialization for the 3rd PCIe port. This was tested on a bcm4708 board with 2 PCIe ports and wireless cards connected to them. PCI_DOMAINS is needed by this driver, because normally there is more than one PCIe controller and without PCI_DOMAINS only the first controller gets registered. This controller gets 6 IRQs; the last one is trigged by all IRQ events. [bhelgaas: fix "GPLv2" MODULE_LICENSE typo] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Ray Jui <rjui@broadcom.com.com>
2015-05-20PCI: iproc: Allow override of device tree IRQ mapping functionHauke Mehrtens3-1/+4
The iProc core PCIe driver defaults to using of_irq_parse_and_map_pci() for IRQ mapping. Add iproc_pcie.map_irq so bus interfaces that don't use device tree can override this by supplying their own IRQ mapping function. [bhelgaas: changelog] Posting: http://lkml.kernel.org/r/1431465781-10753-1-git-send-email-hauke@hauke-m.de Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ray Jui <rjui@broadcom.com.com>
2015-05-19PCI: designware: Add support for x8 linksZhou Wang1-0/+8
Add support for x8 links. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-04-13Merge tag 'pci-v4.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds12-19/+499
Pull PCI changes from Bjorn Helgaas: "Enumeration - Read capability list as dwords, not bytes (Sean O. Stalley) Resource management - Don't check for PNP overlaps with unassigned PCI BARs (Bjorn Helgaas) - Mark invalid BARs as unassigned (Bjorn Helgaas) - Show driver, BAR#, and resource on pci_ioremap_bar() failure (Bjorn Helgaas) - Fail pci_ioremap_bar() on unassigned resources (Bjorn Helgaas) - Assign resources before drivers claim devices (Yijing Wang) - Claim bus resources before pci_bus_add_devices() (Yijing Wang) Power management - Optimize device state transition delays (Aaron Lu) - Don't clear ASPM bits when the FADT declares it's unsupported (Matthew Garrett) Virtualization - Add ACS quirks for Intel 1G NICs (Alex Williamson) IOMMU - Add ptr to OF node arg to of_iommu_configure() (Murali Karicheri) - Move of_dma_configure() to device.c to help re-use (Murali Karicheri) - Fix size when dma-range is not used (Murali Karicheri) - Add helper functions pci_get[put]_host_bridge_device() (Murali Karicheri) - Add of_pci_dma_configure() to update DMA configuration (Murali Karicheri) - Update DMA configuration from DT (Murali Karicheri) - dma-mapping: limit IOMMU mapping size (Murali Karicheri) - Calculate device DMA masks based on DT dma-range size (Murali Karicheri) ARM Versatile host bridge driver - Check for devm_ioremap_resource() failures (Jisheng Zhang) Broadcom iProc host bridge driver - Add Broadcom iProc PCIe driver (Ray Jui) Marvell MVEBU host bridge driver - Add suspend/resume support (Thomas Petazzoni) Renesas R-Car host bridge driver - Fix position of MSI enable bit (Nobuhiro Iwamatsu) - Write zeroes to reserved PCIEPARL bits (Nobuhiro Iwamatsu) - Change PCIEPARL and PCIEPARH to PCIEPALR and PCIEPAUR (Nobuhiro Iwamatsu) - Verify that mem_res is 64K-aligned (Nobuhiro Iwamatsu) Samsung Exynos host bridge driver - Fix INTx enablement statement termination error (Jaehoon Chung) Miscellaneous - Make a shareable UUID for PCI firmware ACPI _DSM (Aaron Lu) - Clarify policy for vendor IDs in pci.txt (Michael S. Tsirkin)" * tag 'pci-v4.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (36 commits) PCI: Read capability list as dwords, not bytes PCI: layerscape: Simplify platform_get_resource_byname() failure checking PCI: keystone: Don't dereference possible NULL pointer PCI: versatile: Check for devm_ioremap_resource() failures PCI: Don't clear ASPM bits when the FADT declares it's unsupported PCI: Clarify policy for vendor IDs in pci.txt PCI/ACPI: Optimize device state transition delays PCI: Export pci_find_host_bridge() for use inside PCI core PCI: Make a shareable UUID for PCI firmware ACPI _DSM PCI: Fix typo in Thunderbolt kernel message PCI: exynos: Fix INTx enablement statement termination error PCI: iproc: Add Broadcom iProc PCIe support PCI: iproc: Add DT docs for Broadcom iProc PCIe driver PCI: Export symbols required for loadable host driver modules PCI: Add ACS quirks for Intel 1G NICs PCI: mvebu: Add suspend/resume support PCI: Cleanup control flow sparc/PCI: Claim bus resources before pci_bus_add_devices() PCI: Assign resources before drivers claim devices (pci_scan_root_bus()) PCI: Fail pci_ioremap_bar() on unassigned resources ...
2015-04-10Merge branches 'pci/host-exynos', 'pci/host-iproc', 'pci/host-keystone', 'pci/host-layerscape', 'pci/host-mvebu', 'pci/host-rcar' and 'pci/host-versatile' into nextBjorn Helgaas12-19/+498
* pci/host-exynos: PCI: exynos: Fix INTx enablement statement termination error * pci/host-iproc: PCI: iproc: Add Broadcom iProc PCIe support PCI: iproc: Add DT docs for Broadcom iProc PCIe driver PCI: Export symbols required for loadable host driver modules * pci/host-keystone: PCI: keystone: Don't dereference possible NULL pointer * pci/host-layerscape: PCI: layerscape: Simplify platform_get_resource_byname() failure checking * pci/host-mvebu: PCI: mvebu: Add suspend/resume support * pci/host-rcar: PCI: rcar: Verify that mem_res is 64K-aligned PCI: rcar: Change PCIEPARL and PCIEPARH to PCIEPALR and PCIEPAUR PCI: rcar: Write zeroes to reserved PCIEPARL bits PCI: rcar: Fix position of MSI enable bit * pci/host-versatile: PCI: versatile: Check for devm_ioremap_resource() failures
2015-04-09PCI: layerscape: Simplify platform_get_resource_byname() failure checkingBjorn Helgaas1-6/+3
devm_ioremap_resource() validates the resource it receives, so if we check for devm_ioremap_resource() failure, we need not check for failure of the preceding platform_get_resource(). Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-04-09PCI: keystone: Don't dereference possible NULL pointerBjorn Helgaas1-1/+2
Check for failure from platform_get_resource() (this check actually happens inside devm_ioremap_resource()) before dereferencing the pointer returned from platform_get_resource(). Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-04-09PCI: versatile: Check for devm_ioremap_resource() failuresJisheng Zhang1-6/+6
Check for failure of devm_ioremap_resource(). devm_ioremap_resource() validates the resource it receives, so if we check for devm_ioremap_resource() failure, we need not check for failure of the preceding platform_get_resource(). [bhelgaas: changelog] Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-04-09Merge tag 'pci-v4.0-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds2-4/+4
Pull PCI fixes from Bjorn Helgaas: "Here are some fixes for v4.0. I apologize for how late they are. We were hoping for some better fixes, but couldn't get them polished in time. These fix: - a Xen domU oops with PCI passthrough devices - a sparc T5 boot failure - a STM SPEAr13xx crash (use after initdata freed) - a cpcihp hotplug driver thinko - an AER thinko that printed stack junk Details: Enumeration - Don't look for ACPI hotplug parameters if ACPI is disabled (Bjorn Helgaas) Resource management - Revert "sparc/PCI: Clip bridge windows to fit in upstream windows" (Bjorn Helgaas) AER - Avoid info leak in __print_tlp_header() (Rasmus Villemoes) PCI device hotplug - Add missing curly braces in cpci_configure_slot() (Dan Carpenter) ST Microelectronics SPEAr13xx host bridge driver - Drop __initdata from spear13xx_pcie_driver (Matwey V. Kornilov) * tag 'pci-v4.0-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: Revert "sparc/PCI: Clip bridge windows to fit in upstream windows" PCI: Don't look for ACPI hotplug parameters if ACPI is disabled PCI: cpcihp: Add missing curly braces in cpci_configure_slot() PCI/AER: Avoid info leak in __print_tlp_header() PCI: spear: Drop __initdata from spear13xx_pcie_driver
2015-04-08PCI: exynos: Fix INTx enablement statement termination errorJaehoon Chung1-1/+1
Use a semicolon, not a comma, to terminate a statement. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-04-08PCI: iproc: Add Broadcom iProc PCIe supportRay Jui5-0/+439
Add support for the Broadcom iProc PCIe controller. pcie-iproc.c is the common core driver, and a front-end bus interface needs to be added to support different bus interfaces. pcie-iproc-platform.c contains the support for the platform bus interface. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2015-03-23Merge branches 'pci/enumeration' and 'pci/virtualization' into nextBjorn Helgaas1-0/+1
* pci/enumeration: PCI: Cleanup control flow sparc/PCI: Claim bus resources before pci_bus_add_devices() PCI: Assign resources before drivers claim devices (pci_scan_root_bus()) PCI: Assign resources before drivers claim devices (pci_scan_bus()) * pci/virtualization: PCI: Add ACS quirks for Intel 1G NICs
2015-03-20PCI: mvebu: Add suspend/resume supportThomas Petazzoni1-0/+38
Add suspend/resume support for the mvebu PCIe host driver. Without this commit, the system will panic at resume time when PCIe devices are connected. Note that we have to use the ->suspend_noirq() and ->resume_noirq() hooks, because at resume time, the PCI fixups are done at ->resume_noirq() time, so the PCIe controller has to be ready at this point. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
2015-03-19PCI: Assign resources before drivers claim devices (pci_scan_root_bus())Yijing Wang1-0/+1
Previously, pci_scan_root_bus() created a root PCI bus, enumerated the devices on it, and called pci_bus_add_devices(), which made the devices available for drivers to claim them. Most callers assigned resources to devices after pci_scan_root_bus() returns, which may be after drivers have claimed the devices. This is incorrect; the PCI core should not change device resources while a driver is managing the device. Remove pci_bus_add_devices() from pci_scan_root_bus() and do it after any resource assignment in the callers. Note that ARM's pci_common_init_dev() already called pci_bus_add_devices() after pci_scan_root_bus(), so we only need to remove the first call: pci_common_init_dev pcibios_init_hw pci_scan_root_bus pci_bus_add_devices # first call pci_bus_assign_resources pci_bus_add_devices # second call [bhelgaas: changelog, drop "root_bus" var in alpha common_init_pci(), return failure earlier in mn10300, add "return" in x86 pcibios_scan_root(), return early if xtensa platform_pcibios_fixup() fails] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Richard Henderson <rth@twiddle.net> CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru> CC: Matt Turner <mattst88@gmail.com> CC: David Howells <dhowells@redhat.com> CC: Tony Luck <tony.luck@intel.com> CC: Michal Simek <monstr@monstr.eu> CC: Ralf Baechle <ralf@linux-mips.org> CC: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> CC: Sebastian Ott <sebott@linux.vnet.ibm.com> CC: "David S. Miller" <davem@davemloft.net> CC: Chris Metcalf <cmetcalf@ezchip.com> CC: Chris Zankel <chris@zankel.net> CC: Max Filippov <jcmvbkbc@gmail.com> CC: Thomas Gleixner <tglx@linutronix.de>
2015-03-12Merge tag 'pci-v4.0-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds1-2/+2
Pull PCI fixes from Bjorn Helgaas: "Here are a couple updates for v4.0. One fixes a config accessor problem on APM X-Gene that we introduced when switching to generic config accessors, and the other fixes an older read-past-end-of-buffer problem in sysfs. APM X-Gene host bridge driver - Add register offset to config space base address (Feng Kan) Miscellaneous - Don't read past the end of sysfs "driver_override" buffer (Sasha Levin)" * tag 'pci-v4.0-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: xgene: Add register offset to config space base address PCI: Don't read past the end of sysfs "driver_override" buffer
2015-03-06PCI: spear: Drop __initdata from spear13xx_pcie_driverMatwey V. Kornilov2-4/+4
Struct spear13xx_pcie_driver was in initdata, but we passed a pointer to it to platform_driver_register(), which can use the pointer at arbitrary times in the future, even after the initdata is freed. That leads to crashes. Move spear13xx_pcie_driver and things referenced by it (spear13xx_pcie_probe() and dw_pcie_host_init()) out of initdata. [bhelgaas: changelog] Fixes: 6675ef212dac ("PCI: spear: Fix Section mismatch compilation warning for probe()") Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> CC: stable@vger.kernel.org # v3.17+
2015-03-05PCI: xgene: Add register offset to config space base addressFeng Kan1-2/+2
In xgene_pcie_map_bus(), we neglected to add in the register offset when calculating the config space address. This means all config accesses operated on the first four bytes of config space. Add the register offset to the config space base address. Also correct the xgene_pcie_map_bus() prototype to fix a compiler warning. [bhelgaas: changelog] Fixes: 350f8be5bb40 ("PCI: xgene: Convert to use generic config accessors") Posting: http://lkml.kernel.org/r/1424214840-26498-1-git-send-email-fkan@apm.com Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Tanmay Inamdar <tinamdar@apm.com> Acked-by: Rob Herring <robh@kernel.org>
2015-02-28PCI: versatile: Update for list_for_each_entry() API changeJoachim Nilsson1-1/+1
In Linux 4.0-rc1 ARM Versatile PCI build fails to build due to what appears to be an API update. This patch is a very simple correction, merely posted as a heads-up to the maintainers. Hopefully a better fix can be forwarded to Linus. [ arnd: the patch actually looks correct, so let's take this version ] Signed-off-by: Joachim Nilsson <troglobit@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-02-24PCI: rcar: Verify that mem_res is 64K-alignedNobuhiro Iwamatsu1-0/+3
The lower 16 bits of the address, which is managed by mem_res, need to be zero. Check the address to verify this. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24PCI: rcar: Change PCIEPARL and PCIEPARH to PCIEPALR and PCIEPAURNobuhiro Iwamatsu1-4/+4
PCIEPARL and PCIEPARH are macros that calculate register addresses. However, the register names are incorrect. Change them to PCIEPALR and PCIEPAUR. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24PCI: rcar: Write zeroes to reserved PCIEPARL bitsNobuhiro Iwamatsu1-1/+2
The lower 7 bits of PCIEPARL are reserved. When we write to this register, these bits must be 0. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-23PCI: rcar: Fix position of MSI enable bitNobuhiro Iwamatsu1-1/+1
The MSI enable is bit 31, not bit 28. Set the correct bit to initialize MSI. Per Phil, "this is odd as MSI works before and after your patch. Since bit 31 just represents the value of MSICAP0[16].MSIE, I think this may just be used for endpoints. However, you are correct that the bit used was wrong." Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-10Merge tag 'pm+acpi-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pmLinus Torvalds4-8/+8
Pull ACPI and power management updates from Rafael Wysocki: "We have a few new features this time, including a new SFI-based cpufreq driver, a new devfreq driver for Tegra Activity Monitor, a new devfreq class for providing its governors with raw utilization data and a new ACPI driver for AMD SoCs. Still, the majority of changes here are reworks of existing code to make it more straightforward or to prepare it for implementing new features on top of it. The primary example is the rework of ACPI resources handling from Jiang Liu, Thomas Gleixner and Lv Zheng with support for IOAPIC hotplug implemented on top of it, but there is quite a number of changes of this kind in the cpufreq core, ACPICA, ACPI EC driver, ACPI processor driver and the generic power domains core code too. The most active developer is Viresh Kumar with his cpufreq changes. Specifics: - Rework of the core ACPI resources parsing code to fix issues in it and make using resource offsets more convenient and consolidation of some resource-handing code in a couple of places that have grown analagous data structures and code to cover the the same gap in the core (Jiang Liu, Thomas Gleixner, Lv Zheng). - ACPI-based IOAPIC hotplug support on top of the resources handling rework (Jiang Liu, Yinghai Lu). - ACPICA update to upstream release 20150204 including an interrupt handling rework that allows drivers to install raw handlers for ACPI GPEs which then become entirely responsible for the given GPE and the ACPICA core code won't touch it (Lv Zheng, David E Box, Octavian Purdila). - ACPI EC driver rework to fix several concurrency issues and other problems related to events handling on top of the ACPICA's new support for raw GPE handlers (Lv Zheng). - New ACPI driver for AMD SoCs analogous to the LPSS (Low-Power Subsystem) driver for Intel chips (Ken Xue). - Two minor fixes of the ACPI LPSS driver (Heikki Krogerus, Jarkko Nikula). - Two new blacklist entries for machines (Samsung 730U3E/740U3E and 510R) where the native backlight interface doesn't work correctly while the ACPI one does (Hans de Goede). - Rework of the ACPI processor driver's handling of idle states to make the code more straightforward and less bloated overall (Rafael J Wysocki). - Assorted minor fixes related to ACPI and SFI (Andreas Ruprecht, Andy Shevchenko, Hanjun Guo, Jan Beulich, Rafael J Wysocki, Yaowei Bai). - PCI core power management modification to avoid resuming (some) runtime-suspended devices during system suspend if they are in the right states already (Rafael J Wysocki). - New SFI-based cpufreq driver for Intel platforms using SFI (Srinidhi Kasagar). - cpufreq core fixes, cleanups and simplifications (Viresh Kumar, Doug Anderson, Wolfram Sang). - SkyLake CPU support and other updates for the intel_pstate driver (Kristen Carlson Accardi, Srinivas Pandruvada). - cpufreq-dt driver cleanup (Markus Elfring). - Init fix for the ARM big.LITTLE cpuidle driver (Sudeep Holla). - Generic power domains core code fixes and cleanups (Ulf Hansson). - Operating Performance Points (OPP) core code cleanups and kernel documentation update (Nishanth Menon). - New dabugfs interface to make the list of PM QoS constraints available to user space (Nishanth Menon). - New devfreq driver for Tegra Activity Monitor (Tomeu Vizoso). - New devfreq class (devfreq_event) to provide raw utilization data to devfreq governors (Chanwoo Choi). - Assorted minor fixes and cleanups related to power management (Andreas Ruprecht, Krzysztof Kozlowski, Rickard Strandqvist, Pavel Machek, Todd E Brandt, Wonhong Kwon). - turbostat updates (Len Brown) and cpupower Makefile improvement (Sriram Raghunathan)" * tag 'pm+acpi-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (151 commits) tools/power turbostat: relax dependency on APERF_MSR tools/power turbostat: relax dependency on invariant TSC Merge branch 'pci/host-generic' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into acpi-resources tools/power turbostat: decode MSR_*_PERF_LIMIT_REASONS tools/power turbostat: relax dependency on root permission ACPI / video: Add disable_native_backlight quirk for Samsung 510R ACPI / PM: Remove unneeded nested #ifdef USB / PM: Remove unneeded #ifdef and associated dead code intel_pstate: provide option to only use intel_pstate with HWP ACPI / EC: Add GPE reference counting debugging messages ACPI / EC: Add query flushing support ACPI / EC: Refine command storm prevention support ACPI / EC: Add command flushing support. ACPI / EC: Introduce STARTED/STOPPED flags to replace BLOCKED flag ACPI: add AMD ACPI2Platform device support for x86 system ACPI / table: remove duplicate NULL check for the handler of acpi_table_parse() ACPI / EC: Update revision due to raw handler mode. ACPI / EC: Reduce ec_poll() by referencing the last register access timestamp. ACPI / EC: Fix several GPE handling issues by deploying ACPI_GPE_DISPATCH_RAW_HANDLER mode. ACPICA: Events: Enable APIs to allow interrupt/polling adaptive request based GPE handling model ...
2015-02-10Merge tag 'pci-v3.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds13-408/+278
Pull PCI changes from Bjorn Helgaas: "Enumeration - Move domain assignment from arm64 to generic code (Lorenzo Pieralisi) - ARM: Remove artificial dependency on pci_sys_data domain (Lorenzo Pieralisi) - ARM: Move to generic PCI domains (Lorenzo Pieralisi) - Generate uppercase hex for modalias var in uevent (Ricardo Ribalda Delgado) - Add and use generic config accessors on ARM, PowerPC (Rob Herring) Resource management - Free resources on failure in of_pci_get_host_bridge_resources() (Lorenzo Pieralisi) - Fix infinite loop with ROM image of size 0 (Michel Dänzer) PCI device hotplug - Handle surprise add even if surprise removal isn't supported (Bjorn Helgaas) Virtualization - Mark AMD/ATI VGA devices that don't reset on D3hot->D0 transition (Alex Williamson) - Add DMA alias quirk for Adaptec 3405 (Alex Williamson) - Add Wellsburg (X99) to Intel PCH root port ACS quirk (Alex Williamson) - Add ACS quirk for Emulex NICs (Vasundhara Volam) MSI - Fail MSI-X mappings if there's no space assigned to MSI-X BAR (Yijing Wang) Freescale Layerscape host bridge driver - Fix platform_no_drv_owner.cocci warnings (Julia Lawall) NVIDIA Tegra host bridge driver - Remove unnecessary tegra_pcie_fixup_bridge() (Lucas Stach) Renesas R-Car host bridge driver - Fix error handling of irq_of_parse_and_map() (Dmitry Torokhov) TI Keystone host bridge driver - Fix error handling of irq_of_parse_and_map() (Dmitry Torokhov) - Fix misspelling of current function in debug output (Julia Lawall) Xilinx AXI host bridge driver - Fix harmless format string warning (Arnd Bergmann) Miscellaneous - Use standard parsing functions for ASPM sysfs setters (Chris J Arges) - Add pci_device_to_OF_node() stub for !CONFIG_OF (Kevin Hao) - Delete unnecessary NULL pointer checks (Markus Elfring) - Add and use defines for PCIe Max_Read_Request_Size (Rafał Miłecki) - Include clk.h instead of clk-private.h (Stephen Boyd)" * tag 'pci-v3.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits) PCI: Add pci_device_to_OF_node() stub for !CONFIG_OF PCI: xilinx: Convert to use generic config accessors PCI: xgene: Convert to use generic config accessors PCI: tegra: Convert to use generic config accessors PCI: rcar: Convert to use generic config accessors PCI: generic: Convert to use generic config accessors powerpc/powermac: Convert PCI to use generic config accessors powerpc/fsl_pci: Convert PCI to use generic config accessors ARM: ks8695: Convert PCI to use generic config accessors ARM: sa1100: Convert PCI to use generic config accessors ARM: integrator: Convert PCI to use generic config accessors PCI: versatile: Add DT-based ARM Versatile PB PCIe host driver ARM: dts: versatile: add PCI controller binding of/pci: Free resources on failure in of_pci_get_host_bridge_resources() PCI: versatile: Add DT docs for ARM Versatile PB PCIe driver PCI: Fail MSI-X mappings if there's no space assigned to MSI-X BAR r8169: use PCI define for Max_Read_Request_Size [SCSI] esas2r: use PCI define for Max_Read_Request_Size tile: use PCI define for Max_Read_Request_Size rapidio/tsi721: use PCI define for Max_Read_Request_Size ...
2015-02-10Merge branch 'acpi-resources'Rafael J. Wysocki3-6/+6
* acpi-resources: (23 commits) Merge branch 'pci/host-generic' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into acpi-resources x86/irq, ACPI: Implement ACPI driver to support IOAPIC hotplug ACPI: Add interfaces to parse IOAPIC ID for IOAPIC hotplug x86/PCI: Refine the way to release PCI IRQ resources x86/PCI/ACPI: Use common ACPI resource interfaces to simplify implementation x86/PCI: Fix the range check for IO resources PCI: Use common resource list management code instead of private implementation resources: Move struct resource_list_entry from ACPI into resource core ACPI: Introduce helper function acpi_dev_filter_resource_type() ACPI: Add field offset to struct resource_list_entry ACPI: Translate resource into master side address for bridge window resources ACPI: Return translation offset when parsing ACPI address space resources ACPI: Enforce stricter checks for address space descriptors ACPI: Set flag IORESOURCE_UNSET for unassigned resources ACPI: Normalize return value of resource parser functions ACPI: Fix a bug in parsing ACPI Memory24 resource ACPI: Add prefetch decoding to the address space parser ACPI: Move the window flag logic to the combined parser ACPI: Unify the parsing of address_space and ext_address_space ACPI: Let the parser return false for disabled resources ...
2015-02-05PCI: Use common resource list management code instead of private implementationJiang Liu3-6/+6
Use common resource list management data structure and interfaces instead of private implementation. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>