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2015-10-09PCI: mvebu: Split port parsing and resource claiming from port setupRussell King1-3/+12
Split the PCIe port DT parsing and resource claiming from setting up the actual ports. This allows us to gather all the resources first, before touching the hardware. This is important as some of these resources (such as the GPIO for the PCIe reset) may defer probing. Tested-by: Willy Tarreau <w@1wt.eu> (Iomega iConnect Kirkwood, MiraBox Armada 370) Tested-by: Andrew Lunn <andrew@lunn.ch> (D-Link DIR664 Kirkwood) Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-09PCI: mvebu: Fix memory leaks and refcount leaksRussell King1-7/+43
The mvebu PCI port parsing is weak due to: 1) allocations via kasprintf() were not cleaned up when we encounter an error or decide to skip the port. 2) kasprintf() wasn't checked for failure. 3) of_get_named_gpio_flags() returns EPROBE_DEFER if the GPIO is not present, not devm_gpio_request_one(). 4) the of_node was not being put when terminating the loop. Fix these oversights. Tested-by: Willy Tarreau <w@1wt.eu> (Iomega iConnect Kirkwood, MiraBox Armada 370) Tested-by: Andrew Lunn <andrew@lunn.ch> (D-Link DIR664 Kirkwood) Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-09PCI: mvebu: Move port parsing and resource claiming to separate functionRussell King1-56/+74
Move the PCIe port parsing and resource claiming to a separate function in preparation to add proper cleanup of claimed resources. Tested-by: Willy Tarreau <w@1wt.eu> (Iomega iConnect Kirkwood, MiraBox Armada 370) Tested-by: Andrew Lunn <andrew@lunn.ch> (D-Link DIR664 Kirkwood) Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-08PCI: mvebu: Use port->name rather than "PCIe%d.%d"Russell King1-8/+8
Use the port->name string which we previously formatted when referring to the name of a port, rather than manually creating the port name each time. Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Tested-by: Andrew Lunn <andrew@lunn.ch> (Kirkwood DIR665) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-08PCI: mvebu: Report full node name when reporting a DT errorRussell King1-1/+2
If we have a missing required property, report the full node name rather than a vague "PCIe DT node" statement. This allows the exact node in error to be identified immediately. Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Tested-by: Andrew Lunn <andrew@lunn.ch> (Kirkwood DIR665) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-08PCI: mvebu: Use for_each_available_child_of_node() to walk child nodesRussell King1-4/+1
Rather than using for_each_child_of_node() and testing each child's availability, use the for_each_available_child_of_node() helper instead. Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Tested-by: Andrew Lunn <andrew@lunn.ch> (Kirkwood DIR665) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-08PCI: mvebu: Use of_get_available_child_count()Russell King1-8/+3
Rather than open-coding of_get_available_child_count(), use the provided helper instead. Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Tested-by: Andrew Lunn <andrew@lunn.ch> (Kirkwood DIR665) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-08PCI: mvebu: Use exact config access size; don't read/modify/writeRussell King1-17/+26
The idea that you can arbitarily read 32-bits from PCI configuration space, modify a sub-field (like the command register) and write it back without consequence is deeply flawed. Status registers (such as the status register, PCIe device status register, etc) contain status bits which are read, write-one-to-clear. What this means is that reading 32-bits from the command register, modifying the command register, and then writing it back has the effect of clearing any status bits that were indicating at that time. Same for the PCIe device control register clearing bits in the PCIe device status register. Since the Armada chips support byte, 16-bit and 32-bit accesses to the registers (unless otherwise stated) and the PCI configuration data register does not specify otherwise, it seems logical that the chip can indeed generate the proper configuration access cycles down to byte level. Testing with an ASM1062 PCIe to SATA mini-PCIe card on Armada 388. PCIe capability at 0x80, DevCtl at 0x88, DevSta at 0x8a. Before: /# setpci -s 1:0.0 0x88.l - DevSta: CorrErr+ 00012810 /# setpci -s 1:0.0 0x88.w=0x2810 - Write DevCtl only /# setpci -s 1:0.0 0x88.l - CorrErr cleared - FAIL 00002810 After: /# setpci -s 1:0.0 0x88.l - DevSta: CorrErr+ 00012810 /# setpci -s 1:0.0 0x88.w=0x2810 - check DevCtl only write /# setpci -s 1:0.0 0x88.l - CorErr remains set 00012810 /# setpci -s 1:0.0 0x88.w=0x281f - check DevCtl write works /# setpci -s 1:0.0 0x88.l - devctl field updated 0001281f /# setpci -s 1:0.0 0x8a.w=0xffff - clear DevSta /# setpci -s 1:0.0 0x88.l - CorrErr now cleared 0000281f /# setpci -s 1:0.0 0x88.w=0x2810 - restore DevCtl /# setpci -s 1:0.0 0x88.l - check 00002810 [bhelgaas: changelog] Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Tested-by: Andrew Lunn <andrew@lunn.ch> (Kirkwood DIR665) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-08PCI: mvebu: Return zero for reserved or unimplemented config spaceRussell King1-2/+7
PCI requires reads to reserved or unimplemented configuration space to return zero and complete normally (see PCI r3.0, sec 6.1). However, the root port software implementation was returning 0xfffffff and PCIBIOS_BAD_REGISTER_NUMBER. Return zero when reading reserved or unimplemented config space. [bhelgaas: changelog] Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> (Armada XP GP) Tested-by: Andrew Lunn <andrew@lunn.ch> (Kirkwood DIR665) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-08PCI: generic: Pass starting bus number to pci_scan_root_bus()David Daney1-1/+2
If the bus is being configured with a bus-range that does not start at zero, pass that starting bus number to pci_scan_root_bus(). Passing the incorrect value of zero causes attempted config accesses outside of the supported range, which cascades to an OOPs spew and eventual kernel panic. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Will Deacon <will.deacon@arm.com>
2015-10-08PCI: generic: Allow multiple hosts with different map_bus() methodsDavid Daney1-12/+15
The generic driver kept a global struct pci_ops ("gen_pci_ops") which it patched with the .map_bus() method appropriate for the bus device. This is a problem when we have two different types of bus devices: the .map_bus() method for the last device probed clobbers the method for previous devices. The result is that only the last bus device probed has the correct .map_bus(), and the others fail. Move the struct pci_ops into the bus-specific structure and initialize a pointer to it when the bus device is probed. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Will Deacon <will.deacon@arm.com>
2015-09-25PCI/MSI: xgene: Remove msi_controller assignmentDuc Dang1-22/+0
After 8d63bc7beaee ("PCI/MSI: pci-xgene-msi: Get rid of struct msi_controller"), it is no longer required to assign msi_controller for X-Gene PCIe host bridge to support MSI. Remove this unnecessary code. This also avoids a warning message ("failed to enable MSI") during boot. [bhelgaas: changelog] Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Tanmay Inamdar <tinamdar@apm.com>
2015-09-25PCI: iproc: Improve link detection logicRay Jui1-6/+23
Improve the link detection logic by explicitly querying the link status register to ensure link is active. Also force class to PCI_CLASS_BRIDGE_PCI (0x0604) through the host configuration space register. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com>
2015-09-25PCI: iproc: Fix PCIe reset logicRay Jui1-5/+10
The current reset logic does not always properly reset the device. For example, in the case when the perst_b signal is already de-asserted in the bootloader, the current reset logic fails to trigger a proper assert -> de-assert reset sequence. Fix the issue by always triggering the proper reset sequence. Also explicitly select the desired reset source, i.e., perst_b, and reduce the wait time after the device comes out of reset from 250 ms to 100 ms, based on recommendation from the ASIC team. Tested-by: Vladimir Dreizin <vdreizin@broadcom.com> Tested-by: Darren Edamura <dedamura@broadcom.com> Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Dreizin <vdreizin@broadcom.com> Reviewed-by: Trac Hoang <trhoang@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com>
2015-09-25PCI: iproc: Call pci_fixup_irqs() for ARM64 as well as ARMRay Jui1-2/+0
After 459a07721c11 ("PCI: Build setup-irq.o for arm64"), we build setup-irq.o for arm64, so we can use pci_fixup_irqs() on both arm and arm64. Remove the "#ifdef CONFIG_ARM" around the call to pci_fixup_irqs(). [bhelgaas: changelog] Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-09-25PCI: iproc: Remove unused struct iproc_pcie.irqs[]Ray Jui1-3/+0
Remove unused struct iproc_pcie member irqs[] and unused #define IPROC_PCIE_MAX_NUM_IRQS. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-09-25PCI: iproc: Fix code comment to match codeRay Jui1-1/+1
Fix code comment in pcie-iproc.h so it matches the code. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-09-25Merge tag 'pci-v4.3-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pciLinus Torvalds1-0/+1
Pull PCI fixes from Bjorn Helgaas: "These are fixes for things we merged for v4.3 (VPD, MSI, and bridge window management), and a new Renesas R8A7794 SoC device ID. Details: Resource management: - Revert pci_read_bridge_bases() unification (Bjorn Helgaas) - Clear IORESOURCE_UNSET when clipping a bridge window (Bjorn Helgaas) MSI: - Fix MSI IRQ domains for VFs on virtual buses (Alex Williamson) Renesas R-Car host bridge driver: - Add R8A7794 support (Sergei Shtylyov) Miscellaneous: - Fix devfn for VPD access through function 0 (Alex Williamson) - Use function 0 VPD only for identical functions (Alex Williamson)" * tag 'pci-v4.3-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: rcar: Add R8A7794 support PCI: Use function 0 VPD for identical functions, regular VPD for others PCI: Fix devfn for VPD access through function 0 PCI/MSI: Fix MSI IRQ domains for VFs on virtual buses PCI: Clear IORESOURCE_UNSET when clipping a bridge window PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code"
2015-09-24PCI: imx6: Add PCIE_PHY_RX_ASIC_OUT_VALID definitionFabio Estevam1-1/+2
Add a #define for PCIE_PHY_RX_ASIC_OUT_VALID and use it instead of a hardcoded value. [bhelgaas: drop PCIE_PHY_DEBUG_R0_LTSSM_MASK; updated in future patch] Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2015-09-24PCI: imx6: Return real error code from imx6_add_pcie_port()Fabio Estevam1-1/+1
When devm_request_irq() fails, imx6_add_pcie_port() should return the real error code instead of always returning -ENODEV. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2015-09-24PCI: rcar: Add R8A7794 supportSergei Shtylyov1-0/+1
Add Renesas R8A7794 SoC support to the Renesas R-Car gen2 PCI driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2015-09-18PCI: designware: Make get_msi_addr() return phys_addr_t, not u32Lucas Stach3-3/+3
Make get_msi_addr() return phys_addr_t, not u32. This allows the MSI target address to be above 4GB for 64bit or PAE systems. No functional change for the current 32bit platform users as phys_addr_t maps to u32 for them. [bhelgaas: changelog] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-09-18PCI: designware: Implement multivector MSI IRQ setupLucas Stach1-0/+31
Implement multivector MSI IRQ setup. This allows to set up and use multiple MSI IRQs per device. [bhelgaas: changelog, use -EINVAL instead of -ENOSYS] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-09-18PCI: designware: Factor out MSI msg setupLucas Stach1-11/+17
Factor out the PCI MSI message setup from the single MSI setup function. This will be reused by the multivector MSI setup. No functional change yet. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-09-18PCI: designware: Fix PORT_LOGIC_LINK_WIDTH_MASKZhou Wang1-1/+1
The value under PORT_LOGIC_LINK_WIDTH_MASK is 0x1, 0x2, 0x4, 0x8. In IP v4.2, bits [16:8] are defined for NUM_OF_LANES. But in IP v4.4, bits[12:8] are defined for NUM_OF_LANES, bits [16:13] are for other usages (bit 16 is AUTO_LANE_FLIP_CTRL_EN, bits [15:13] are PRE_DET_LANE). As there is no conflict about NUM_OF_LANES between v4.2 and v4.4, change the mask value to avoid future problems. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com>
2015-09-17PCI: generic: Fix lookup of linux,pci-probe-only propertyMarc Zyngier1-8/+1
When pci-host-generic looks for the probe-only property, it seems to trust the DT to be correctly written, and assumes that there is a parameter to the property. Unfortunately, this is not always the case, and some firmware expose this property naked. The driver ends up making a decision based on whatever the property pointer points to, which is likely to be junk. Switch to the common of_pci.c implementation that doesn't suffer from this problem. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Will Deacon <will.deacon@arm.com>
2015-09-16genirq: Remove irq argument from irq flow handlersThomas Gleixner2-4/+3
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-09-14PCI: tegra: Wrap static pgprot_t initializer with __pgprot()Ard Biesheuvel1-2/+2
Wrap pgprot_t initializer with __pgprot() to comply with the STRICT_MM_TYPECHECKS rules. [bhelgaas: changelog] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Thierry Reding <treding@nvidia.com>
2015-09-01Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds5-60/+47
Pull irq updates from Thomas Gleixner: "This updated pull request does not contain the last few GIC related patches which were reported to cause a regression. There is a fix available, but I let it breed for a couple of days first. The irq departement provides: - new infrastructure to support non PCI based MSI interrupts - a couple of new irq chip drivers - the usual pile of fixlets and updates to irq chip drivers - preparatory changes for removal of the irq argument from interrupt flow handlers - preparatory changes to remove IRQF_VALID" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits) irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 irqchip: Add documentation for the bcm2836 interrupt controller irqchip/bcm2835: Add support for being used as a second level controller irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ PCI: xilinx: Fix typo in function name irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance irqchip/gic: Only allow the primary GIC to set the CPU map PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove unicore32/irq: Prepare puv3_gpio_handler for irq argument removal tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal m68k/irq: Prepare irq handlers for irq argument removal C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal blackfin: Prepare irq handlers for irq argument removal arc/irq: Prepare idu_cascade_isr for irq argument removal sparc/irq: Use access helper irq_data_get_affinity_mask() sparc/irq: Use helper irq_data_get_irq_handler_data() parisc/irq: Use access helper irq_data_get_affinity_mask() mn10300/irq: Use access helper irq_data_get_affinity_mask() irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal ...
2015-09-01Merge tag 'armsoc-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-2/+2
Pull ARM SoC 64-bit changes from Olof Johansson: "Here's our branch of ARM64 contents for this merge window. Most of this is DT contents for new SoCs (or those who have seen new device support added). Maybe we should stop separating out the arm64 contents here to avoid the kind of internal conflicts as we got this time around, where 32- and 64-bit contents conflicted. Anyhow, on the actual contents: New SoCs: - Broadcom North Star 2 (ns2) - Marvell Berlin4CT - Mediatek MT6795 - Rockchip RK3368 In addition, there are enhancements for the following platforms: - Mediatek MT8173: cpuidle-dt updates, misc other additions - ZyncMP: A bunch of devices added to the existing DTSI - Qualcomm MSM8916 and APQ8016 updates for USB, etc. + a handful of other updates for various platforms" * tag 'armsoc-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (47 commits) ARM64: dts: vexpress: Use assigned-clock-parents for sp810 ARM64: dts: mt6795: enable basic SMP bringup for MT6795 arm64: Enable Marvell Berlin SoC family in defconfig arm64: Enable Marvell Berlin SoC family in Kconfig arm64: dts: Add dts files for Marvell Berlin4CT SoC ARM64: zynqmp: Move SPI nodes to the right location ARM64: zynqmp: Move uart and ttcs to the right location ARM64: zynqmp: Enable spi flashes on ep108 ARM64: zynqmp: Add eeprom memories on i2c bus ARM64: zynqmp: Enable sdhci on ep108 ARM64: zynqmp: Enable watchdog on ep108 ARM64: zynqmp: Add DWC3 usb support ARM64: zynqmp: Add SMMU support ARM64: zynqmp: Add CANs node for platform ARM64: zynqmp: Use zynqmp specific compatible string for gpio devicetree: xilinx: zynqmp: add sata node PCI: iproc: Fix BCMA dependency in Kconfig arm64: dts: Add Broadcom North Star 2 support arm64: Add Broadcom iProc family support PCI: iproc: Fix ARM64 dependency in Kconfig ...
2015-08-28Merge branches 'pci/enumeration' and 'pci/misc' into nextBjorn Helgaas6-26/+53
* pci/enumeration: PCI: Set MPS to match upstream bridge PCI: Move MPS configuration check to pci_configure_device() PCI: Drop references acquired by of_parse_phandle() PCI/MSI: Remove unused pcibios_msi_controller() hook ARM/PCI: Remove msi_controller from struct pci_sys_data ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi() PCI: Add pci_scan_root_bus_msi() ARM/PCI: Replace panic with WARN messages on failures PCI: generic: Add arm64 support PCI: Build setup-irq.o for arm64 PCI: generic: Remove dependency on ARM-specific struct hw_pci ARM/PCI: Set MPS before pci_bus_add_devices() * pci/misc: PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCI
2015-08-24Merge branches 'pci/host-dra7xx', 'pci/host-imx6' and 'pci/host-spear' into nextBjorn Helgaas3-13/+4
* pci/host-dra7xx: PCI: dra7xx: Remove unneeded use of IS_ERR_VALUE() * pci/host-imx6: PCI: imx6: Simplify a trivial if-return sequence * pci/host-spear: PCI: spear: Use BUG_ON() instead of condition followed by BUG()
2015-08-20PCI: Drop references acquired by of_parse_phandle()Bjorn Helgaas2-0/+2
of_parse_phandle() returns a device_node pointer with the refcount incremented. We should dispose of this reference when we're finished. Drop the reference acquired by of_parse_phandle(). Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2015-08-20ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi()Lorenzo Pieralisi2-6/+17
ARM previously stored the msi_controller pointer in its sysdata, struct pci_sys_data, and implemented pcibios_msi_controller() to retrieve it. That made PCI host controller drivers specific to ARM because they had to put the msi_controller pointer in the ARM-specific pci_sys_data. There is now a generic mechanism, pci_scan_root_bus_msi(), for giving the msi_controller pointer to the PCI core. Use this for all ARM systems and for the DesignWare and Xilinx PCI host controller drivers. This removes an ARM dependency from the DesignWare, DRA7xx, EXYNOS, i.MX6, Keystone, Layerscape, SPEAr13xx, and Xilinx drivers. [bhelgaas: changelog, split into separate patch] Suggested-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Pratyush Anand <pratyush.anand@gmail.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Simon Horman <horms@verge.net.au> CC: Russell King <linux@arm.linux.org.uk> CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> CC: Thierry Reding <thierry.reding@gmail.com> CC: Michal Simek <michal.simek@xilinx.com> CC: Marc Zyngier <marc.zyngier@arm.com>
2015-08-20PCI: generic: Add arm64 supportJayachandran C1-1/+1
Make pci-host-generic driver (kernel option PCI_HOST_GENERIC) available on arm64. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-08-20PCI: generic: Remove dependency on ARM-specific struct hw_pciJayachandran C1-19/+33
The generic OF-based host controller driver uses pci_common_init_dev(), which is ARM-specific and requires the ARM struct hw_pci. The part of pci_common_init_dev() that is needed is limited and can be done here without using hw_pci. Note that the ARM pcibios functions expect the PCI sysdata to be a pointer to a struct pci_sys_data. Add a struct pci_sys_data as the first element in struct gen_pci so that when we use a gen_pci pointer as sysdata, it is also a pointer to a struct pci_sys_data. Create and scan the root bus directly without using the ARM pci_common_init_dev() interface. [bhelgaas: changelog, move pcie_bus_configure_settings() before pci_bus_add_devices(), combine !PCI_PROBE_ONLY blocks] Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by: Pavel Fedin <p.fedin@samsung.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2015-08-20PCI: imx6: Simplify a trivial if-return sequenceFabio Estevam1-10/+2
Simplify a trivial if-return sequence by combining it with a preceding function call. The semantic patch that makes this change is available in scripts/coccinelle/misc/simple_return.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Lucas Stach <l.stach@pengutronix.de>
2015-08-20PCI: spear: Use BUG_ON() instead of condition followed by BUG()Fabio Estevam1-2/+1
Use BUG_ON() instead of an if condition followed by BUG(). The semantic patch that makes this change is available in scripts/coccinelle/misc/bugon.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Pratyush Anand <pratyush.anand@gmail.com>
2015-08-20PCI: dra7xx: Remove unneeded use of IS_ERR_VALUE()Fabio Estevam1-1/+1
There is no need to use the IS_ERR_VALUE() macro for checking the return value from pm_runtime_* functions. Test for a negative pm_runtime_get_sync() return value instead of using IS_ERR_VALUE(). The semantic patch that makes this change is available in scripts/coccinelle/api/pm_runtime.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Kishon Vijay Abraham I <kishon@ti.com>
2015-08-18PCI: xilinx: Fix typo in function nameJiang Liu1-1/+1
There's a typo in commit e39758e0ea76 in linux-next, which incorrectly spells "msi_desc_to_pci_sysdata()" as "msi_desc_to_pci_sys_data()" and causes build failure: > ../drivers/pci/host/pcie-xilinx.c:235:3: error: implicit declaration of function 'msi_desc_to_pci_sys_data' [-Werror=implicit-function-declaration] Fixes: e39758e0ea76 "PCI: Use helper functions to access fields in struct msi_desc" Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Mark Brown <broonie@kernel.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Cc: Srikanth Thokala <sthokal@xilinx.com> Cc: Rob Herring <robh@kernel.org> Cc: Yijing Wang <wangyijing@huawei.com> Link: http://lkml.kernel.org/r/1439912763-10645-1-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-08-14Merge branches 'pci/host-dra7xx' and 'pci/host-iproc' into nextBjorn Helgaas4-32/+153
* pci/host-dra7xx: ARM: dts: am57xx-evm: Add 'gpios' property with gpio2_8 PCI: dra7xx: Add support to make GPIO drive PERST# line PCI: dra7xx: Clear MSE bit during suspend so clocks will idle PCI: dra7xx: Add PM support PCI: dra7xx: Disable pm_runtime on get_sync failure * pci/host-iproc: PCI: iproc: Allow BCMA bus driver to be built as module PCI: iproc: Add arm64 support PCI: iproc: Delete unnecessary checks before phy calls
2015-08-14Merge branches 'pci/hotplug', 'pci/iommu', 'pci/irq' and 'pci/virtualization' into nextBjorn Helgaas7-9/+0
* pci/hotplug: PCI: pciehp: Remove ignored MRL sensor interrupt events PCI: pciehp: Remove unused interrupt events PCI: pciehp: Handle invalid data when reading from non-existent devices PCI: Hold pci_slot_mutex while searching bus->slots list PCI: Protect pci_bus->slots with pci_slot_mutex, not pci_bus_sem PCI: pciehp: Simplify pcie_poll_cmd() PCI: Use "slot" and "pci_slot" for struct hotplug_slot and struct pci_slot * pci/iommu: PCI: Remove pci_ats_enabled() PCI: Stop caching ATS Invalidate Queue Depth PCI: Move ATS declarations to linux/pci.h so they're all together PCI: Clean up ATS error handling PCI: Use pci_physfn() rather than looking up physfn by hand PCI: Inline the ATS setup code into pci_ats_init() PCI: Rationalize pci_ats_queue_depth() error checking PCI: Reduce size of ATS structure elements PCI: Embed ATS info directly into struct pci_dev PCI: Allocate ATS struct during enumeration iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth * pci/irq: PCI: Kill off set_irq_flags() usage * pci/virtualization: PCI: Add ACS quirks for Intel I219-LM/V
2015-08-11PCI: dra7xx: Add support to make GPIO drive PERST# lineKishon Vijay Abraham I1-2/+22
The PERST# line in am57x-evm is connected to a GPIO line and PERST# should be driven high to indicate the clocks are stable (As per Figure 2-10: Power Up of the PCIe CEM spec 3.0). Add support to make GPIO drive PERST# line. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-08-11PCI: dra7xx: Clear MSE bit during suspend so clocks will idleKishon Vijay Abraham I1-0/+40
DRA7xx requires the MSE bit to be cleared to set the master in standby mode. (In DRA7xx TRM_vE, section 24.9.4.5.2.2.1 PCIe Controller Master Standby Behavior advises to use the clearing of the local MSE bit to set the master in standby. Without this some of the clocks do not idle). Clear the MSE bit on suspend and enable it on resume. Clearing MSE bit is required to get clocks to be idled after suspend. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jingoo Han <jingoohan1@gmail.com>
2015-08-11PCI: dra7xx: Add PM supportKishon Vijay Abraham I1-0/+51
Add PM support to pci-dra7xx so PCI clocks can be disabled during suspend and enabled during resume without affecting PCI functionality. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jingoo Han <jingoohan1@gmail.com>
2015-08-11PCI: dra7xx: Disable pm_runtime on get_sync failureKishon Vijay Abraham I1-1/+3
Fix the error handling when pm_runtime_get_sync() fails. If pm_runtime_get_sync() fails, call pm_runtime_disable() so there are no unbalanced pm_runtime_enable() calls. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jingoo Han <jingoohan1@gmail.com>
2015-08-11PCI: iproc: Allow BCMA bus driver to be built as moduleHauke Mehrtens1-1/+1
Change CONFIG_PCIE_IPROC_BCMA to tristate to make it possible to build this driver as a module. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Ray Jui <rjui@broadcom.com>
2015-08-11PCI: Kill off set_irq_flags() usageRob Herring7-9/+0
set_irq_flags is ARM-specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions, and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE, and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Kishon Vijay Abraham I <kishon@ti.com> CC: Murali Karicheri <m-karicheri2@ti.com> CC: Thierry Reding <thierry.reding@gmail.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Alexandre Courbot <gnurou@gmail.com> CC: Jingoo Han <jingoohan1@gmail.com> CC: Pratyush Anand <pratyush.anand@gmail.com> CC: Simon Horman <horms@verge.net.au> CC: Michal Simek <michal.simek@xilinx.com> CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
2015-08-04Merge branches 'pci/host-designware', 'pci/host-xgene' and 'pci/host-xilinx' into nextBjorn Helgaas4-11/+21
* pci/host-designware: PCI: designware: Don't complain missing *config* reg space if va_cfg0 is set * pci/host-xgene: PCI: xgene: Add support for a 64-bit prefetchable memory window arm64: dts: Add APM X-Gene PCIe 64-bit prefetchable window PCI: xgene: Drop owner assignment from platform_driver * pci/host-xilinx: PCI: xilinx: Check for MSI interrupt flag before handling as INTx
2015-08-01PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/removeThomas Gleixner1-8/+6
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Duc Dang <dhdang@apm.com>
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