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2018-06-04ACPI / hotplug / PCI: Mark stale PCI devices disconnectedMika Westerberg1-0/+5
Following PCIehp mark the unplugged PCI devices disconnected. This makes sure PCI core code leaves the now missing hardware registers alone. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-06-04ACPI / hotplug / PCI: Don't scan bridges managed by native hotplugMika Westerberg1-17/+58
When acpiphp re-enumerates a PCI hierarchy because of an ACPI Notify() event, we should skip bridges managed by native hotplug (pciehp or shpchp). We don't want to scan below a native hotplug bridge until the hotplug controller generates a hot-add event. A typical scenario is a Root Port leading to a Thunderbolt host router that remains powered off until something is connected to it. See [1] for the lspci details. 1. Before something is connected, only the Root Port exists. It has PCI_EXP_SLTCAP_HPC set and pciehp is responsible for hotplug: 00:1b.0 Root Port (HotPlug+) 2. When a USB-C or Thunderbolt device is connected, the Switch in the Thunderbolt host router is powered up, the Root Port signals a hotplug add event and pciehp enumerates the Switch: 01:00.0 Switch Upstream Port to [bus 02-39] 02:00.0 Switch Downstream Port to [bus 03] (HotPlug-, to NHI) 02:01.0 Switch Downstream Port to [bus 04-38] (HotPlug+, to Thunderbolt connector) 02:02.0 Switch Downstream Port to [bus 39] (HotPlug-, to xHCI) The 02:00.0 and 02:02.0 Ports lead to Endpoints that are not powered up yet. The Ports have PCI_EXP_SLTCAP_HPC cleared, so pciehp doesn't handle hotplug for them and we assign minimal resources to them. The 02:01.0 Port has PCI_EXP_SLTCAP_HPC set, so pciehp handles native hotplug events for it. 3. The BIOS powers up the xHCI controller. If a Thunderbolt device was connected (not just a USB-C device), it also powers up the NHI. Then it sends an ACPI Notify() to the Root Port, and acpiphp enumerates the new device(s): 03:00.0 Thunderbolt Host Controller (NHI) Endpoint 39:00.0 xHCI Endpoint 4. If a Thunderbolt device was connected, the host router firmware uses the NHI to set up Thunderbolt tunnels and triggers a native hotplug event (via 02:01.0 in this example). Then pciehp enumerates the new Thunderbolt devices: 04:00.0 Switch Upstream Port to [bus 05-38] 05:01.0 Switch Downstream Port to [bus 06-09] (HotPlug-) 05:04.0 Switch Downstream Port to [bus 0a-38] (HotPlug+) In this example, 05:01.0 leads to another Switch and some NICs. This subtree is static, so 05:01.0 doesn't support hotplug and has PCI_EXP_SLTCAP_HPC cleared. In step 3, acpiphp previously enumerated everything below the Root Port, including things below the 02:01.0 Port. We don't want that because pciehp expects to manage hotplug below that Port, and firmware on the host router may be in the middle of configuring its Link so it may not be ready yet. To make this work better with the native PCIe (pciehp) and standard PCI (shpchp) hotplug drivers, we let them handle all slot management and resource allocation for hotplug bridges and restrict ACPI hotplug to non-hotplug bridges. [1] https://bugzilla.kernel.org/show_bug.cgi?id=199581#c5 Link: https://lkml.kernel.org/r/20180529160155.1738-1-mika.westerberg@linux.intel.com Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: changelog, use hotplug_is_native() instead of dev->is_hotplug_bridge] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-06-04PCI: shpchp: Add shpchp_is_native()Mika Westerberg4-16/+32
In the same way we do for pciehp, add shpchp_is_native(), which returns true if the bridge should be handled by the native SHPC driver. Then convert the driver to use this function. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-04PCI: shpchp: Fix AMD POGO identificationBjorn Helgaas1-4/+4
The fix for an AMD POGO erratum related to SHPC incorrectly identified the device. The workaround should be applied only for AMD POGO devices, but it was instead applied to: - all AMD bridges, and - all devices from any vendor with device ID 0x7458 Fixes: 53044f357448 ("[PATCH] PCI Hotplug: shpchp: AMD POGO errata fix") Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-04PCI: mobiveil: Add MSI supportSubrahmanya Lingappa1-4/+202
Implement MSI support for Mobiveil PCIe Host Bridge IP device driver. Signed-off-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Marc Zyngier <marc.zyngier@arm.com>
2018-06-04PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driverSubrahmanya Lingappa1-0/+669
Add a driver for Mobiveil AXI PCIe Host Bridge Soft IP - GPEX 4.0, a PCIe gen4 IP. This IP has upto 8 outbound and inbound windows for the address translation. Signed-off-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [bhelgaas: fold in mobiveil_pcie_of_match[] NULL termination from Wei Yongjun <weiyongjun1@huawei.com>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Marc Zyngier <marc.zyngier@arm.com>
2018-06-02PCI/AER: Decode Error Source Requester IDBjorn Helgaas1-7/+11
Decode the Requester ID from the AER Error Source Register into domain/ bus/device/function format to match other logging. In cases where the ID matches the device used for pci_err(), drop the extra ID completely so we don't print it twice. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-02PCI/AER: Remove aer_recover_work_func() forward declarationBorislav Petkov1-24/+24
Just move the actual function up so that it is visible to its user aer_recover_queue(). No functional changes. Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-02PCI/DPC: Use the generic pcie_do_fatal_recovery() pathOza Pawandeep1-20/+33
Our goal is to handle ERR_FATAL errors similarly, whether they are reported via AER or via DPC. A previous commit changed AER so it handles ERR_FATAL by calling driver .remove() methods and resetting the Link. DPC already does that (although the Link reset is done automatically by hardware and happens before we call the driver .remove() methods). Restructure the DPC code so it calls the same pcie_do_fatal_recovery() interface used by AER. This makes it clearer that we want to use the same path. Implement the .reset_link() method used by pcie_do_fatal_recovery(). For DPC, the actual reset is done automatically by hardware, so we really only have to wait for the Link to be inactive, then release the Port from DPC. Signed-off-by: Oza Pawandeep <poza@codeaurora.org> [bhelgaas: changelog, DPC_FATAL is not a bitfield, can be sequential] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-02PCI/AER: Pass service type to pcie_do_fatal_recovery()Oza Pawandeep3-8/+9
Pass the service type to pcie_do_fatal_recovery() instead of assuming AER. We will make DPC also use pcie_do_fatal_recovery(), and it needs to do things a little differently for AER and DPC. Signed-off-by: Oza Pawandeep <poza@codeaurora.org> [bhelgaas: split to separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-02PCI/DPC: Disable ERR_NONFATAL handling by DPCOza Pawandeep1-2/+2
PCIe ERR_NONFATAL errors mean a particular transaction is unreliable but the Link is otherwise fully functional (PCIe r4.0, sec 6.2.2). The AER driver handles these by logging the error details and calling driver-supplied pci_error_handlers callbacks. It does not reset downstream devices, does not remove them from the PCI subsystem, does not re-enumerate them, and does not call their driver .remove() or .probe() methods. But DPC driver previously enabled DPC on ERR_NONFATAL, so if the hardware supports DPC, these errors caused a Link reset (performed automatically by the hardware), followed by the DPC driver removing affected devices (which calls their .remove() methods), bringing the Link back up, and re-enumerating (which calls driver .probe() methods). Disable ERR_NONFATAL DPC triggering so these errors will only be handled by AER. This means drivers won't have to deal with different usage of their pci_error_handlers callbacks and .probe() and .remove() methods based on whether the platform has DPC support. Signed-off-by: Oza Pawandeep <poza@codeaurora.org> [bhelgaas: changelog] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-02PCI/portdrv: Add generic pcie_port_find_device()Oza Pawandeep2-0/+24
Add generic pcie_port_find_device() routine. Signed-off-by: Oza Pawandeep <poza@codeaurora.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Keith Busch <keith.busch@intel.com>
2018-06-02PCI: shpchp: Use dev_printk() for OSHP-related messagesBjorn Helgaas1-7/+6
Use dev_printk() for messages related to requesting control of SHPC hotplug via the OSHP method. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-02PCI: shpchp: Remove get_hp_hw_control_from_firmware() wrapperMika Westerberg2-11/+1
get_hp_hw_control_from_firmware() is a trivial wrapper around acpi_get_hp_hw_control_from_firmware(), probably intended to be generic in case other firmware needed similar OS/platform negotiation. Remove get_hp_hw_control_from_firmware() and call acpi_get_hp_hw_control_from_firmware() directly. Add a stub for acpi_get_hp_hw_control_from_firmware() for the non-ACPI case. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-02PCI: shpchp: Remove acpi_get_hp_hw_control_from_firmware() flagsMika Westerberg2-4/+2
acpi_get_hp_hw_control_from_firmware() no longer uses the flags parameter, so remove it. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: split to separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-02PCI: shpchp: Rely on previous _OSC resultsMika Westerberg1-19/+10
If _OSC exists, we evaluated it when adding the ACPI host bridge, and we requested SHPC control if the SHPC driver is present. Use the result of that _OSC evaluation instead of evaluating it again. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: split to separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-02PCI: shpchp: Request SHPC control via _OSC when adding host bridgeMika Westerberg1-0/+1
The SHPC driver now must be builtin (it cannot be a module). If it is present, request SHPC control immediately when adding the ACPI host bridge. This is similar to how we handle native PCIe hotplug via pciehp. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: split to separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-02PCI: shpchp: Convert SHPC to be builtin onlyMika Westerberg1-4/+1
We need to be able coordinate between SHPC and acpiphp to determine which driver handles hotplug of a given bridge. Because acpiphp is already bool, convert SHPC to be bool as well. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-02PCI: pciehp: Make pciehp_is_native() stricterMika Westerberg2-14/+14
Previously pciehp_is_native() returned true for any PCI device in a hierarchy where _OSC says we can use pciehp. This is incorrect because bridges without PCI_EXP_SLTCAP_HPC capability should be managed by acpiphp instead. Improve pciehp_is_native() to return true only when PCI_EXP_SLTCAP_HPC is set and the pciehp driver is present. In any other case return false to let acpiphp handle those. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: remove NULL pointer check] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-02PCI: pciehp: Rename host->native_hotplug to host->native_pcie_hotplugMika Westerberg2-2/+2
Rename host->native_hotplug to host->native_pcie_hotplug to make room for a similar flag for SHPC hotplug. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: split to separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-30PCI: Enable PCI_DOMAINS along with generic PCI host controllerJan Kiszka1-0/+1
The generic PCI host controller is often instantiated by hypervisors, and they may add several of them or add them in addition to a physical host controller like the Jailhouse hypervisor is doing. Therefore, allow for multiple domains so that we can handle them all. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-30PCI: Add support for unbinding the generic PCI host controllerJan Kiszka2-0/+14
Add support for unbinding the generic PCI host controller. This is particularly useful when working in virtual environments where the controller may come and go, but possibly not only there. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Will Deacon <will.deacon@arm.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-30PCI: Rework of_pci_get_host_bridge_resources() to devm_of_pci_get_host_bridge_resources()Jan Kiszka13-30/+24
of_pci_get_host_bridge_resources() allocates the resource structures it fills dynamically, but none of its callers care to release them so far. Rather than requiring everyone to do this explicitly, convert the existing function to a managed version. Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-30PCI: Use dev_printk() in of_pci_get_host_bridge_resources()Jan Kiszka1-10/+10
Now that we have a device reference, make use of it for printing. Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
2018-05-30PCI: Pass struct device to of_pci_get_host_bridge_resources()Jan Kiszka13-28/+27
Another step towards a managed version of of_pci_get_host_bridge_resources(): Feed in the underlying device, rather than just the OF node. This will allow us to use managed resource allocation internally later on. Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Joao Pinto <Joao.Pinto@synopsys.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-30PCI: Rename of_pci_get_host_bridge_resources() device node parameterJan Kiszka1-9/+9
We will add a "struct device *dev" parameter to this function soon, so rename the existing "struct device_node *dev" parameter to "dev_node". Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
2018-05-30PCI: Fix devm_pci_alloc_host_bridge() memory leakJan Kiszka1-1/+3
Fix a memory leak by freeing the PCI resource list in devm_pci_release_host_bridge_dev(). Fixes: 5c3f18cce083 ("PCI: Add devm_pci_alloc_host_bridge() interface") Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-25PCI: Remove unused pcie_get_minimum_link()Bjorn Helgaas1-43/+0
In some cases pcie_get_minimum_link() returned misleading information because it found the slowest link and the narrowest link without considering the total bandwidth of the link. For example, consider a path with these two links: - 16.0 GT/s x1 link (16.0 * 10^9 * 128 / 130) * 1 / 8 = 1969 MB/s - 2.5 GT/s x16 link ( 2.5 * 10^9 * 8 / 10) * 16 / 8 = 4000 MB/s The available bandwidth of the path is limited by the 16 GT/s link to about 1969 MB/s, but pcie_get_minimum_link() returned 2.5 GT/s x1, which corresponds to only 250 MB/s. Callers should use pcie_print_link_status() instead, or pcie_bandwidth_available() if they need more detailed information. Remove pcie_get_minimum_link() since there are no callers left. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-25PCI: Prevent sysfs disable of device while driver is attachedChristoph Hellwig1-6/+9
Manipulating the enable_cnt behind the back of the driver will wreak complete havoc with the kernel state, so disallow it. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Acked-by: Keith Busch <keith.busch@intel.com>
2018-05-25PCI/IOV: Allow PF drivers to limit total_VFs to 0Jakub Kicinski1-4/+2
Some SR-IOV PF drivers implement .sriov_configure(), which allows user-space to enable VFs by writing the desired number of VFs to the sysfs "sriov_numvfs" file (see sriov_numvfs_store()). The PCI core limits the number of VFs to the TotalVFs advertised by the device in its SR-IOV capability. The PF driver can limit the number of VFs to even fewer (it may have pre-allocated data structures or knowledge of device limitations) by calling pci_sriov_set_totalvfs(), but previously it could not limit the VFs to 0. Change pci_sriov_get_totalvfs() so it always respects the VF limit imposed by the PF driver, even if the limit is 0. This sequence: pci_sriov_set_totalvfs(dev, 0); x = pci_sriov_get_totalvfs(dev); previously set "x" to TotalVFs from the SR-IOV capability. Now it will set "x" to 0. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> [bhelgaas: split to separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-25PCI: hv: Do not wait forever on a device that has disappearedDexuan Cui1-12/+34
Before the guest finishes the device initialization, the device can be removed anytime by the host, and after that the host won't respond to the guest's request, so the guest should be prepared to handle this case. Add a polling mechanism to detect device presence. Signed-off-by: Dexuan Cui <decui@microsoft.com> [lorenzo.pieralisi@arm.com: edited commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Haiyang Zhang <haiyangz@microsoft.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: K. Y. Srinivasan <kys@microsoft.com>
2018-05-24PCI: rcar: Remove IRQ mappings in rcar_pcie_enable_msi() failpathMarek Vasut1-9/+16
The rcar_pcie_enable_msi() creates IRQ mappings using irq_create_mapping() before requesting the IRQs using devm_request_irq(). If devm_request_irq() fails for some reason, rcar_pcie_enable_msi() does not remove the mapping. Pull out the code for disposing IRQ mappings from rcar_pcie_teardown_msi() into a separate function and call it from both rcar_pcie_teardown_msi() and rcar_pcie_enable_msi() failpath to remove the mappings correctly. Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Simon Horman <horms+renesas@verge.net.au> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: linux-renesas-soc@vger.kernel.org
2018-05-24PCI: rcar: Teardown MSI setup if rcar_pcie_enable() failsMarek Vasut1-1/+27
If the rcar_pcie_enable() fails and MSIs are enabled, the setup done in rcar_pcie_enable_msi() is never undone. Add a function to tear down the MSI setup by disabling the MSI handling in the PCIe block, deallocating the pages requested for the MSIs and zapping the IRQ mapping. Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Simon Horman <horms+renesas@verge.net.au> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: linux-renesas-soc@vger.kernel.org
2018-05-24PCI: rcar: Add missing irq_dispose_mapping() into failpathMarek Vasut1-3/+14
The rcar_pcie_get_resources() is another misnomer with a side effect. The function does not only get resources, but also maps MSI IRQs via irq_of_parse_and_map(). In case anything fails afterward, the IRQ mapping must be disposed through irq_dispose_mapping() which is not done. This patch handles irq_of_parse_and_map() failures in by disposing of the mapping in rcar_pcie_get_resources() as well as in probe. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Simon Horman <horms+renesas@verge.net.au> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: linux-renesas-soc@vger.kernel.org
2018-05-24PCI: rcar: Pull bus clock enable/disable from rcar_pcie_get_resources()Marek Vasut1-17/+16
The rcar_pcie_get_resources() is another misnomer with a side effect. The function does not only get resources, but also enables/disables bus clock. This is forgotten in the probe() function though and if anything in probe() fails after rcar_pcie_get_resources() is called, the bus clock are never disabled. This patch pulls the clock handling out of the rcar_pcie_get_resources() and enables clock after all the resources were requested. Moreover, this patch also always disables the clock in case of failure. Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Simon Horman <horms+renesas@verge.net.au> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: linux-renesas-soc@vger.kernel.org
2018-05-24PCI: rcar: Poll more often in rcar_pcie_wait_for_dl()Marek Vasut1-2/+3
The data link active signal usually takes ~20 uSec to be asserted, poll the bit more often to avoid useless delays in this function. Use udelay() instead of usleep() for such a small delay as suggested by the timer documentation. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Simon Horman <horms+renesas@verge.net.au> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: linux-renesas-soc@vger.kernel.org
2018-05-24PCI: vmd: Add an additional VMD device id to driver device id tableJon Derrick1-0/+3
Allow VMD devices with PCI id 8086:28c0 to bind to VMD driver. Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> [lorenzo.pieralisi@arm.com: updated commit subject] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-24PCI: vmd: Add offset to bus numbers if necessaryJon Derrick1-5/+29
Depending on platform configuration, certain VMD devices may have an additional configuration option which specifies the range of bus numbers allowed in a VMD PCIe domain. We determine this requirement by checking the value of two vendor specific config registers in the VMD endpoint: VMCAP[0] | VMCONFIG[9:8] | Bus Numbers ---------------------------------------- 0 | * | 0-255 1 | 00 | 0-127 1 | 01 | 128-255 1 | 10 | 0-255 This feature is also added as a bit in driver_data, to allow future conforming device ids which support these features to be enabled through sysfs new_id. Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> [lorenzo.pieralisi@arm.com: updated commit subject] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-24PCI: vmd: Assign membar addresses from shadow registersJon Derrick1-5/+49
Certain VMD devices have registers within membar 2 which may shadow the membar 1 and membar 2 addresses. These are intended to be used in virtualization, where assigning a guest address wouldn't be translated in the assignment to root port and child devices because the addresses exist within the assignment message. These values will only reflect the membars when enabled in the BIOS, as determined by a register in the VMD device. This patch declares this option as a bit in the pci id driver_data, so that future conforming device ids can be enabled through sysfs new_id if necessary. Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> [lorenzo.pieralisi@arm.com: updated commit subject] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-24PCI: Add Intel VMD devices to pci idsJon Derrick1-1/+1
Add the Intel VMD device ids to the pci id database and update the VMD driver. Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-24PCI: hv: Use list_for_each_entry()Stephen Hemminger1-20/+7
There are several places where list_for_each_entry() could be used to simplify the code. Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-24PCI: hv: Convert remove_lock to refcountStephen Hemminger1-4/+4
Use refcount instead of atomic for the reference counting on bus. Refcount is safer because it handles overflow correctly. Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com> [lorenzo.pieralisi@arm.com: updated commit subject] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-24PCI: hv: Remove unused reason for refcount handlerStephen Hemminger1-44/+26
The get/put functions were taking a reason code. This appears to be a debug infrastructure that is no longer used. Move the functions to start of file to eliminate need for forward declaration. Forward declarations are discouraged on Linux. Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com> [lorenzo.pieralisi@arm.com: updated commit subject] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-24PCI / PM: Clean up outdated comments in pci_target_state()Rafael J. Wysocki1-4/+2
Two comments in pci_target_state() are outdated, as the function doesn't set the target power state for the device any more, only finds one for it, so fix them accordingly. Reported-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-24PCI / PM: Do not clear state_saved for devices that remain suspendedRafael J. Wysocki1-2/+3
The state_saved flag should not be cleared in pci_pm_suspend() if the given device is going to remain suspended, or the device's config space will not be restored properly during the subsequent resume. Namely, if the device is going to stay in suspend, both the late and noirq callbacks return early for it, so if its state_saved flag is cleared in pci_pm_suspend(), it will remain unset throughout the remaining part of suspend and resume and pci_restore_state() called for the device going forward will return without doing anything. For this reason, change pci_pm_suspend() to only clear state_saved if the given device is not going to remain suspended. [This is analogous to what commit ae860a19f37c (PCI / PM: Do not clear state_saved in pci_pm_freeze() when smart suspend is set) did for hibernation.] Fixes: c4b65157aeef (PCI / PM: Take SMART_SUSPEND driver flag into account) Cc: 4.15+ <stable@vger.kernel.org> # 4.15+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-23PCI: pciehp: Clear Presence Detect and Data Link Layer Status Changed on resumeMika Westerberg3-3/+14
After a suspend/resume cycle the Presence Detect or Data Link Layer Status Changed bits might be set. If we don't clear them those events will not fire anymore and nothing happens for instance when a device is now hot-unplugged. Fix this by clearing those bits in a newly introduced function pcie_reenable_notification(). This should be fine because immediately after, we check if the adapter is still present by reading directly from the status register. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: stable@vger.kernel.org
2018-05-23PCI: pnv_php: Add missing of_node_put()Julia Lawall1-2/+6
The device node iterators perform an of_node_get() on each iteration, so a jump out of the loop requires an of_node_put(). The semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; iterator name for_each_child_of_node; @@ for_each_child_of_node(root, child) { ... when != of_node_put(child) when != e = child + of_node_put(child); ? break; ... } ... when != child // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-23PCI: qcom: add runtime pm support to pcie_portSrinivas Kandagatla1-1/+8
This patch is required when the pcie controller sits on a bus with its own power domain and clocks which are controlled via a bus driver like simple pm bus. As these bus driver have runtime pm enabled, it makes sense to update the usage counter so that the runtime pm does not suspend the clks or power domain associated with the bus driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Vinod Koul <vkoul@kernel.org> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2018-05-21PCI: mediatek: Implement chained IRQ handling setupHonghui Zhang2-91/+116
Implement irq_chip based solution for IRQs management in order to comply with IRQ framework. Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
2018-05-18PCI: Remove host driver Kconfig selection of CONFIG_PCIEPORTBUSBjorn Helgaas2-12/+0
Host bridge drivers do not use the portdrv interfaces (struct pcie_device, struct pcie_port_service_driver, pcie_port_service_register(), etc), and they should not select CONFIG_PCIEPORTBUS. If users need the portdrv services, they can select CONFIG_PCIEPORTBUS just like all other PCI users. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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