linux-dev - Linux kernel development work

Age	Commit message (Collapse)	Author	Files	Lines
2018-12-06	drivers/perf: Add Cavium ThunderX2 SoC UNCORE PMU driver	Kulkarni, Ganapatrao	1	-0/+861
	This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory Controller(DMC) and Level 3 Cache(L3C). Each PMU supports up to 4 counters. All counters lack overflow interrupt and are sampled periodically. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com> [will: consistent enum cpuhp_state naming] Signed-off-by: Will Deacon <will.deacon@arm.com>