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2018-07-10phy: qcom-usb-hs: Mark expected switch fall-throughGustavo A. R. Silva1-0/+1
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-05-20phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845Manu Gautam1-8/+118
There are two QUSB2 PHYs present on sdm845. In order to improve eye diagram for both the PHYs some parameters need to be changed. Provide device tree properties to override these from board specific device tree files. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-05-20phy: qcom-qmp: Add QMP V3 USB3 UNI PHY support for sdm845Manu Gautam2-1/+151
QMP V3 UNI PHY is a single lane USB3 PHY without support for DisplayPort (DP). Main difference from DP combo QMPv3 PHY is that UNI PHY doesn't have dual RX/TX lanes and no separate DP_COM block for configuration related to type-c or DP. Also remove "qcom,qmp-v3-usb3-phy" compatible string which was earlier added for sdm845 only as there wouldn't be any user of same. While at it, fix has_pwrdn_delay attribute for USB-DP PHY configuration and. Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-05-20phy: qcom-qusb2: Fix crash if nvmem cell not specifiedManu Gautam1-0/+4
Driver currently crashes due to NULL pointer deference while updating PHY tune register if nvmem cell is NULL. Since, fused value for Tune1/2 register is optional, we'd rather bail out. Fixes: ca04d9d3e1b1 ("phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips") Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Cc: stable <stable@vger.kernel.org> # 4.14+ Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-05-20phy: qcom-qmp: Enable pipe_clk before PHY initializationManu Gautam1-14/+8
QMP PHY for USB/PCIE requires pipe_clk for locking of retime buffers at the pipe interface. Driver checks for PHY_STATUS without enabling pipe_clk due to which phy_init() fails with initialization timeout. Though pipe_clk is output from PHY (after PLL is programmed during initialization sequence) to GCC clock_ctl and then fed back to PHY but for PHY_STATUS register to reflect successful initialization pipe_clk from GCC must be present. Since, clock driver now ignores status_check for pipe_clk on clk_enable/disable, driver can safely enable/disable pipe_clk from phy_init/exit. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-04-25phy: Add a driver for the ATH79 USB phyAlban Bedel3-1/+119
The ATH79 USB phy is very simple, it only have a reset. On some SoC a second reset is used to force the phy in suspend mode regardless of the USB controller status. This driver is added to the qualcom directory as atheros is now part of qualcom and newer SoC of this familly are marketed under the qualcom name. Signed-off-by: Alban Bedel <albeu@free.fr> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-20Merge tag 'phy-for-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-nextGreg Kroah-Hartman3-268/+1077
Kishon writes: phy: for 4.17 *) Add USB PHY driver for MDM6600 on Droid *) Add USB PHY driver for STM32 USB PHY Controller *) Add inno-usb2-phy driver for hi3798cv200 SoC *) Add combo phy driver (SATA/USB/PCIE) for HiSilicon STB SoCs *) Add USB3 PHY driver for Meson GXL and GXM *) Add support for R8A77965 Gen3 USB 2.0 PHY in phy-rcar-gen3-usb2 driver *) Add support for qualcomm QUSB2 V2 and QMP V3 USB3 PHY in phy-qcom-qusb2 and phy-qcom-qmp PHY driver respectively *) Add support for runtime PM in phy-qcom-qusb2 and phy-qcom-qmp PHY drivers *) Add support for Allwinner R40 USB PHY in sun4i-usb PHY driver *) Add support in rockchip-typec PHY driver to make extcon optional and fallback to working in host mode if extcon is missing *) Add support in rockchip-typec PHY driver to mux PHYs connected to DP *) Add support to configure slew rate parameters in phy-mtk-tphy PHY driver *) Add workaround for missing Vbus det interrupts on Allwinner A23/A33 *) Add USB speed related PHY modes in phy core *) Fix PHY 'structure' documentation *) Force rockchip-typec PHY to USB2 if DP-only mode is used *) Fix phy-qcom-qusb2 and phy-qcom-qmp PHY drivers to follow PHY reset and initialization sequence as per hardware programming manual *) Fix Marvell BG2CD SoC USB failure in phy-berlin-usb driver *) Minor fixes in lpc18xx-usb-otg, xusb-tegra210 and phy-rockchip-emmc PHY drivers Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-12phy: qcom-ufs: add MODULE_LICENSE tagArnd Bergmann1-0/+5
While the specific UFS PHY drivers (14nm and 20nm) have a module license, the common base module does not, leading to a Kbuild failure: WARNING: modpost: missing MODULE_LICENSE() in drivers/phy/qualcomm/phy-qcom-ufs.o FATAL: modpost: GPL-incompatible module phy-qcom-ufs.ko uses GPL-only symbol 'clk_enable' This adds a module description and license tag to fix the build. I added both Yaniv and Vivek as authors here, as Yaniv sent the initial submission, while Vivek did most of the work since. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: add SPDX identifier to QMP and QUSB2 PHY driversManu Gautam2-19/+2
The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Add support for runtime PMManu Gautam2-1/+179
Disable clocks and enable PHY autonomous mode to detect wakeup events when PHY is suspended. Core driver should notify speed to PHY driver to enable LFPS and/or RX_DET interrupts. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qusb2: Add support for runtime PMManu Gautam1-0/+176
Disable clocks and enable DP/DM wakeup interrupts when suspending PHY. Core driver should notify speed to PHY driver to enable appropriate DP/DM wakeup interrupts polarity in suspend state. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Add support for QMP V3 USB3 PHYManu Gautam1-3/+220
QMP V3 USB3 PHY is a DisplayPort (DP) and USB combo PHY with dual RX/TX lanes to support type-c. There is a separate block DP_COM for configuration related to type-c or DP. Add support for dp_com region and secondary rx/tx lanes initialization. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Add register offsets for QMP V3 PHYManu Gautam1-0/+149
Registers offsets for QMP V3 PHY are changed from previous versions (1/2), update same in header file. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Move register offsets to header fileManu Gautam2-118/+129
New revision (v3) of QMP PHY uses different offsets for almost all of the registers. Hence, move these definitions to header file so that updated offsets can be added for QMP v3. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qusb2: Add support for QUSB2 V2 versionManu Gautam1-0/+64
Use register layout to add additional registers present on QUSB2 PHY V2 version for PHY initialization. Other than new registers on V2, following two register's offset and bit definitions are different: POWERDOWN control and PLL_STATUS. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qusb2: Add support for different register layoutsManu Gautam1-40/+109
New version of QUSB2 PHY has some registers offset changed. Add support to have register layout for a target and update the same in phy_configuration. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Move SERDES/PCS START after PHY resetManu Gautam1-3/+3
Driver is currently performing PHY reset after starting SERDES/PCS. As per hardware datasheet reset must be done before starting PHY. Hence, update the sequence. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Fix PHY block reset sequenceManu Gautam1-9/+19
PHY block or asynchronous reset requires signal to be asserted before de-asserting. Driver is only de-asserting signal which is already low, hence reset operation is a no-op. Fix this by asserting signal first. Also, resetting requires PHY clocks to be turned ON only after reset is finished. Fix that as well. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qusb2: Power-on PHY before initializationManu Gautam1-32/+15
PHY must be powered on before turning ON clocks and attempting to initialize it. Driver is exposing separate init and power_on routines for this. Apparently USB dwc3 core driver performs power-on after init. Also, poweron and init for QUSB2 PHY need to be executed together always, hence remove poweron callback from phy_ops and explicitly perform this from init, similar changes needed for poweroff. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Power-on PHY before initializationManu Gautam1-37/+24
PHY regulators which are enabled from power_on() must be ON before turning-on clocks and initializing it as part of init(). As most of the core drivers perform power_on() after init(), move PHY regulators enable to com_init() and use power_on() to only enable pipe_clk. This pipe_clk is output from PHY and some core drivers e.g. PCIe follow specific sequence after phy_init() that mandates pipe_clk to be enabled from power_on() only. On similar lines move clk_enable from init() to com_init() which executes once for multi lane PHYs. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Adapt to clk_bulk_* APIsVivek Gautam1-34/+16
Move from using array of clocks to clk_bulk_* APIs that are available now. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-03-08phy: qcom-qmp: Fix phy pipe clock gatingVivek Gautam1-2/+2
Pipe clock comes out of the phy and is available as long as the phy is turned on. Clock controller fails to gate this clock after the phy is turned off and generates a warning. / # [ 33.048561] gcc_usb3_phy_pipe_clk status stuck at 'on' [ 33.048585] ------------[ cut here ]------------ [ 33.052621] WARNING: CPU: 1 PID: 18 at ../drivers/clk/qcom/clk-branch.c:97 clk_branch_wait+0xf0/0x108 [ 33.057384] Modules linked in: [ 33.066497] CPU: 1 PID: 18 Comm: kworker/1:0 Tainted: G W 4.12.0-rc7-00024-gfe926e34c36d-dirty #96 [ 33.069451] Hardware name: Qualcomm Technologies, Inc. DB820c (DT) ... [ 33.278565] [<ffff00000849b27c>] clk_branch_wait+0xf0/0x108 [ 33.286375] [<ffff00000849b2f4>] clk_branch2_disable+0x28/0x34 [ 33.291761] [<ffff0000084868dc>] clk_core_disable+0x5c/0x88 [ 33.297660] [<ffff000008487d68>] clk_core_disable_lock+0x20/0x34 [ 33.303129] [<ffff000008487d98>] clk_disable+0x1c/0x24 [ 33.309384] [<ffff0000083ccd78>] qcom_qmp_phy_poweroff+0x20/0x48 [ 33.314328] [<ffff0000083c53f4>] phy_power_off+0x80/0xdc [ 33.320492] [<ffff00000875c950>] dwc3_core_exit+0x94/0xa0 [ 33.325784] [<ffff00000875c9ac>] dwc3_suspend_common+0x50/0x60 [ 33.331080] [<ffff00000875ca04>] dwc3_runtime_suspend+0x48/0x6c [ 33.336810] [<ffff0000085b82f4>] pm_generic_runtime_suspend+0x28/0x38 [ 33.342627] [<ffff0000085bace0>] __rpm_callback+0x150/0x254 [ 33.349222] [<ffff0000085bae08>] rpm_callback+0x24/0x78 [ 33.354604] [<ffff0000085b9fd8>] rpm_suspend+0xe0/0x4e4 [ 33.359813] [<ffff0000085bb784>] pm_runtime_work+0xdc/0xf0 [ 33.365028] [<ffff0000080d7b30>] process_one_work+0x12c/0x28c [ 33.370576] [<ffff0000080d7ce8>] worker_thread+0x58/0x3b8 [ 33.376393] [<ffff0000080dd4a8>] kthread+0x100/0x12c [ 33.381776] [<ffff0000080836c0>] ret_from_fork+0x10/0x50 Fix this by disabling it as the first thing in phy_exit(). Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-11-13Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usbLinus Torvalds4-34/+71
Pull USB/PHY updates from Greg KH: "Here is the big set of USB and PHY driver updates for 4.15-rc1. There is the usual amount of gadget and xhci driver updates, along with phy and chipidea enhancements. There's also a lot of SPDX tags and license boilerplate cleanups as well, which provide some churn in the diffstat. Other major thing is the typec code that moved out of staging and into the "real" part of the drivers/usb/ tree, which was nice to see happen. All of these have been in linux-next with no reported issues for a while" * tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (263 commits) usb: gadget: f_fs: Fix use-after-free in ffs_free_inst USB: usbfs: compute urb->actual_length for isochronous usb: core: message: remember to reset 'ret' to 0 when necessary USB: typec: Remove remaining redundant license text USB: typec: add SPDX identifiers to some files USB: renesas_usbhs: rcar?.h: add SPDX tags USB: chipidea: ci_hdrc_tegra.c: add SPDX line USB: host: xhci-debugfs: add SPDX lines USB: add SPDX identifiers to all remaining Makefiles usb: host: isp1362-hcd: remove a couple of redundant assignments USB: adutux: remove redundant variable minor usb: core: add a new usb_get_ptm_status() helper usb: core: add a 'type' parameter to usb_get_status() usb: core: introduce a new usb_get_std_status() helper usb: core: rename usb_get_status() 'type' argument to 'recip' usb: core: add Status Type definitions USB: gadget: Remove redundant license text USB: gadget: function: Remove redundant license text USB: gadget: udc: Remove redundant license text USB: gadget: legacy: Remove redundant license text ...
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23ufs/phy: qcom: Refactor to use phy_init callVivek Gautam4-34/+41
Refactor ufs_qcom_power_up_sequence() to get rid of ugly exported phy APIs and use the phy_init() and phy_power_on() to do the phy initialization. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: qcom-ufs: Add support to set phy modeVivek Gautam3-0/+30
Adding support to set desired UFS phy mode that can be set from the host controller. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-09-05Merge tag 'char-misc-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-miscLinus Torvalds1-11/+3
Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver update for 4.14-rc1. Lots of different stuff in here, it's been an active development cycle for some reason. Highlights are: - updated binder driver, this brings binder up to date with what shipped in the Android O release, plus some more changes that happened since then that are in the Android development trees. - coresight updates and fixes - mux driver file renames to be a bit "nicer" - intel_th driver updates - normal set of hyper-v updates and changes - small fpga subsystem and driver updates - lots of const code changes all over the driver trees - extcon driver updates - fmc driver subsystem upadates - w1 subsystem minor reworks and new features and drivers added - spmi driver updates Plus a smattering of other minor driver updates and fixes. All of these have been in linux-next with no reported issues for a while" * tag 'char-misc-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (244 commits) ANDROID: binder: don't queue async transactions to thread. ANDROID: binder: don't enqueue death notifications to thread todo. ANDROID: binder: Don't BUG_ON(!spin_is_locked()). ANDROID: binder: Add BINDER_GET_NODE_DEBUG_INFO ioctl ANDROID: binder: push new transactions to waiting threads. ANDROID: binder: remove proc waitqueue android: binder: Add page usage in binder stats android: binder: fixup crash introduced by moving buffer hdr drivers: w1: add hwmon temp support for w1_therm drivers: w1: refactor w1_slave_show to make the temp reading functionality separate drivers: w1: add hwmon support structures eeprom: idt_89hpesx: Support both ACPI and OF probing mcb: Fix an error handling path in 'chameleon_parse_cells()' MCB: add support for SC31 to mcb-lpc mux: make device_type const char: virtio: constify attribute_group structures. Documentation/ABI: document the nvmem sysfs files lkdtm: fix spelling mistake: "incremeted" -> "incremented" perf: cs-etm: Fix ETMv4 CONFIGR entry in perf.data file nvmem: include linux/err.h from header ...
2017-08-20phy: qcom-qmp: Fix failure path in phy_init functionsVivek Gautam1-9/+6
Fixing the clk enable failure path in qcom_qmp_phy_init() and cleanup the reset control deassertion failure path in qcom_qmp_phy_com_init(). Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20phy: qcom-qmp: Add support for IPQ8074Varadarajan Narayanan1-0/+124
Add definitions required to enable QMP phy support for IPQ8074. Signed-off-by: smuthayy <smuthayy@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20phy: qcom-qmp: Fix phy pipe clock nameVaradarajan Narayanan1-12/+11
Presently, the phy pipe clock's name is assumed to be either usb3_phy_pipe_clk_src or pcie_XX_pipe_clk_src (where XX is the phy lane's number). However, this will not work if an SoC has more than one instance of the phy. Hence, instead of assuming the name of the clock, fetch it from the DT. Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-07-16phy: qcom-usb-hs: Replace the extcon APIChanwoo Choi1-11/+3
This patch uses the resource-managed extcon API for extcon_register_notifier() and replaces the deprecated extcon API as following: - (deprecated) extcon_get_cable_state_() -> extcon_get_state() Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2017-06-01phy: Group vendor specific phy driversVivek Gautam14-0/+4331
Adding vendor specific directories in phy to group phy drivers under their respective vendor umbrella. Also updated the MAINTAINERS file to reflect the correct directory structure for phy drivers. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: David S. Miller <davem@davemloft.net> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Stephen Boyd <stephen.boyd@linaro.org> Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-usb@vger.kernel.org Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>