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2019-04-17phy: renesas: rcar-gen3-usb2: Use pdev's device pointer on dev_vdbg()Yoshihiro Shimoda1-4/+6
To implement multiple phy instances in the future, this patch uses pdev's device pointer on dev_vdbg() instead of the phy's device pointer. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: rcar-gen3-usb2: Add support for r8a77470Biju Das2-7/+34
This patch adds support for r8a77470 (RZ/G1C). We can reuse this driver for initializing timing/interrupt generation registers. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: renesas: phy-rcar-gen2: Add support for r8a77470Biju Das1-12/+118
This patch adds support for RZ/G1C (r8a77470) SoC. RZ/G1C SoC has a PLL register shared between hsusb0 and hsusb1. Compared to other RZ/G1 and R-Car Gen2/3, USB Host needs to deassert the pll reset. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-and-Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: ti-pipe3: Fix PCIe power up sequenceRoger Quadros1-6/+6
TRM [1] mentions that we need to power up PCIESS_PHY_TX and PCIESS_PHY_RX before configuring PCIe_PHY_RX SCP settings. See "Table 26-81. PCIePHY Subsystem Low-Level Programming Sequence". [1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: ti-pipe3: Fix SATA & USB PHY power up sequenceRoger Quadros1-14/+30
As per "Table 26-7. SATA PHY Subsystem Low-Level Programming Sequence" in TRM [1] we need to turn on SATA_PHY_TX before SATA_PHY_RX. [1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: ti-pipe3: improve DPLL stability for SATA & USBRoger Quadros1-42/+173
For increased DPLL stability use the settings recommended in the TRM [1] for PHY_RX registers for SATA and USB. For SATA we need to use spread spectrum settings even though we don't have spread spectrum enabled. The suggested non-spread spectrum settings don't work. [1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: ti-pipe3: Introduce mode property in driver dataRoger Quadros1-36/+57
Introduce a mode property in the driver data so that we don't have to keep using "of_device_is_compatible()" throughtout the driver. No functional change. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: ti-pipe3: fix missing bit-wise or operator when assigning valColin Ian King1-1/+1
There seems to be a missing bit-wise or operator when setting val, fix this by adding it in. Fixes: 2796ceb0c18a ("phy: ti-pipe3: Update pcie phy settings") Cc: stable@vger.kernel.org # v4.19+ Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: mediatek: Add UFS M-PHY driverStanley Chu3-0/+256
Add UFS M-PHY driver on MediaTek chipsets. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: rockchip-emmc: Allow to set drive impedance via DTS.Christoph Muellner1-2/+28
The rockchip-emmc PHY can be configured with different drive impedance values. Currenlty a value of 50 Ohm is hard coded into the driver. This patch introduces the DTS property 'drive-impedance-ohm' for the rockchip-emmc phy node, which uses the value from the DTS to setup the drive impedance accordingly. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: ufs-qcom: Refactor all init steps into phy_poweronEvan Green5-144/+46
The phy code was using implicit sequencing between the PHY driver and the UFS driver to implement certain hardware requirements. Specifically, the PHY reset register in the UFS controller needs to be deasserted before serdes start occurs in the PHY. Before this change, the code was doing this by utilizing the two phy callbacks, phy_init() and phy_poweron(), as "init step 1" and "init step 2", where the UFS driver would deassert reset between these two steps. This makes it challenging to power off the regulators in suspend, as regulators are initialized in init, not in poweron(), but only poweroff() is called during suspend, not exit(). For UFS, move the actual firing up of the PHY to phy_poweron() and phy_poweroff() callbacks, rather than init()/exit(). UFS calls phy_poweroff() during suspend, so now all clocks and regulators for the phy can be powered down during suspend. QMP is a little tricky because the PHY is also shared with PCIe and USB3, which have their own definitions for init() and poweron(). Rename the meaty functions to _enable() and _disable() to disentangle from the PHY core names, and then create two different ops structures: one for UFS and one for the other PHY types. In phy-qcom-ufs, remove the 'is_powered_on' and 'is_started' guards, as the generic PHY code does the reference counting. The 14/20nm-specific init functions get collapsed into the generic power_on() function, with the addition of a calibrate() callback specific to 14/20nm. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: qcom: Utilize UFS reset controllerEvan Green5-0/+76
Move the PHY reset from ufs-qcom into the respective PHYs. This will allow us to merge the two phases of UFS PHY initialization. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: amlogic: Add Amlogic G12A USB3 + PCIE Combo PHY DriverNeil Armstrong3-0/+425
This adds support for the shared USB3 + PCIE PHY found in the Amlogic G12A SoC Family. It supports USB3 Host mode or PCIE 2.0 mode, depending on the layout of the board. Selection is done by the #phy-cells, making the mode static and exclusive. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: amlogic: add Amlogic G12A USB2 PHY DriverNeil Armstrong3-0/+353
This adds support for the USB2 PHY found in the Amlogic G12A SoC Family. It supports Host and/or Peripheral mode, depending on it's position. The first PHY is only used as Host, but the second supports Dual modes defined by the USB Control Glue HW in front of the USB Controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: sr-usb: Add Stingray USB PHY driverSrinath Mannam3-0/+406
USB PHY driver supports two types of stingray USB PHYs - Type 1 is a combo PHY contains two PHYs, one SS and one HS. - Type 2 is a single HS PHY. These two PHY versons support both Generic xHCI host controller driver and BDC Broadcom device controller driver. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: tegra: xusb: Add Tegra186 supportJC Kuo4-0/+933
Add support for the XUSB pad controller found on Tegra186 SoCs. It is mostly similar to the same IP found on earlier chips, but the number of pads exposed differs, as do the programming sequences. Note that the DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL power supplies of the XUSB pad controller require strict power sequencing and are therefore controlled by the PMIC on Tegra186. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> [dan.carpenter@oracle.com: Fix testing the wrong variable in probe()] Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> [yuehaibing@huawei.com: Make two functions static to fix sparse warning] Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: tegra: xusb: Add support for power suppliesThierry Reding2-1/+38
Support enabling various supplies needed to provide power to the PLLs and logic used to drive the USB, PCI and SATA pads. Reviewed-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: tegra: xusb: Parse dual-role mode propertyThierry Reding2-0/+24
The device tree bindings document the "mode" property of "ports" subnodes, but the driver was not parsing the property. In preparation for adding role switching, parse the property at probe time. Based on work by JC Kuo <jckuo@nvidia.com>. Reviewed-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: tegra: xusb: Skip single function lane programmingJC Kuo1-1/+5
Tegra186 USB2 pads and USB3 pads do not have hardware mux for changing the pad function. For such "lanes", we can skip the lane mux register programming. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: sun4i-usb: Make sure to disable PHY0 passby for peripheral modePaul Kocialkowski1-0/+4
On platforms where the MUSB and HCI controllers share PHY0, PHY passby is required when using the HCI controller with the PHY, but it must be disabled when the MUSB controller is used instead. Without this, PHY0 passby is always enabled, which results in broken peripheral mode on such platforms (e.g. H3/H5). Fixes: ba4bdc9e1dc0 ("PHY: sunxi: Add driver for sunxi usb phy") Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: fix platform_no_drv_owner.cocci warningsYueHaibing1-1/+0
Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: mapphone-mdm6600: add gpiolib dependencyArnd Bergmann1-1/+1
gcc points out that when CONFIG_GPIOLIB is disabled, gpiod_get_array_value_cansleep() returns 0 but fails to set its output: drivers/phy/motorola/phy-mapphone-mdm6600.c: In function 'phy_mdm6600_status': drivers/phy/motorola/phy-mapphone-mdm6600.c:220:24: error: 'values[0]' is used uninitialized in this function [-Werror=uninitialized] This could be fixed more generally in gpiolib by returning a failure code, but for this specific case, the easier workaround is to add a gpiolib dependency. Fixes: 5d1ebbda0318 ("phy: mapphone-mdm6600: Add USB PHY driver for MDM6600 on Droid 4") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: ti: usb2: fix OMAP_CONTROL_PHY dependencyArnd Bergmann1-1/+1
With randconfig build testing on arm64, we can run into a configuration that has CONFIG_OMAP_CONTROL_PHY=m and CONFIG_OMAP_USB2=y, which in turn causes a link failure: drivers/phy/ti/phy-omap-usb2.o: In function `omap_usb_phy_power': phy-omap-usb2.c:(.text+0x17c): undefined reference to `omap_control_phy_power' I could not come up with a good way to correctly describe the relation of the two symbols, but if we just select CONFIG_OMAP_CONTROL_PHY during compile testing, we can no longer run into the broken configuration. Fixes: 6777cee3a872 ("phy: ti: usb2: Add support for AM654 USB2 PHY") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: allwinner: allow compile testingArnd Bergmann1-3/+6
Some allwinner specific drivers can be built for testing purposes on non-sunxi configurations, which then results in a harmless warning: WARNING: unmet direct dependencies detected for PHY_SUN6I_MIPI_DPHY Depends on [n]: ARCH_SUNXI [=n] && HAS_IOMEM [=y] && OF [=y] && RESET_CONTROLLER [=y] Selected by [y]: - DRM_SUN6I_DSI [=y] && HAS_IOMEM [=y] && DRM_SUN4I [=y] Allow compile-test here as well to avoid the warning, and improve overall build coverage. Fixes: 5d134abf9530 ("phy: Move Allwinner A31 D-PHY driver to drivers/phy/") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: qcom-ufs: Make ufs_qcom_phy_disable_iface_clk staticYueHaibing1-1/+1
Fix sparse warning: drivers/phy/qualcomm/phy-qcom-ufs.c:462:6: warning: symbol 'ufs_qcom_phy_disable_iface_clk' was not declared. Should it be static? Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: rockchip-typec: Make usb3_pll_cfg and dp_pll_cfg staticYueHaibing1-2/+2
Fix sparse warning: drivers/phy/rockchip/phy-rockchip-typec.c:403:16: warning: symbol 'usb3_pll_cfg' was not declared. Should it be static? drivers/phy/rockchip/phy-rockchip-typec.c:420:16: warning: symbol 'dp_pll_cfg' was not declared. Should it be static? Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-04-17phy: phy-twl4030-usb: Fix cable state handlingTony Lindgren1-22/+13
With the recent regulator changes I noticed new warnings on doing rmmod of phy-twl4030-usb: WARNING: CPU: 0 PID: 1080 at drivers/regulator/core.c:2046 _regulator_put ... Turns out we can currently miss disconnect at least for cases where status is 0 and linkstat is 0. And in that case doing rmmod phy-twl4030-usb will produce the regulator_put() warning. This is because the missed disconnect causes unbalanced PM runtime calls and the regulators will be on exit. Let's fix the issue by using an atomic flag for the cable state to make sure that PM runtime won't get out of sync with the cable state. That way we can also simplify the code a bit. Note that we can also drop the old comments, those relate to issues that the battery charger driver and musb driver is dealing with rather than the USB PHY driver. Cc: NeilBrown <neilb@suse.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-03-26phy: sun4i-usb: Support set_mode to USB_HOST for non-OTG PHYsChen-Yu Tsai1-1/+4
While only the first PHY supports mode switching, the remaining PHYs work in USB host mode. They should support set_mode with mode=USB_HOST instead of failing. This is especially needed now that the USB core does set_mode for all USB ports, which was added in commit b97a31348379 ("usb: core: comply to PHY framework"). Make set_mode with mode=USB_HOST a no-op instead of failing for the non-OTG USB PHYs. Fixes: 6ba43c291961 ("phy-sun4i-usb: Add support for phy_set_mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-03-08Merge tag 'drm-next-2019-03-06' of git://anongit.freedesktop.org/drm/drmLinus Torvalds3-0/+331
Pull drm updates from Dave Airlie: "This is the main drm pull request for the 5.1 merge window. The big changes I'd highlight are: - nouveau has HMM support now, there is finally an in-tree user so we can quieten down the rip it out people. - i915 now enables fastboot by default on Skylake+ - Displayport Multistream support has been refactored and should hopefully be more reliable. Core: - header cleanups aiming towards removing drmP.h - dma-buf fence seqnos to 64-bits - common helper for DP mst hotplug for radeon,i915,amdgpu + new refcounting scheme - MST i2c improvements - drm_syncobj_cb removal - ARM FB compression fourcc - P010 + P016 fourcc - allwinner tiled format modifier - i2c over aux I2C_M_STOP support - DRM_AUTH handling fixes TTM: - ref/unref renaming New driver: - ARM komeda display driver scheduler: - refactor mirror list handling - rework hw fence processing - 0 run queue entity fix bridge: - TI DS90C185 LVDS bridge - thc631lvdm83d bridge improvements - cadence + allwinner DSI ported to generic phy panels: - Sitronix ST7701 panel - Kingdisplay KD097D04 - LeMaker BL035-RGB-002 - PDA 91-00156-A0 - Innolux EE101IA-01D i915: - Enable fastboot by default on SKL+/VLV/CHV - Export RPCS configuration for ICL media driver - Coffelake PCI ID - CNL clocks setup fixes - ACPI/PMIC support for MIPI/DSI - Per-engine WA init for all engines - Shrinker locking fixes - Kerneldoc updates - Lots of ring improvements and reset fixes - Coffeelake GVT Support - VFIO GVT EDID Region support - runtime PM wakeref tracking - ILK->IVB primary plane enable delays - userptr mutex locking fixes - DSI fixes - LVDS/TV cleanups - HW readout fixes - LUT robustness fixes - ICL display and watermark fixes - gem mmap race fix amdgpu: - add scheduled dependencies interface - DCC on scanout surfaces - vega10/20 BACO support - Multiple IH rings on soc15 - XGMI locking fixes - DC i2c/aux cleanups - runtime SMU debug interface - Kexec improvmeents - SR-IOV fixes - DC freesync + ABM fixes - GDS fixes - GPUVM fixes - vega20 PCIE DPM switching fixes - Context priority handling fixes radeon: - fix missing break in evergreen parser nouveau: - SVM support via HMM msm: - QCOM Compressed modifier support exynos: - s5pv210 rotator support imx: - zpos property support - pending update fixes v3d: - cache flush improvments vc4: - reflection support - HDMI overscan support tegra: - CEC refactoring - HDMI audio fixes - Tegra186 prep work - SOR crossbar device tree fixes sun4i: - implicit fencing support - YUV and scalar support improvements - A23 support - tiling fixes atmel-hlcdc: - clipping and rotation property fixes qxl: - BO and PRIME improvements - generic fbdev emulation dw-hdmi: - HDMI 2.0 2160p - YUV420 ouput rockchip: - implicit fencing support - reflection proerties virtio-gpu: - use generic fbdev emulation tilcdc: - cpufreq vs crtc init fix rcar-du: - R8A774C0 support - D3/E3 RGB output routing fixes and DPAD0 support - RA87744 LVDS support bochs: - atomic and generic fbdev emulation - ID mismatch error on bochs load meson: - remove firmware fbs" * tag 'drm-next-2019-03-06' of git://anongit.freedesktop.org/drm/drm: (1130 commits) drm/amd/display: Use vrr friendly pageflip throttling in DC. drm/imx: only send commit done event when all state has been applied drm/imx: allow building under COMPILE_TEST drm/imx: imx-tve: depend on COMMON_CLK drm/imx: ipuv3-plane: add zpos property drm/imx: ipuv3-plane: add function to query atomic update status gpu: ipu-v3: prg: add function to get channel configure status gpu: ipu-v3: pre: add double buffer status readback drm/amdgpu: Bump amdgpu version for context priority override. drm/amdgpu/powerplay: fix typo in BACO header guards drm/amdgpu/powerplay: fix return codes in BACO code drm/amdgpu: add missing license on baco files drm/bochs: Fix the ID mismatch error drm/nouveau/dmem: use dma addresses during migration copies drm/nouveau/dmem: use physical vram addresses during migration copies drm/nouveau/dmem: extend copy function to allow direct use of physical addresses drm/nouveau/svm: new ioctl to migrate process memory to GPU memory drm/nouveau/dmem: device memory helpers for SVM drm/nouveau/svm: initial support for shared virtual memory drm/nouveau: prepare for enabling svm with existing userspace interfaces ...
2019-03-06Merge tag 'usb-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usbLinus Torvalds21-130/+1309
Pull USB/PHY updates from Greg KH: "Here is the big USB/PHY driver pull request for 5.1-rc1. The usual set of gadget driver updates, phy driver updates, xhci updates, and typec additions. Also included in here are a lot of small cleanups and fixes and driver updates where needed. All of these have been in linux-next for a while with no reported issues" * tag 'usb-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (167 commits) wusb: Remove unnecessary static function ckhdid_printf usb: core: make default autosuspend delay configurable usb: core: Fix typo in description of "authorized_default" usb: chipidea: Refactor USB PHY selection and keep a single PHY usb: chipidea: Grab the (legacy) USB PHY by phandle first usb: chipidea: imx: set power polarity dt-bindings: usb: ci-hdrc-usb2: add property power-active-high usb: chipidea: imx: remove unused header files usb: chipidea: tegra: Fix missed ci_hdrc_remove_device() usb: core: add option of only authorizing internal devices usb: typec: tps6598x: handle block writes separately with plain-I2C adapters usb: xhci: Fix for Enabling USB ROLE SWITCH QUIRK on INTEL_SUNRISEPOINT_LP_XHCI usb: xhci: fix build warning - missing prototype usb: xhci: dbc: Fixing typo error. usb: xhci: remove unused member 'parent' in xhci_regset struct xhci: tegra: Prevent error pointer dereference USB: serial: option: add Telit ME910 ECM composition usb: core: Replace hardcoded check with inline function from usb.h usb: core: skip interfaces disabled in devicetree usb: typec: mux: remove redundant check on variable match ...
2019-02-18Merge v5.0-rc7 into drm-nextDave Airlie4-6/+8
Backmerging for nouveau and imx that needed some fixes for next pulls. Signed-off-by: Dave Airlie <airlied@redhat.com>
2019-02-12Merge tag 'phy-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-nextGreg Kroah-Hartman21-130/+1309
Kishon writes: phy: for 5.1 *) Add a new driver to support Armada 3700 COMPHY IP (supports SATA, USB3, PCIe) *) Add a new driver to support Armada UTMI PHY *) Add a new driver to support Cadence D-PHY *) Extend omap-usb2 PHY driver to be used for AM654 USB2 PHY *) Extend qcom-qmp PHY driver to be used for UFS PHY and USB3 PHY in Qualcomm MSM8998 *) Extend qcom-qusb2 PHY driver to support QUSB2 PHY in Qualcomm MSM8998 *) Remove module specific code that is present for drivers that can be only built-in *) Allow Freescale IMX8MQ USB to be used for multiple SoCs and not just i.MX8MQ *) Cleanups such as switch to SPDX identifier, use readl_poll_timeout macro, remove unused headers etc., Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (32 commits) phy: qcom-qmp: Add QMP UFS PHY support for msm8998 dt-bindings: phy-qcom-qmp: Add qcom,msm8998-qmp-ufs-phy phy: bcm-sr-pcie: Change operation when PIPEMUX=1 phy: Add Cadence D-PHY support dt-bindings: phy: Move the Cadence D-PHY bindings phy: dphy: Clarify lanes parameter documentation phy: dphy: Change units of wakeup and init parameters phy: dphy: Remove unused header MAINTAINERS: phy: fill Armada 3700 PHY drivers entry dt-bindings: phy: mvebu-utmi: add UTMI PHY bindings phy: add A3700 UTMI PHY driver MAINTAINERS: phy: add entry for Armada 3700 COMPHY driver dt-bindings: phy: mvebu-comphy: extend the file to describe a3700 bindings phy: add A3700 COMPHY support phy: mvebu-cp110-comphy: fix port check in ->xlate() phy: armada375-usb2: switch to SPDX license identifier phy: make phy-armada375-usb2 explicitly non-modular phy: make phy-mvebu-sata explicitly non-modular phy: make phy-core explicitly non-modular phy: qcom-qusb2: Add QUSB2 PHY support for msm8998 ...
2019-02-12phy: qcom-qmp: Add QMP UFS PHY support for msm8998Marc Gonzalez1-0/+3
Use same init sequence as sdm845. Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: armada38x: add common phy supportRussell King3-0/+248
Add support for the Armada 38x common phy to allow us to change the speed of the Ethernet serdes lane. This driver only supports manipulation of the speed, it does not support configuration of the common phy. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-07phy: Move Allwinner A31 D-PHY driver to drivers/phy/Maxime Ripard3-0/+331
Now that our MIPI D-PHY driver has been converted to the phy framework, let's move it into the drivers/phy directory. Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/2447609da5b80f148c79b2b2a263a0e779f3e82f.1548085432.git-series.maxime.ripard@bootlin.com
2019-02-07phy: bcm-sr-pcie: Change operation when PIPEMUX=1Qingmin Liu1-2/+2
When PIPEMIX=1, change the operation from 2x8 EP to 1x8 EP + 1x8 RC. Signed-off-by: Qingmin Liu <qingmin.liu@broadcom.com> Signed-off-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: Add Cadence D-PHY supportMaxime Ripard3-1/+404
Cadence has designed a D-PHY that can be used by the, currently in tree, DSI bridge (DRM), CSI Transceiver and CSI Receiver (v4l2) drivers. Only the DSI driver has an ad-hoc driver for that phy at the moment, while the v4l2 drivers are completely missing any phy support. In order to make that phy support available to all these drivers, without having to duplicate that code three times, let's create a generic phy framework driver. Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: dphy: Change units of wakeup and init parametersMaxime Ripard1-4/+4
The Init and wakeup D-PHY parameters are in the micro/milliseconds range, putting the values real close to the types limits if they were in picoseconds. Move them to microseconds which should be better fit. Suggested-by: Sakari Ailus <sakari.ailus@iki.fi> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: add A3700 UTMI PHY driverMiquel Raynal3-0/+288
Marvell Armada 3700 SoC has two USB controllers, each of them being wired to an internal UTMI PHY. Add a driver to control them. Igal Liberman worked on supporting the PHY, I took the while 'register configuration' from his work and rewrote almost entirely the driver/bindings around it. Co-developed-by: Igal Liberman <igall@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: add A3700 COMPHY supportMiquel Raynal3-0/+331
Add a driver to support COMPHY, a hardware block providing shared serdes PHYs on Marvell Armada 3700. This driver uses SMC calls and rely on having an up-to-date firmware. SATA, PCie and USB3 host mode have been tested successfully with an ESPRESSObin. (HS)SGMII mode cannot be tested with this platform. Evan worked on the original driver structure and Grzegorz on the SMC calls rework. The structure of this driver has been copied from Antoine Tenart work on CP110 COMPHY driver. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Co-developed-by: Evan Wang <xswang@marvell.com> Signed-off-by: Evan Wang <xswang@marvell.com> Co-developed-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: mvebu-cp110-comphy: fix port check in ->xlate()Miquel Raynal1-2/+0
So far the PHY ->xlate() callback was checking if the port was "invalid" before continuing, meaning that the port has not been used yet. This check is not correct as there is no opposite call to ->xlate() once the PHY is released by the user and the port will remain "valid" after the first phy_get()/phy_put() calls. Hence, if this driver is built as a module, inserted, removed and inserted again, the PHY will appear busy and the second probe will fail. To fix this, just drop the faulty check and instead verify that the port number is valid (ie. in the possible range). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: armada375-usb2: switch to SPDX license identifierGregory CLEMENT1-4/+1
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: make phy-armada375-usb2 explicitly non-modularPaul Gortmaker1-7/+1
The Kconfig currently controlling compilation of this code is: drivers/phy/marvell/Kconfig:config ARMADA375_USBCLUSTER_PHY drivers/phy/marvell/Kconfig: def_bool y ...meaning that it currently is not being built as a module by anyone. Lets remove the couple of traces of modular infrastructure, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: make phy-mvebu-sata explicitly non-modularPaul Gortmaker1-7/+2
The Kconfig currently controlling compilation of this code is: drivers/phy/Kconfig:config PHY_MVEBU_SATA drivers/phy/Kconfig: def_bool y ...meaning that it currently is not being built as a module by anyone. Lets remove the couple of traces of modular infrastructure, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: make phy-core explicitly non-modularPaul Gortmaker1-11/+1
The Kconfig currently controlling compilation of this code is: drivers/phy/Kconfig:config GENERIC_PHY drivers/phy/Kconfig: bool "PHY Core" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. We don't remove module.h since the file is using other modular fcns (to load other phy modules) even though the core support itself is non-modular. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: qcom-qusb2: Add QUSB2 PHY support for msm8998Jeffrey Hugo1-0/+40
MSM8998 contains one QUSB2 PHY which is very similar to the existing sdm845 support. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: phy-rockchip-inno-usb2: drop reading the utmi-avalid propertyEnric Balletbo i Serra1-13/+2
That property is no used in mainline and is not documented. The only board using that property is the rk33-99-evb-rev1 and -rev2 in the vendor kernel. The existence of a further -rev3 (which also looks way better cared for compared rev1+2) indicates that the older ones are probably some sort of preproduction models, where some wiring (on the soc or board) may have gone wrong. It is also not clear why this is a hardware-description or a DT property, so, as noboby seems to care of this just drop reading that property. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: qcom-qmp: Add QMP V3 USB3 PHY support for msm8998Jeffrey Hugo2-0/+144
MSM8998 contains a single QMP v3 USB3 phy similar to the existing sdm845 support. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: rockchip-inno-usb2: fix misspelling and kernel-doc documentationEnric Balletbo i Serra1-16/+19
Fix the typo flase -> false and clean up the kernel-doc documentation in phy-rockchip-inno.usb2.c and fix the following warnings when documentation is built. :58: warning: missing initial short description :69: warning: cannot understand function prototype: 'enum usb_chg_state ' :97: warning: missing initial short description :136: warning: cannot understand function prototype: 'struct rockchip_usb2phy_port_cfg ' :157: warning: cannot understand function prototype: 'struct rockchip_usb2phy_cfg ' :163: warning: Function parameter or member 'port_cfgs' not described in 'rockchip_usb2phy_cfg' :187: warning: cannot understand function prototype: 'struct rockchip_usb2phy_port ' :204: warning: Function parameter or member 'port_cfg' not described in 'rockchip_usb2phy_port' :207: warning: missing initial short description :234: warning: Function parameter or member 'dev' not described in 'rockchip_usb2phy' :234: warning: Function parameter or member 'clk480m_hw' not described in 'rockchip_usb2phy' Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-02-07phy: ti: usb2: Add support for AM654 USB2 PHYRoger Quadros2-2/+19
Add support for the USB2 PHY on the AM654 SoC. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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