aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl (follow)
AgeCommit message (Collapse)AuthorFilesLines
2014-10-28pinctrl: baytrail: show output gpio state correctly on Intel BaytrailDavid Cohen1-1/+1
Even if a gpio pin is set to output, we still need to set INPUT_EN functionality (by clearing INPUT_EN bit) to be able to read the pin's level. E.g. without this change, we'll always read low level state from sysfs. Cc: <stable@vger.kernel.org> # v3.14+ Cc: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-20pinctrl: baytrail: Clear DIRECT_IRQ bitLoic Poulain1-1/+5
Direct irq en bit should be cleared for pads using io mode. If not, the io based irq will never be detected. However, this bit can sometimes be misconfigured (BIOS issue). Force clearing of this bit in io mode and trigger a WARN. Signed-off-by: Loic Poulain <loic.poulain@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-09Merge tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpioLinus Torvalds7-40/+12
Pull GPIO changes from Linus Walleij: "This is the bulk of GPIO changes for the v3.18 development cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during eg reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes" * tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits) gpio: pch: Build context save/restore only for PM pinctrl: abx500: get rid of unused variable gpio: ks8695: fix 'else should follow close brace '}'' gpio: stmpe: add verbose debug code gpio: stmpe: fix up interrupt enable logic gpio: staticize xway_stp_init() gpio: handle also nested irqchips in the chained handler set-up gpio: set parent irq on chained handlers gpiolib: irqchip: use irq_find_mapping while removing irqchip gpio: crystalcove: support virtual GPIO pinctrl: bcm281xx: make Kconfig dependency more strict gpio: kona: enable only on BCM_MOBILE or for compile testing gpio, bcm-kona, LLVMLinux: Remove use of __initconst gpio: Fix ngpio in gpio-xilinx driver gpio: dwapb: fix pointer to integer cast gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard gpio: xgene: Remove unneeded forward declation for struct xgene_gpio gpio: xgene: Fix missing spin_lock_init() gpio: ks8695: fix switch case indentation gpiolib: add irq_not_threaded flag to gpio_chip ...
2014-10-07Merge tag 'pinctrl-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlLinus Torvalds81-573/+2561
Pull pin control changes from Linus Walleij: "This is the bulk of pin control changes for the v3.18 development series: - New drivers for the Freescale i.MX21, Qualcomm APQ8084 pin controllers. - Incremental new features on the Rockchip, atlas 6, OMAP, AM437x, APQ8064, prima2, AT91, Tegra, i.MX, Berlin and Nomadik. - Push Freescale drivers down into their own subdirectory. - Assorted sprays of syntax and semantic fixes" * tag 'pinctrl-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits) pinctrl: specify bindings for pins and groups pinctrl: nomadik: improve GPIO debug prints pinctrl: abx500: refactor DT parser to take two paths pinctrl: abx500: use helpers for map allocation/free pinctrl: alter device tree bindings for functions pinctrl: nomadik: refactor DT parser to take two paths pinctrl: nomadik: use utils map free function pinctrl: nomadik: use util function to reserve maps pinctrl: qcom: use restart_notifier mechanism for ps_hold pinctrl: sh-pfc: sh73a0: Remove unnecessary SoC data allocation pinctrl: berlin: fix the dt_free_map function pinctrl: at91: disable PD or PU before enabling PU or PD pinctrl: st: remove gpiochip in failure cases pinctrl: at91: Fix error handling while doing gpiochio_irqchip_add pinctrl: at91: Fix failure path in at91_gpio_probe path pinctrl: lantiq: Release gpiochip resources in fail case pinctrl: imx: detect uninitialized pins pinctrl: tegra: Add MIPI pad control pinctrl: at91: Switch to using managed clk_get pinctrl: adi2: Remove duplicate gpiochip_remove_pin_ranges ...
2014-10-02pinctrl: abx500: get rid of unused variableLinus Walleij1-1/+1
commit 2fcea6cecbc965b4e02a39537d9d939f5251bbbd "pinctrl: remove remaining users of gpiochip_remove() retval" removed the use of the return value from gpiochip_remove() but missed to delete the dangling "err" variable: drivers/pinctrl/nomadik/pinctrl-abx500.c: In function 'abx500_gpio_probe': drivers/pinctrl/nomadik/pinctrl-abx500.c:1208:11: warning: unused variable 'err' [-Wunused-variable] Fix this by getting rid of the dangling variable. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-30pinctrl: nomadik: improve GPIO debug printsLinus Walleij1-11/+25
The debugfs file would only define if the line was "pulled" and not which direction (pull up or pull down). Improve this by taking two print paths depending on whether the pin is set as input or output and use the data register directly to figure out whether the pin is set for pull up or pull down. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-30pinctrl: abx500: refactor DT parser to take two pathsLinus Walleij1-26/+28
We refactor the DT parser to look for either a config or a function and then look for further nodes and reserve maps, not the two things mixed up like prior to this patch. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-30pinctrl: abx500: use helpers for map allocation/freeLinus Walleij1-38/+5
This switches the abx500 driver to use the pin control helper utils for allocating and free:ing maps. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-29pinctrl: nomadik: refactor DT parser to take two pathsLinus Walleij1-29/+33
We refactor the DT parser to look for either a config or a function and then look for further nodes and reserve maps, not the two things mixed up like prior to this patch. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-29pinctrl: nomadik: use utils map free functionLinus Walleij1-13/+2
Stop brewing our own map free function and rely on the pinctrl utils helpers. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-29pinctrl: nomadik: use util function to reserve mapsLinus Walleij1-23/+2
Stop brewing our own pin map reservation function and use the generic code. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-26pinctrl: qcom: use restart_notifier mechanism for ps_holdJosh Cartwright1-13/+18
By converting to the restart_notifier mechanism for restart, we allow for other mechanisms, like the watchdog, to be used for restart in the case where PS_HOLD has failed to reset the chip. Since this mechanism may be one of several mechanisms registered, change the post-ps_hold write timeout to be a more reasonable 1 second instead of 10 seconds. Choose priority 128, as according to documentation, this mechanism "is sufficient to restart the entire system". Tested-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-25pinctrl: bcm281xx: make Kconfig dependency more strictUwe Kleine-König1-1/+1
This driver is only useful on BCM281xx, so let the driver depend on ARCH_BCM_MOBILE but allow compile coverage testing. The main benefit is that the driver isn't available to be selected for machines that don't have the matching hardware. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Sherman Yin <syin@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: remove remaining users of gpiochip_remove() retvalLinus Walleij6-39/+10
Some drivers accidentally still use the return value from gpiochip_remove(). Get rid of them so we can simplify this function and get rid of the return value. Cc: Abdoulaye Berthe <berthe.ab@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: sh-pfc: sh73a0: Remove unnecessary SoC data allocationLaurent Pinchart4-26/+5
The SoC data structure allocated at init time only holds a regulator pointer that is only used in the init function. Replace it with a local variable and get rid of the SoC data structure allocation altogether. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: berlin: fix the dt_free_map functionAntoine Tenart1-20/+1
The berlin_pinctrl_dt_free_map function tries to free memory allocated and handled by the of subsystem. This is wrong and already handled by pinctrl_dt_free_maps() which calls of_node_put(). This patch fixes the Berlin pinctrl way of freeing its maps, avoiding a kernel BUG(), by using the common pinctrl_utils_dt_free_map function instead. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: at91: disable PD or PU before enabling PU or PDWenyou Yang1-0/+6
Disable Pull-Down or Pull-Up property before enabling Pull-Up or Pull-Down, because the pin's Pull-Up and Pull-Down property is mutually exclusive. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: st: remove gpiochip in failure casesPramod Gurav1-0/+1
This patch releases gpiochip related resources by calling gpiochip_remove when gpiochip_irqchip_add fails. Cc: Maxime Coquelin <maxime.coquelin@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: at91: Fix error handling while doing gpiochio_irqchip_addPramod Gurav1-4/+10
This patch removes a call to panic function when gpiochio_irqchip_add fails and just returns the error to the calling function. Same return value is used to handle the error case and adds a lable to release resources on error. The error message has been improved to indicate failure to add irqchip to gpiochip. This also changes first argument to function at91_gpio_of_irq_setup from struct device_node to struct platform_device. Because The device_node argument was anyway not being used. Passed pdev so that on failure dev_err can use &pdev->dev and log can be associated with proper device. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: at91: Fix failure path in at91_gpio_probe pathPramod Gurav1-7/+13
This fixes the whole error handling in probe function by capturing and returning error values on kernel function like clk_prepare, clk_enable, gpiochip_add etc. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: lantiq: Release gpiochip resources in fail casePramod Gurav1-0/+2
This patch releases gpiochip resources with of_gpiochip_remove and gpiochip_remove in failure cases. CC: John Crispin <blogic@openwrt.org> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-23pinctrl: imx: detect uninitialized pinsStefan Agner3-9/+9
The pinctrl driver initialized the register offsets for the pins with 0. On Vybrid an offset of 0 is a valid offset for the pinctrl mux register. So far, this was solved using the ZERO_OFFSET_VALID flag which allowed offsets of 0. However, this does not allow to verify whether a pins struct imx_pmx_func was initialized or not. Use signed offset values for register offsets and initialize those with -1 in order to detect uninitialized offset values reliable. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-19pinctrl: tegra: Add MIPI pad controlSean Paul1-0/+67
This patch adds MIPI CSI/DSIB pad control mux register from the APB misc block to tegra pinctrl. Without writing to this register, the dsib pads are muxed as csi, and cannot be used. The register is not yet documented in the TRM, here is the description: 70000820: APB_MISC_GP_MIPI_PAD_CTRL_0 [31:02] RESERVED [01:01] DSIB_MODE [CSI=0,DSIB=1] [00:00] RESERVED Signed-off-by: Sean Paul <seanpaul@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-10pinctrl: baytrail: resolve unbalanced IRQ wake disable warningMathias Nyman1-0/+1
Add the IRQCHIP_SKIP_SET_WAKE flag to baytrail gpio irq_chip to resolve unbalaced IRQ wake disable warnings. Suggested-by: Borun Fu <borun.fu@intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-05pinctrl: at91: Switch to using managed clk_getPramod Gurav1-4/+2
This patch switches to using managed version of clk_get and hence removes clk_put from failure path. CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-05pinctrl: adi2: Remove duplicate gpiochip_remove_pin_rangesPramod Gurav1-1/+0
This patch removes call to gpiochip_remove_pin_ranges() from platform_driver remove function as it will anway be called by gpiochip_remove(). CC: Sonic Zhang <sonic.zhang@analog.com> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-05pinctrl: single: fix freudian slipLinus Walleij1-1/+1
commit 03e9f0cac5da6af85758276cb4624caf5911f2b9 "pinctrl: clean up after enable refactoring" renamed the vtable callback .enable to .set_mux. The renaming was done manually, and one of the alterations contained a freudian slip. I confess, I am human. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-05pinctrl: at91: add drive strength configurationMarek Roszko1-1/+161
The SAMA5 and SAM9x5 series both have drive strength options for the PIOs. This patch adds the ability to set one of three hardware options for drive strengths of low, medium or high for the each pin. The actual current output of the chip based on the setting is defined in the datasheets and varies per pins separate from banks and with supply voltage. This patch adds three new dt-bindings that allow setting the strength when configuring pins. By default, no change will be made to the drive strength of a pin from its reset value. Due to the difference between the register addresses of the SAMA5 and SAM9x5 series, a new sama5d3-pinctrl id was added. Signed-off-by: Marek Roszko <mark.roszko@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04pinctrl: prima2: add I2S 2ch, 6ch, nodin, mclk groupsRongjun Ying1-6/+82
we have done that for atlas6 in commit ed36c1a, 086b8904 etc. here we do same things for prima2. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04pinctrl: sirf: Remove gpiochip on failure casesPramod Gurav1-1/+1
This patch releases gpiochip related resources by calling gpiochip_remove when gpiochip_irqchip_add fails. CC: Linus Walleij <linus.walleij@linaro.org> CC: Barry Song <Baohua.Song@csr.com> CC: Rongjun Ying <rongjun.ying@csr.com> CC: Yuping Luo <yuping.luo@csr.com> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04pinctrl: qcom: Make the target processor value configurableGeorgi Djakov7-3/+14
Currently the value used to specify that interrupts from the gpio should be routed to the application processor is hardcoded for all Qualcomm SoCs. But the new APQ8084 SoC uses a different value. To resolve this, we make this value configurable for each SoC. For all existing SoCs we continue to use the current value, and only for APQ8084 we use the new value. Suggested-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04pinctrl: qcom: Add APQ8084 pinctrl supportGeorgi Djakov3-0/+1252
This patchset adds pinctrl support for the Qualcomm APQ8084 platform. This set of patches adds pinctrl support for the Qualcomm APQ8084 platform. The first patch adds the pin definitions. The second patch contains the devicetree binding documentation. The third patch adds the DT node. The last patch makes the INTR_TARGET_PROC_APPS value configurable and defines it for each existing SoC. Tested on IFC6540 board. Changes since v3: - Fixed the sdc valid pin values in the binding documentation - sdc2 instead of sdc3. (suggested by Bjorn Andersson) Changes since v2: - Fixed some incorrect bits and offsets. (suggested by Bjorn Andersson) - Updated binding documentation to follow the format of msm8960. (suggested by Bjorn Andersson) - Added fourth patch, which removes the hardcoded INTR_TARGET_PROC_APPS value and makes it configurable. Also we keep the current value for existing SoCs. (suggested by Bjorn Andersson) Changes since v1: - Updated the total number of pins (suggested by Bjorn Andersson) - Added the missing pin info (provided by Andy Gross) - Updated groups and functions to be consistent with other pinctrls. (suggested by Andy Gross) - Removed unused functions, qdss and test pins. (suggested by Andy Gross) - Updated the documentation with the possible functions. Reviewed-by: Andy Gross <agross@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04pinctrl: sh-pfc: rename confusing pinmux ops variableLinus Walleij4-8/+8
The vtable named *pinmux_ops in the affected files are not really about pin multiplexing, but a struct related to some PFC-specific operations, inclusing pin config (bias setting). Rename the variable so as to avoid confusions. Acked-by: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04pinctrl: imx/mxs: move freescale drivers to subdirLinus Walleij25-130/+132
This moves all the Freescale-related drivers (i.MX and MXS) to its own subdirectory to clear the view. Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Anson Huang <b20788@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Denis Carikli <denis@eukrea.com> Cc: Markus Pargmann <mpa@pengutronix.de> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04pinctrl: clean up after enable refactoringLinus Walleij32-99/+105
commit 2243a87d90b42eb38bc281957df3e57c712b5e56 "pinctrl: avoid duplicated calling enable_pinmux_setting for a pin" removed the .disable callback from the struct pinmux_ops, making the .enable() callback the only remaining callback. However .enable() is a bad name as it seems to imply that a muxing can also be disabled. Rename the callback to .set_mux() and also take this opportunity to clean out any remaining mentions of .disable() from the documentation. Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Fan Wu <fwu@marvell.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-02pinctrl: qcom: Add support for reset for apq8064Pramod Gurav2-1/+36
This patch adds support for reset functions to reboot the boards with soc apq8064. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: "Ivan T. Ivanov" <iivanov@mm-sol.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Andy Gross <agross@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-02pinctrl: qcom: remove gpiochip in failure casesPramod Gurav1-0/+2
This patch releases gpiochip related resources by calling gpiochip_remove when either of gpiochip_add_pin_range and gpiochip_irqchip_add fails. CC: Linus Walleij <linus.walleij@linaro.org> CC: "Ivan T. Ivanov" <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-02pinctrl: sh-pfc: use a saner Kconfig symbolLinus Walleij1-2/+1
There is currently a kludge to get the Makefile to move down to sh-pfc:s drivers: the arch definitions are used twice to get it done. However we can very well use the Kconfig symbol for the SH PFC pin control feature itself: it doesn't matter that it comes from a lower leaf in the Kconfig hierarchy which is completely orthogonal. Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: samsung: use CONFIG_PINCTRL_SAMSUNG symbol in makefileNaveen Krishna Chatradhi1-1/+1
Samsung Exynos7 is a ARM64bit processor. Which does not select the CONFIG_PLAT_SAMSUNG symbol. CONFIG_PINCTRL_SAMSUNG is being selected for both PLAT_SAMSUNG and ARCH_EXYNOS7 symbols. This patch modifes the pinctrl/Makefile to use CONFIG_PINCTRL_SAMSUNG symbol to compile the pinctrl/samsung/*.c Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: linus.walleij@linaro.org Cc: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: single: AM437x: Add pinctrl compatibilityKeerthy1-0/+7
AM437x pinctrl definitions now differ from traditional 16 bit OMAP pin ctrl definitions, in that all 32 bits are used to describe a single pin Also the location of wakeupenable and event bits have changed. Signed-off-by: Keerthy <j-keerthy@ti.com> [nm@ti.com: minor updates] Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: single: Add DRA7 pinctrl compatibilityNishanth Menon1-0/+7
DRA7 pinctrl definitions now differ from traditional 16 bit OMAP pin ctrl definitions, in that all 32 bits are used to describe a single pin Also the location of wakeupenable and event bits have changed. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: atlas6: Add I2S external clock input pingroupRongjun Ying1-0/+21
The I2S controller can use the external clock as reference clock with master mode. But based on different hardware or software design, this external clock might be needed or not needed. So the external input pin can be an independent pinctrl group, and the card driver can decice to get it or not. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: atlas6: take mclk pin out of i2s pingroupRongjun Ying1-17/+24
The I2S controller can output mclk to external audio codec. But by hardware design, some codecs need mclk and some codecs do not need mclk. So the mclk pin can be an independent pinctrl group, and the card driver can get it or not based on boards. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: sirf: fix lots of "line over 80 characters"Bin Shi3-81/+128
According to key customer's requirement, fix "line over 80 characters". Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: sirf: fix "quoted string split across lines"Bin Shi1-3/+3
this patch fixes: WARNING: quoted string split across lines 902: FILE: drivers/pinctrl/sirf/pinctrl-sirf.c:902: +MODULE_AUTHOR("Rongjun Ying <rongjun.ying@csr.com>, " + "Yuping Luo <yuping.luo@csr.com>, " WARNING: quoted string split across lines 903: FILE: drivers/pinctrl/sirf/pinctrl-sirf.c:903: + "Yuping Luo <yuping.luo@csr.com>, " + "Barry Song <baohua.song@csr.com>"); Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: imx6sl: introduce MODULE_DEVICE_TABLE for module autoloadingKiran Padwal1-0/+1
Enable autoloading of pinctrl-imx6sl module when a corresponing DT entry is present. Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-29pinctrl: Make of_device_id array constKiran Padwal21-21/+21
Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Kiran Padwal <kiran.padwal21@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-28pinctrl: Add i.MX21 pincontrol driverAlexander Shiyan3-0/+350
This patch adds pincontrol driver for Freescale i.MX21 SOCs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-21pinctrl: exynos: Lock GPIOs as interrupts when used as EINTsTomasz Figa2-6/+64
Currently after configuring a GPIO pin as an interrupt related pinmux registers are changed, but there is no protection from calling gpio_direction_*() in a badly written driver, which would cause the same pinmux register to be reconfigured for regular input/output and this disabling interrupt capability of the pin. This patch addresses this issue by moving pinmux reconfiguration to .irq_{request,release}_resources() callback of irq_chip and calling gpio_lock_as_irq() helper to prevent reconfiguration of pin direction. Setting up a GPIO interrupt on Samsung SoCs is a two-step operation - in addition to trigger configuration in a dedicated register, the pinmux must be also reconfigured to GPIO interrupt, which is a different function than normal GPIO input, although I/O-wise they both behave in the same way and gpio_get_value() can be used on a pin configured as IRQ as well. Such design implies subtleties such as gpio_direction_input() not having to fail if a pin is already configured as an interrupt nor change the configuration to normal input. But the FLAG_USED_AS_IRQ set in gpiolib by gpio_lock_as_irq() is only used to check that gpio_direction_output() is not called, it's not used to prevent gpio_direction_input() to be called. So this is not a complete solution for Samsung SoCs but it's definitely a move in the right direction. Signed-off-by: Tomasz Figa <t.figa@samsung.com> [javier: use request resources instead of startup and expand commit message] Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-17pinctrl: pinctrl-at91.c: fix decimal printf format specifiers prefixed with 0xHans Wennborg1-2/+2
The prefix suggests the number should be printed in hex, so use the %x specifier to do that. Found by using regex suggested by Joe Perches. Signed-off-by: Hans Wennborg <hans@hanshq.net> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.