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2013-06-18pinctrl: core: fix missing unlock on error in pinctrl_find_gpio_range_from_pin()Wei Yongjun1-8/+7
Add the missing unlock before return from function pinctrl_find_gpio_range_from_pin() in the error handling case. Introduced by commit 2ff3477efd7086544b9e298fc63afab0645921b4. (pinctrl: add pin list based GPIO ranges) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18sh-pfc: r8a7778: tidyup MMC_D1 pinKuninori Morimoto1-2/+2
MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8) Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17pinctrl: exynos: ack level-triggered interrupts before unmaskingDoug Anderson1-0/+22
A level-triggered interrupt should be acked after the interrupt line becomes inactive and before it is unmasked, or else another interrupt will be immediately triggered. Acking before or after calling the handler is not enough. Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: export pinctrl_pm_select_*_stateArnd Bergmann1-1/+3
The three functions pinctrl_pm_select_default_state, pinctrl_pm_select_sleep_state, and pinctrl_pm_select_idle_state are used in drivers that can be loadable modules, and should be exported. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: rockchip: correctly handle arguments of pinconf optionsHeiko Stübner1-4/+37
Change the rockchip pinctrl driver to handle the arguments to the pull pinconfig options correctly. So only accept non-0 values for the pull options as the rockchip pin-controller can only turn pulls on and off (this via BIAS_DISABLE). Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: single: adopt pinctrl sleep mode managementHebbar Gururaja1-0/+27
Make pinctrl-single able to handle suspend/resume events and change hogged pins states accordingly. Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: sunxi: Add Allwinner A10s pinsMaxime Ripard2-0/+646
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: sunxi: Move the pins definitions to a separate headerMaxime Ripard2-1360/+1379
It will allow us to have a cleaner separation between the data needed by the driver to work, and the core logic of the driver in itself, and will allow having too much noise in the core driver in the future. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: dynamically alloc temp array when parsing dt pinconf optionsHeiko Stübner1-6/+18
Allocating the temorary array in pinconf_generic_parse_dt_config on stack might cause problems later on, when the number of options grows over time. Therefore also allocate this array dynamically to be on the safe side. Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: handle zero found dt pinconfig properties betterHeiko Stübner1-0/+7
This adds a shortcut when no valid pinconf properties are found in the parsed dt node, to set the values immediately and return. Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: clarify some dt pinconfig optionsHeiko Stübner1-4/+5
The bias-pull-* options use values > 0 to indicate that the pull should be activated and optionally also indicate the strength of the pull. Therefore use an default value of 1 for these options. Split the low-power-mode option into low-power-enable and -disable. Update the documentation to describe the param arguments better. Reported-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: add pin list based GPIO rangesChristian Ruppert1-10/+49
Traditionally, GPIO ranges are based on consecutive ranges of both GPIO and pin numbers. This patch allows for GPIO ranges with arbitrary lists of pin numbers. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: get rid of all platform data for coh901Linus Walleij1-14/+9
This deletes the dependency on any platform data for the COH901 pin controller. There is only one user in the kernel, and if we at some point want to support more variants, they shall provide their variant info through the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17pinctrl: r8a7790: fix two pin numbersGuennadi Liakhovetski1-9/+7
Fix two erroneous MMCIF1 pin numbers on r8a7790. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-16pinctrl: exynos: reorder xyz_irq_unmask() so future patch can ackDoug Anderson1-26/+26
This patch does nothing but reorder the functions to improve the readability of a future patch. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: exynos: Add spinlocks to irq_mask and irq_unmaskDoug Anderson1-0/+20
The patch: 1984695 pinctrl: samsung: Protect bank registers with a spinlock ...added spinlocks to protect many accesses. However, the irq_mask and irq_unmask functions still do an unprotected read/modify/write. Add the spinlock there. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: abx500: fix build warningPatrice Chotard1-1/+1
pinctrl-abx500.c: In function 'abx500_gpio_dbg_show_one': pinctrl-abx500.c:534:14: warning: 'pud' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: add pinctrl driver for Rockchip SoCsHeiko Stübner3-0/+1367
This driver adds support the Cortex-A9 based SoCs from Rockchip, so at least the RK2928, RK3066 (a and b) and RK3188. Earlier Rockchip SoCs seem to use similar mechanics for gpio handling so should be supportable with relative small changes. Pull handling on the rk3188 is currently a stub, due to it being a bit different to the earlier SoCs. Pinmuxing as well as gpio (and interrupt-) handling tested on a rk3066a based machine. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: add function to parse generic pinconfig properties from a dt nodeHeiko Stübner2-0/+87
pinconf_generic_parse_dt_config() takes a node as input and generates an array of generic pinconfig values from the properties of this node. As I couldn't find a mechanism to count the number of properties of a node the function uses internally an array to accept one of parameter and copies the real present options to a smaller variable at its end. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: sunxi: Add external interrupt functionsMaxime Ripard1-26/+73
The A10 and A13 has a few pins that can be muxed into a particular function that can be used as an interrupt source. Add the available pins for such functions to the A10 and A13 description array. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: sunxi: Add external interrupts supportMaxime Ripard2-0/+223
The port controller IP found in the Allwinner A10 and A13 can use few of the pins it manage as an interrupt source, called external interrupts in the datasheet. The number of these external interrupts are SoCs specific, but the current upper limit is 32. In order to work, the external interrupts' pins have to be muxed to a specific function to generate an interrupt. This patch adds the irqchip and the needed logic to use the PIO controller as an interrupt controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: sunxi: Search the description array by pin idMaxime Ripard1-21/+29
Avoid to use expensive string manipulation functions and search by pin id when possible. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: exynos5440: fix issues reported by prevent toolThomas Abraham1-5/+8
This patch fixes issues reported by prevent tool. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> [Drop hunk already in-tree from a patch by Wei Yongjun] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: pinctrl-single: pin names for pinctrl-single.bitsManjunathappa, Prakash1-5/+10
Take care to name pin names as register-offset.bit-pos-of-pin-in-register in case configuring multiple pins in register. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: pinctrl-single: enhance to configure multiple pins of different modulesManjunathappa, Prakash1-33/+165
Add support to configure multiple pins in each register, existing implementation added by [1] does not support full fledge multiple pin configuration in single register, reports a pin clash when different modules configure different bits of same register. The issue reported and discussed here http://www.spinics.net/lists/arm-kernel/msg235213.html With pinctrl-single,bits-per-mux property specified, use function-mask property to find out number pins to configure. Allocate and register pin control functions based sub mask. Tested on da850/omap-l138 EVM. does not support variable submask for pins. does not support pinconf. [1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux" (9e605cb68a21d5704839a192a46ebcf387773704), Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Reported-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Tested-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16drivers: pinctrl sleep and idle states in the coreLinus Walleij1-0/+61
If a device have sleep and idle states in addition to the default state, look up these in the core and stash them in the pinctrl state container. Add accessor functions for pinctrl consumers to put the pins into "default", "sleep" and "idle" states passing nothing but the struct device * affected. Solution suggested by Kevin Hilman, Mark Brown and Dmitry Torokhov in response to a patch series from Hebbar Gururaja. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: add pinconf-generic define for a pin-default pullHeiko Stübner1-0/+2
There exist controllers that don't support to set the pull to up or down separately but instead automatically set the pull direction based on embedded knowledge inside the controller, for example depending on the selected mux function of the pin. Therefore this patch adds another config option to use this default pull-state for a pin where it is not possible to know or decide if the pin will be pulled up or down. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: add VF610 pinctrl driverJingchang Lu3-0/+347
Adds Freescale Vybrid VF610 pin controller driver to IMX common pinctrl driver framework. Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: imx: add VF610 support to imx pinctrl frameworkJingchang Lu2-11/+46
On some platforms such as VF610, offset of mux and pad ctrl register may be zero, and the mux_mode and config_val are in one 32-bit register. This patch adds support to imx core pinctrl framework to handle these cases. Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: abx500: fix abx500_gpio_dbg_show_one() to show pull up/downPatrice Chotard1-16/+70
- rework abx500_gpio_dbg_show_one() to take in account pull up/down feature available on AB8540 only. - add abx500_get_pull_updown() needed by abx500_gpio_dbg_show_one() - rename abx500_config_pull_updown() to abx500_set_pull_updown() Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: abx500: allow to set pull upPatrice Chotard1-1/+23
On ABx500 chip family, all pins support only pull down except for AB8540 which supports pull up/down on some pins. Rework abx500_pin_config_set to be able to set pull up on pins which support this feature. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: abx500: fix abx500_config_pull_updownPatrice Chotard1-1/+1
Fix abx500_config_pull_updown() to set correct bit in AB8540_GPIO_PULL_UPDOWN_REG. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinconf-generic: add BIAS_BUS_HOLD pinconfJames Hogan1-0/+1
Add a new PIN_CONFIG_BIAS_BUS_HOLD pin configuration for a bus holder pin mode (also known as bus keeper, or repeater). This is a weak latch which drives the last value on a tristate bus. Another device on the bus can drive the bus high or low before going tristate to change the value driven by the pin. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinconf-generic: add drive strength to debugfs outputJames Hogan1-0/+1
Add the drive strength pinconf to debugfs output (with the unit "mA"). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: abx500: suppress unused mutexPatrice Chotard1-10/+0
Suppress a mutex which was initialized on probe and destroyed on remove but never used. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: sirf: save the status in suspend and restore after resumingBarry Song1-0/+56
this patch saves the status of pinctrl registers and restore them while resuming. this makes all drivers have coherent status for pinmux after suspending and resuming. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: sink pinctrldev_list_mutexLinus Walleij1-21/+13
The pinctrldev_list_mutex is sinked into the functions that actually traverse the list and lock it there. The code makes much more sense in this way. All the callers are in non-performance critical paths and the code is way more readable this way. Also refactor the function get_pinctrl_dev_from_devname() to follow the design pattern of get_pinctrl_dev_from_of_node() which is slightly simpler. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoCBarry Song6-934/+1955
atlas6 is a SoC very similar with primaII, the register layput of pinctrl is same, but the pads, groups and functions of atlas6 have different layout with prima2, this patch 1. pull the definition of pads, groups and functions out of the pinctrl-sirf driver,and put them into soc-specific files 2. add pads, groups and functions tables for atlas6 3. let pads, groups and functions tables become the config data of the related dt compatible node, so the pinctrl-sirf can support all SiRF SoCs with the config data as private data. In this patch,we create a sirf dir, and let the old drivers/pinctrl/pinctrl-sirf.c = drivers/pinctrl/sirf/pinctrl-prima2.c + drivers/pinctrl/sirf/pinctrl-sirf.c drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the pin layout of atlas6. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16drivers: pinctrl: vt8500: use devm_ioremap_resource()Laurent Navet1-3/+3
Replace a call to deprecated devm_request_and_ioremap by devm_ioremap_resource. Found with coccicheck and this semantic patch: scripts/coccinelle/api/devm_ioremap_resource.cocci Signed-off-by: Laurent Navet <laurent.navet@gmail.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: dove: add PMU functions to pinctrlSebastian Hesselbarth1-28/+216
Dove power management unit can mux some special functions to mpp0-15. This patch adds support to set/get the current PMU function mapped to the corresponding mpp pins. The device tree documentation is also updated accordingly. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16drivers/pinctrl/spear: don't check resource with devm_ioremap_resourceWolfram Sang1-6/+1
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: enable build of pinctrl-imx6sl driverShawn Guo1-0/+1
The pinctrl-imx6sl is in place. Enable the build of it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16drivers/pinctrl: don't check resource with devm_ioremap_resourceWolfram Sang1-6/+1
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: u300: remove unnecessary platform_set_drvdata()Jingoo Han1-1/+0
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: sirf: remove unnecessary platform_set_drvdata()Jingoo Han1-4/+1
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: mxs: remove unnecessary platform_set_drvdata()Jingoo Han1-2/+0
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: coh901: remove unnecessary platform_set_drvdata()Jingoo Han1-1/+0
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-14Merge tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/driversOlof Johansson11-1529/+9944
From Simon Horman: Renesas ARM based SoC GPIO R-Car updates for v3.11 DT support to GPIO R-Car driver by Laurent Pinchart. * tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (131 commits) gpio-rcar: Add DT support
2013-06-14Merge tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dtOlof Johansson1-2/+2
From Linus Walleij: Device tree patches for ux500, basically trees and auxdata: - Fix for the thermal node to be contained in the PRCMU node - Add the DTS and auxdata needed to boot the U8540 platform - Various regulators added and renamed - Rename base SoC node - A bunch of DMA patches adding channels for DT boots - A bunch of crypto+hash patches adding config for DT boots - A bunch of patches fixing the ALSA SoC support to work - Register the LP5521 LEDs - Fix a number of typos and naming errors * tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (39 commits) ARM: ux500: drop any 0x prefix from I2C DT devices ARM: ux500: Allocate correct amount of memory for the u8540 in DT ARM: ux500: Provide auxdata to ux500 ASoC driver ARM: ux500: Add DT regulators for ab8500-codec ARM: ux500: Correct anamic2 typo in DT files ARM: ux500: Fix trivial typo in v-anamic1 comment ARM: ux500: Reduce PRCMU reg-names to shorter form for u8540 DT ARM: ux500: Add an auxdata entry for MUSB for clock-name look-up ARM: ux500: cut chip-select GPIOs from SSP device ARM: ux500: use symbolic names for interrupt flags ARM: ux500: use #include syntax to include *.dtsi. ARM: ux500: bump MMC/SD max frequency for DT boots ARM: ux500: Apply other compatible name to the u8540 DTS file pinctrl/nomadik: Standardise Pinctrl compat string for DBx5x based platforms ARM: ux500: Standardise Pinctrl compatible string for DBx5x based platforms ARM: ux500: Standardise DBx5x0 based Pinctrl compat string in the DTS crypto: ux500/hash - Enable DT probing of the driver crypto: ux500/cryp - Enable DT probing of the driver ARM: ux500: enable the crypto and hash on all dbx500 ARM: ux500: Provide an AUXDATA entry for ux500-hash ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-12sh-pfc: r8a7790: add HSCIF pin groupsUlrich Hecht1-15/+196
Adds HSCIF data/clk/ctrl groups to R8A7790 PFC driver. Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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