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2019-12-30Merge branch 'ib-pinctrl-unreg-mappings' into develLinus Walleij3-31/+18
2019-12-30pinctrl: Allow modules to use pinctrl_[un]register_mappingsHans de Goede3-31/+18
Currently only the drivers/pinctrl/devicetree.c code allows registering pinctrl-mappings which may later be unregistered, all other mappings are assumed to be permanent. Non-dt platforms may also want to register pinctrl mappings from code which is build as a module, which requires being able to unregister the mapping when the module is unloaded to avoid dangling pointers. To allow unregistering the mappings the devicetree code uses 2 internal functions: pinctrl_register_map and pinctrl_unregister_map. pinctrl_register_map allows the devicetree code to tell the core to not memdup the mappings as it retains ownership of them and pinctrl_unregister_map does the unregistering, note this only works when the mappings where not memdupped. The only code relying on the memdup/shallow-copy done by pinctrl_register_mappings is arch/arm/mach-u300/core.c this commit replaces the __initdata with const, so that the shallow-copy is no longer necessary. After that we can get rid of the internal pinctrl_unregister_map function and just use pinctrl_register_mappings directly everywhere. This commit also renames pinctrl_unregister_map to pinctrl_unregister_mappings so that its naming matches its pinctrl_register_mappings counter-part and exports it. Together these 2 changes will allow non-dt platform code to register pinctrl-mappings from modules without breaking things on module unload (as they can now unregister the mapping on unload). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20191216205122.1850923-2-hdegoede@redhat.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-29Merge tag 'v5.5-rc3' into develLinus Walleij6-152/+184
Linux 5.5-rc3
2019-12-20pinctrl: rza1: Reduce printed messagesChris Brandt1-2/+2
Since this message is printed for each port, it creates a lot of output during boot and would serve better only during debugging. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Jacopo Mondi <jacopo@jmondi.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20191212135301.17915-1-chris.brandt@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-12-20pinctrl: sh-pfc: r8a77965: Fix DU_DOTCLKIN3 drive/bias controlGeert Uytterhoeven1-3/+3
R-Car Gen3 Hardware Manual Errata for Rev. 2.00 of October 24, 2019 changed the configuration bits for drive and bias control for the DU_DOTCLKIN3 pin on R-Car M3-N, to match the same pin on R-Car H3. Update the driver to reflect this. After this, the handling of drive and bias control for the various DU_DOTCLKINx pins is consistent across all of the R-Car H3, M3-W, M3-W+, and M3-N SoCs. Fixes: 86c045c2e4201e94 ("pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191113101653.28428-1-geert+renesas@glider.be
2019-12-16pinctrl: ingenic: Fixup PIN_CONFIG_OUTPUT configPaul Cercueil2-2/+2
JZ4760 support was added in parallel of the previous patch so this one slipped through. The first SoC to use the new register is the JZ4760 and not the JZ4770, fix it here. Fixes: 7009d046a601 ("pinctrl: ingenic: Handle PIN_CONFIG_OUTPUT config") Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20191210164446.53912-1-paul@crapouillou.net [Folded into OF dependency] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-16pinctrl: iproc: Set irq handler based on trig typeHamish Martin1-1/+7
Rather than always using handle_simple_irq() as the gpio_irq_chip handler, set a more appropriate handler based on the IRQ trigger type requested. This is important for level triggered interrupts which need to be masked during handling. Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191215210503.15488-2-hamish.martin@alliedtelesis.co.nz Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-16pinctrl: qcom: sc7180: Add new qup functionsRajendra Nayak1-20/+40
on sc7180 we have cases where multiple functions from the same qup instance share the same pin. This is true for qup02/04/11 and qup13. Add new function names to distinguish which qup function to use. The device tree files for this platform haven't landed in mainline yet, so there aren't any users upstream who should break with this change in function names, however, anyone using the devicetree files that were posted on the lists and using these specific function names will need to update their changes. Reported-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/0101016ef36a9118-f2919277-effa-4cd5-adf8-bbc8016f31df-000000@us-west-2.amazonses.com Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-16pinctrl: qcom: sc7180: Add GPIO wakeup interrupt mapMaulik Shah1-0/+18
GPIOs that can be configured as wakeup sources, have their interrupt lines routed to PDC interrupt controller. Provide the interrupt map of the GPIO to its wakeup capable interrupt parent. Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Link: https://lore.kernel.org/r/1572419178-5750-2-git-send-email-mkshah@codeaurora.org Reviewed-by: Lina Iyer <ilina@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-16Merge branch 'ib-pinctrl-default-state' into develLinus Walleij1-14/+19
2019-12-15pinctrl: samsung: Fix missing OF and GPIOLIB dependency on S3C24xx and S3C64xxKrzysztof Kozlowski1-2/+4
All Samsung pinctrl drivers select common part - PINCTRL_SAMSUNG which uses both OF and GPIOLIB inside. However only Exynos drivers depend on these, therefore after enabling COMPILE_TEST, on x86_64 build of S3C64xx driver failed: drivers/pinctrl/samsung/pinctrl-samsung.c: In function ‘samsung_gpiolib_register’: drivers/pinctrl/samsung/pinctrl-samsung.c:969:5: error: ‘struct gpio_chip’ has no member named ‘of_node’ gc->of_node = bank->of_node; ^ Rework the dependencies so all Samsung drivers and common PINCTRL_SAMSUNG part depend on OF_GPIO (which is default yes if GPIOLIB and OF are enabled). Reported-by: Chen Zhou <chenzhou10@huawei.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-13pinctrl: lynxpoint: Update summary in the driverAndy Shevchenko1-4/+6
Reflect in the driver that it is now a pin control one. While here, update copyright years and authors. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Switch to pin control APIAndy Shevchenko2-57/+13
When all preparations are done, we may switch to pin control API. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Add GPIO <-> pin mapping ranges via callbackAndy Shevchenko1-0/+14
When IRQ chip is instantiated via GPIO library flow, the few functions, in particular the ACPI event registration mechanism, on some of ACPI based platforms expect that the pin ranges are initialized to that point. Add GPIO <-> pin mapping ranges via callback in the GPIO library flow. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Implement ->pin_dbg_show()Andy Shevchenko1-0/+23
The introduced callback ->pin_dbg_show() is useful for debugging. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Add pin control operationsAndy Shevchenko1-1/+314
Add implementation for: - pin control, group information retrieval: count, name and pins - pin muxing: - function information (count, name and groups) - mux setting - GPIO control (enable, disable, set direction) - pin configuration: - pull disable, up and down - any other option is treated as not supported. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Reuse struct intel_pinctrl in the driverAndy Shevchenko1-24/+60
We may use now available struct intel_pinctrl in the driver. No functional change implied. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Add pin control data structuresAndy Shevchenko1-2/+124
In order to implement pin control for Intel Lynxpoint, we need data structures in which to store and pass along pin, community and SoC data information. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Implement intel_gpio_get_direction callbackAndy Shevchenko1-0/+11
Allows querying GPIO direction from the pad config register. If the pad is not in GPIO mode, return an error. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Implement ->irq_ack() callbackAndy Shevchenko1-3/+14
Instead of playing tricks with registers in the interrupt handler, utilize the IRQ chip core for ACKing interrupts properly. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Move ownership check to IRQ chipAndy Shevchenko1-6/+6
There is nothing wrong with requesting pin that owned by ACPI. The only difference is how interrupt status will be reflected. It means that in ACPI mode we may not use pin as GPIO-backed IRQ. Taking above into consideration, move the check from GPIO to IRQ chip callback. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Move lp_irq_type() closer to IRQ related routinesAndy Shevchenko1-44/+44
Consolidate IRQ routines for better maintenance. While here, rename lp_irq_type() to lp_irq_set_type() to be in align with a callback name. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Move ->remove closer to ->probe()Andy Shevchenko1-6/+6
Consolidate ->remove and ->probe() callbacks for better maintenance. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Extract lp_gpio_acpi_use() for future useAndy Shevchenko1-2/+12
We may need this function for other features in the pin control driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Convert unsigned to unsigned intAndy Shevchenko1-12/+12
Simple type conversion with no functional change implied. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Switch to memory mapped IO accessorsAndy Shevchenko1-44/+44
Convert driver to use memory mapped IO accessors. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Keep pointer to struct device instead of its containerAndy Shevchenko1-7/+7
There is no need to keep pointer to struct platform_device, which is container of struct device, because the latter is what have been used everywhere outside of ->probe() path. In any case we may derive pointer to the container when needed. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Relax GPIO request rulesAndy Shevchenko1-3/+11
A pin in native mode still can be requested as GPIO, though we assume that firmware has configured it properly, which sometimes is not the case. Here we allow turning the pin as GPIO to avoid potential issues, but issue warning that something might be wrong. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Assume 2 bits for mode selectorAndy Shevchenko1-2/+4
New generations can use 2 bits for mode selector. Update the code to support it. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Use standard pattern for memory allocationAndy Shevchenko1-1/+1
The pattern foo = kmalloc(sizeof(*foo), GFP_KERNEL); has an advantage when foo type is changed. Since we are planning a such, better to be prepared by using standard pattern for memory allocation. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Use %pR to print IO resourceAndy Shevchenko1-2/+1
Replace explicit casting by pointer to struct resource with specifier replacement to %pR to print the IO resource. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Drop useless assignmentAndy Shevchenko1-1/+1
There is no need to assign ret variable in ->probe(). Drop useless assignment. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Correct amount of pinsAndy Shevchenko1-6/+6
When we count from 0 it's possible to get into off-by-one error. That's what had happened to this driver. So, correct amount of pins and related typos in the code. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Use raw_spinlock for lockingAndy Shevchenko1-14/+14
The Intel Lynxpoint pinctrl driver implements irqchip callbacks which are called with desc->lock raw_spinlock held. In mainline this is fine because spinlock resolves to raw_spinlock. However, running the same code in -rt we will get a BUG() asserted. This is because in -rt spinlocks are preemptible so taking the driver private spinlock in irqchip callbacks causes might_sleep() to trigger. In order to keep -rt happy but at the same time make sure that register accesses get serialized, convert the driver to use raw_spinlock instead. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: lynxpoint: Move GPIO driver to pin controller folderAndy Shevchenko3-0/+482
Move Lynxpoint GPIO driver under Intel pin control umbrella for further transformation to a real pin control driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: baytrail: Reuse struct intel_pinctrl in the driverAndy Shevchenko1-99/+87
We may use now available struct intel_pinctrl in the driver. No functional change implied. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-12-13pinctrl: baytrail: Use local variable to keep device pointerAndy Shevchenko1-9/+10
Use local variable to keep device pointer in order to increase readability of the driver. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-12-13pinctrl: baytrail: Keep pointer to struct device instead of its containerAndy Shevchenko1-29/+29
There is no need to keep pointer to struct platform_device, which is container of struct device, because the latter is what have been used everywhere outside of ->probe() path. In any case we may derive pointer to the container when needed. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-12-13pinctrl: intel: Share struct intel_pinctrl for wider useAndy Shevchenko2-34/+45
There are few drivers for Intel SoC GPIO which may utilize the same data structure to describe this IP. Share struct intel_pinctrl for wider user. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-12-13pinctrl: intel: Use GPIO direction definitionsMatti Vaittinen1-1/+4
Use new GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT when returning GPIO direction to GPIO framework. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: cherryview: Use GPIO direction definitionsMatti Vaittinen1-1/+4
Use new GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT when returning GPIO direction to GPIO framework. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-12-13pinctrl: baytrail: Use GPIO direction definitionsMatti Vaittinen1-2/+2
Use new GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT when returning GPIO direction to GPIO framework. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-12-13pinctrl: baytrail: Move IRQ valid mask initialization to a dedicated callbackAndy Shevchenko1-14/+9
There is a logical continuation of the commit 5fbe5b5883f8 ("gpio: Initialize the irqchip valid_mask with a callback") to split IRQ initialization to hardware and valid mask setup parts. Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-12-13pinctrl: sh-pfc: Remove use of ARCH_R8A7796Geert Uytterhoeven1-1/+1
CONFIG_ARCH_R8A7796 was renamed to CONFIG_ARCH_R8A77960 in commit 39e57e14d7eaf818 ("soc: renesas: Add ARCH_R8A77960 for existing R-Car M3-W"), so its users can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191211100308.6958-1-geert+renesas@glider.be
2019-12-13pinctrl: core: Add pinctrl_select_default_state() and export itUlf Hansson1-14/+19
It has turned out that some mmc host drivers, but perhaps also others drivers, needs to reset the pinctrl into the default state (PINCTRL_STATE_DEFAULT). However, they can't use the existing pinctrl_pm_select_default_state(), as that requires CONFIG_PM to be set. This leads to open coding, as they need to look up the default state themselves and then select it. To avoid the open coding, let's introduce pinctrl_select_default_state() and make it available independently of CONFIG_PM. As a matter of fact, this makes it more consistent with the behaviour of the driver core, as it already tries to looks up the default state during probe. Going forward, users of pinctrl_pm_select_default_state() are encouraged to move to pinctrl_select_default_state(), so the old API can be removed. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20191206170821.29711-2-ulf.hansson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-13pinctrl: Modify Kconfig to fix linker errorRahul Tanwar1-0/+1
Fix below linker error ld: drivers/pinctrl/pinctrl-equilibrium.o: in function `pinconf_generic_dt_node_to_map_all': pinctrl-equilibrium.c:(.text+0xb): undefined reference to `pinconf_generic_dt_node_to_map' Caused by below commit 1948d5c51dba ("pinctrl: Add pinmux & GPIO controller driver for a new SoC") by adding 'depends on OF' in Kconfig driver entry. Reported-by: Randy Dunlap <rdunlap@infradead.org>> Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lore.kernel.org/r/ba937f271d1a2173828a2325990d62cb36d61595.1575514110.git.rahul.tanwar@linux.intel.com Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-13Merge tag 'intel-pinctrl-v5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixesLinus Walleij2-134/+173
intel-pinctrl for v5.5-2 * Fix Baytrail silicon issue by using a global lock * Fix North community pin names that user will assume their functions * Convert Cherryview and Baytrail to pass IRQ chip along with GPIO one The following is an automated git shortlog grouped by driver: baytrail: - Pass irqchip when adding gpiochip - Add GPIO <-> pin mapping ranges via callback - Update North Community pin list - Really serialize all register accesses cherryview: - Pass irqchip when adding gpiochip - Add GPIO <-> pin mapping ranges via callback - Split out irq hw-init into a separate helper function
2019-12-13pinctrl: pinmux: fix a possible null pointer in pinmux_can_be_used_for_gpioAlexandre Torgue1-1/+1
This commit adds a check on ops pointer to avoid a kernel panic when ops->strict is used. Indeed, on some pinctrl driver (at least for pinctrl-stmfx) the pinmux ops is not implemented. Let's assume than gpio can be used in this case. Fixes: 472a61e777fe ("pinctrl/gpio: Take MUX usage into account") Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Link: https://lore.kernel.org/r/20191204144106.10876-1-alexandre.torgue@st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-13pinctrl: aspeed-g6: Add AST2600 pinconf supportJohnny Huang2-0/+297
The AST2600 pinconf is a little different from previous generations of ASPEED BMC SoCs in terms of architecture. The pull-down setting is per-pin setting now, and drive-strength support 4 kind of value (e.g. 4ma, 8ma, 12ma, 16ma). Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> [AJ: Trim unused pinctrl register macros] Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20191202061432.3996-8-andrew@aj.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-13pinctrl: aspeed: Use masks to describe pinconf bitfieldsJohnny Huang4-19/+20
Since some of the AST2600 pinconf setting are not just single bit, modified aspeed_pin_config @bit to @mask and add @mask to aspeed_pin_config_map to support configuring multiple bits. Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> [AJ: Tweak commit message] Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20191202061432.3996-7-andrew@aj.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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