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2020-09-12pinctrl: sunxi: add support for the Allwinner A100 pin controllerYangtao Li4-0/+825
This commit introduces support for the pin controller on A100. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/4e331a2ed4a30c883df6157bc5c52bb686aa8e0d.1595572867.git.frank@allwinnertech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-12pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl supportNobuhiro Iwamatsu7-0/+775
Add pinctrl support to Toshiba Visconti SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp> Link: https://lore.kernel.org/r/20200909204336.2558-3-nobuhiro1.iwamatsu@toshiba.co.jp Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-12pinctrl: actions: pinctrl-s900: Constify s900_padinfo[]Rikard Falkeborn1-1/+1
The only usage of s900_padinfo[] is to assign it to the padinfo field in the owl_pinctrl_soc_data struct, which is a const pointer. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200830224311.36994-4-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-12pinctrl: actions: pinctrl-s700: Constify s700_padinfo[]Rikard Falkeborn1-1/+1
The only usage of s700_padinfo[] is to assign it to the padinfo field in the owl_pinctrl_soc_data struct, which is a const pointer. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200830224311.36994-3-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-12pinctrl: actions: pinctrl-owl: Constify owl_pinctrl_ops and owl_pinmux_opsRikard Falkeborn1-2/+2
The only usage of owl_pinctrl_ops and owl_pinmux_ops is to assign their addresses to the pctlops and the pmxops fields in the pinctrl_desc struct, which are const pointers. Make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200830224311.36994-2-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-12pinctrl: mcp23s08: Fix mcp23x17 precious rangeThomas Preston1-1/+1
On page 23 of the datasheet [0] it says "The register remains unchanged until the interrupt is cleared via a read of INTCAP or GPIO." Include INTCAPA and INTCAPB registers in precious range, so that they aren't accidentally cleared when we read via debugfs. [0] https://ww1.microchip.com/downloads/en/DeviceDoc/20001952C.pdf Fixes: 8f38910ba4f6 ("pinctrl: mcp23s08: switch to regmap caching") Signed-off-by: Thomas Preston <thomas.preston@codethink.co.uk> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20200828213226.1734264-3-thomas.preston@codethink.co.uk Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-12pinctrl: mcp23s08: Fix mcp23x17_regmap initialiserThomas Preston1-11/+11
The mcp23x17_regmap is initialised with structs named "mcp23x16". However, the mcp23s08 driver doesn't support the MCP23016 device yet, so this appears to be a typo. Fixes: 8f38910ba4f6 ("pinctrl: mcp23s08: switch to regmap caching") Signed-off-by: Thomas Preston <thomas.preston@codethink.co.uk> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20200828213226.1734264-2-thomas.preston@codethink.co.uk Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-07pinctrl: cherryview: Preserve CHV_PADCTRL1_INVRXTX_TXDATA flag on GPIOsHans de Goede1-1/+13
One some devices the GPIO should output the inverted value from what device-drivers / ACPI code expects. The reason for this is unknown, perhaps these systems use an external buffer chip on the GPIO which inverts the signal. The BIOS makes this work by setting the CHV_PADCTRL1_INVRXTX_TXDATA flag. Before this commit we would unconditionally clear all INVRXTX flags, including the CHV_PADCTRL1_INVRXTX_TXDATA flag when a GPIO is requested by a driver (from chv_gpio_request_enable()). This breaks systems using this setup. Specifically it is causing problems for systems with a goodix touchscreen, where the BIOS sets the INVRXTX_TXDATA flag on the GPIO used for the touchscreen's reset pin. The goodix touchscreen driver by defaults configures this pin as input (relying on the pull-up to keep it high), but the clearing of the INVRXTX_TXDATA flag done by chv_gpio_request_enable() causes it to be driven low for a brief time before the GPIO gets set to input mode. This causes the touchscreen controller to get reset. On most CHT devs with this touchscreen this leads to: [ 31.596534] Goodix-TS i2c-GDIX1001:00: i2c test failed attempt 1: -121 The driver retries this though and then everything is fine. But during reset the touchscreen uses its interrupt pin as bootstrap to determine which i2c address to use and on the Acer One S1003 the spurious reset caused by the clearing of the INVRXTX_TXDATA flag causes the controller to come back up again on the wrong i2c address, breaking things. This commit fixes both the -121 errors, as well as the total breakage on the Acer One S1003, by making chv_gpio_clear_triggering() not clear the INVRXTX_TXDATA flag if the pin is already configured as a GPIO. Note that chv_pinmux_set_mux() does still unconditionally clear the flag, so this only affects GPIO usage. Fixes: a7d4b171660c ("Input: goodix - add support for getting IRQ + reset GPIOs on Cherry Trail devices") Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-08-31pinctrl: sh-pfc: r8a7790: Add CAN pins, groups and functionsLad Prabhakar1-2/+110
Add pins, groups and functions for the CAN{0,1} interface. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200825095448.13093-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-08-28pinctrl: mcp23s08: Improve error messaging in ->probe()Andy Shevchenko1-12/+11
Print particular message in each of error case in the ->probe(). While here, use dev_err_probe() for that. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200828103235.78380-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-27pinctrl: mediatek: Add pinctrl driver for mt8192Zhiyong Tao4-0/+3692
This commit includes pinctrl driver for mt8192. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Acked-by: Sean Wang <sean.wang@kernel.org> Link: https://lore.kernel.org/r/20200817001702.1646-4-zhiyong.tao@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-27pinctrl: actions: Add Actions S500 pinctrl driverCristian Ciocaltea3-0/+1734
Add pinctrl and gpio driver for Actions Semi S500 SoC. The driver supports pinctrl, pinmux, pinconf, gpio and interrupt functions using a set of registers shared between gpio and pinctrl. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Link: https://lore.kernel.org/r/ce11c15f2f72798a8d740f8a7d5cbf1e6d70974a.1596461275.git.cristian.ciocaltea@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-27pinctrl: qcom: Add msm8226 pinctrl driver.Bartosz Dudziak3-0/+640
Add initial Qualcomm msm8226 pinctrl driver to support pin configuration with pinctrl framework for msm8226 SoC. - Initial formatting and style was taken from the msm8x74 pinctrl driver added by Björn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> Link: https://lore.kernel.org/r/20200716205530.22910-3-bartosz.dudziak@snejp.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-27pinctrl: armada-37xx: Add comment for pcie1_reset pin groupPali Rohár1-1/+1
Group name 'pcie1' is misleading as it controls only PCIe reset pin. Like other PCIe groups it should have been called 'pcie1_reset'. But due to backward compatibility it is not possible to change existing group name. So just add comment describing this PCIe reset functionality. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20200724132457.7094-1-pali@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-27pinctrl: nomadik: Fix pull direction debug infoAndrew Halaney1-10/+6
The nomadik pinctrl hardware doesn't have any way to determine if the active pull is up or down. Reading the bit currently used to report if the pull is up/down indicates if the gpio input is reading high or low, it doesn't reflect the pull state. For this reason change the output from "pull up"/"pull down" to "pull enabled". This avoids confusing developers who were using the output to determine what the pull state is. Signed-off-by: Andrew Halaney <ajhalaney@gmail.com> Link: https://lore.kernel.org/r/20200806155322.GA25523@ola-jn9phv2.ad.garmin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-20pinctrl: intel: Update header block to reflect direct dependenciesAndy Shevchenko1-1/+4
Update header inclusion block to reflect all direct dependencies that are being involved in pinctrl-intel.h. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-08-20pinctrl: cherryview: Switch to use intel_pinctrl_get_soc_data()Andy Shevchenko2-22/+7
Since we have common helper to retrieve SoC data from driver data we may switch to use it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-08-20pinctrl: baytrail: Switch to use intel_pinctrl_get_soc_data()Andy Shevchenko2-24/+6
Since we have common helper to retrieve SoC data from driver data we may switch to use it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-08-18pinctrl: intel: Extract intel_pinctrl_get_soc_data() helper for wider useAndy Shevchenko2-6/+20
intel_pinctrl_get_soc_data() helper can be used in few driver instead of open-coded variants. Thus, extract it as a standalone API. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-08-18pinctrl: cherryview: Utilize temporary variable to hold device pointerAndy Shevchenko1-6/+5
By one of the previous clean up change we got a temporary variable to hold a device pointer. It can be utilized in other calls in the ->probe() and save a bit of LOCs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-08-18pinctrl: cherryview: Switch to use struct intel_pinctrlAndy Shevchenko1-65/+39
Now when all preparations are done we may easily switch to use struct intel_pinctrl instead of custom one. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-08-18pinctrl: cherryview: Move custom community members to separate data structAndy Shevchenko1-14/+31
This is a preparatory patch for bigger clean up pending for Cherryview driver. There is no functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-08-18pinctrl: cherryview: Drop stale commentAndy Shevchenko1-3/+0
There is no more .groups member in struct chv_pinctrl, drop associated comment because it's not applicable anymore. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-08-17pinctrl: sh-pfc: r8a7790: Add USB1 PWEN pin and groupLad Prabhakar1-1/+10
Add USB1 PWEN pin and group for USB1 interface. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/1595005225-11519-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-08-09Merge tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlLinus Torvalds75-1017/+5566
Pull pin control updates from Linus Walleij: "This is the bulk of the pin control changes for the v5.9 kernel series: Core changes: - The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range() macro" was put in an immutable branch and merged into the pinctrl tree as well. We see these changes also here. - Improved debug output for pins used as GPIO. New drivers: - Ocelot Sparx5 SoC driver. - Intel Emmitsburg SoC subdriver. - Intel Tiger Lake-H SoC subdriver. - Qualcomm PM660 SoC subdriver. - Renesas SH-PFC R8A774E1 subdriver. Driver improvements: - Linear improvement and cleanups of the Intel drivers for Cherryview, Lynxpoint, Baytrail etc. Improved locking among other things. - Renesas SH-PFC has added support for RPC pins, groups, and functions to r8a77970 and r8a77980. - The newere Freescale (now NXP) i.MX8 pin controllers have been modularized. This is driven by the Google Android GKI initiative I think. - Open drain support for pins on the Qualcomm IPQ4019. - The Ingenic driver can handle both edges IRQ detection. - A big slew of documentation fixes all over the place. - A few irqchip template conversions by yours truly. * tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits) dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC pinctrl: stmfx: Use irqchip template pinctrl: amd: Use irqchip template pinctrl: mediatek: fix build for tristate changes pinctrl: samsung: Use bank name as irqchip name pinctrl: core: print gpio in pins debugfs file pinctrl: mediatek: add mt6779 eint support pinctrl: mediatek: add pinctrl support for MT6779 SoC pinctrl: mediatek: avoid virtual gpio trying to set reg pinctrl: mediatek: update pinmux definitions for mt6779 pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API pinctrl: mcp23s08: Use irqchip template pinctrl: sx150x: Use irqchip template dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes pinctrl: intel: Add Intel Emmitsburg pin controller support pinctl: ti: iodelay: Replace HTTP links with HTTPS ones Revert "gpio: omap: handle pin config bias flags" pinctrl: single: Use fallthrough pseudo-keyword pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword pinctrl: baytrail: Use fallthrough pseudo-keyword ...
2020-08-05Merge tag 'gpio-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpioLinus Torvalds1-5/+2
Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v5.9 kernel cycle. There is nothing too exciting in it, but a new macro that fixes a build failure on a minor ARM32 platform that appeared yesterday is part of it so we better merge it. Core changes: - Introduce the for_each_requested_gpio() macro to help in dependent code all over the place. Also patch a few locations to use it while we are at it. - Split out the sysfs code into its own file. - Split out the character device code into its own file, then make a set of refactorings and improvements to this code. We are setting the stage to revamp the userspace API a bit in the next cycle. - Fix a whole slew of kerneldoc that was wrong or missing. New drivers: - The PCA953x driver now supports the PCAL9535. Driver improvements: - A host of incremental modernizations and improvements to the PCA953x driver. - Incremental improvements to the Xilinx Zynq driver. - Some improvements to the GPIO aggregator driver. - I ran all over the place switching all threaded and other drivers requesting their own IRQ while using the core GPIO IRQ helpers to pass the GPIO irq chip as a template instead of calling the explicit set-up functions. Next merge window we may retire the old code altogether" * tag 'gpio-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (97 commits) gpio: wcove: Request IRQ after all initialisation done gpio: crystalcove: Free IRQ on error path gpio: pca953x: Request IRQ after all initialisation done gpio: don't use same lockdep class for all devm_gpiochip_add_data users gpio: max732x: Use irqchip template gpio: stmpe: Move chip registration gpio: rcar: Use irqchip template gpio: regmap: fix type clash gpio: Correct kernel-doc inconsistency gpio: pci-idio-16: Use irqchip template gpio: pcie-idio-24: Use irqchip template gpio: 104-idio-16: Use irqchip template gpio: 104-idi-48: Use irqchip template gpio: 104-dio-48e: Use irqchip template gpio: ws16c48: Use irqchip template gpio: omap: improve coding style for pin config flags gpio: dln2: Use irqchip template gpio: sch: Add a blank line between declaration and code gpio: sch: changed every 'unsigned' to 'unsigned int' gpio: ich: changed every 'unsigned' to 'unsigned int' ...
2020-08-04pinctrl: stmfx: Use irqchip templateLinus Walleij1-15/+17
This makes the driver use the irqchip template to assign properties to the gpio_irq_chip instead of using the explicit calls to gpiochip_irqchip_add_nested() and gpiochip_set_nested_irqchip(). The irqchip is instead added while adding the gpiochip. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: Amelie Delaunay <amelie.delaunay@st.com> Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Link: https://lore.kernel.org/r/20200721131814.357182-1-linus.walleij@linaro.org
2020-08-04pinctrl: amd: Use irqchip templateLinus Walleij1-11/+10
This makes the driver use the irqchip template to assign properties to the gpio_irq_chip instead of using the explicit call to gpiochip_irqchip_add(). The irqchip is instead added while adding the gpiochip. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Cc: Sandeep Singh <sandeep.singh@amd.com> Link: https://lore.kernel.org/r/20200722101545.144373-1-linus.walleij@linaro.org
2020-08-04pinctrl: mediatek: fix build for tristate changesRandy Dunlap1-0/+1
Export mtk_is_virt_gpio() for the case when CONFIG_PINCTRL_MTK=y CONFIG_PINCTRL_MTK_V2=y CONFIG_PINCTRL_MTK_MOORE=y CONFIG_PINCTRL_MTK_PARIS=m to fix this build error: ERROR: modpost: "mtk_is_virt_gpio" [drivers/pinctrl/mediatek/pinctrl-paris.ko] undefined! Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Sean Wang <sean.wang@kernel.org> Cc: linux-mediatek@lists.infradead.org Link: https://lore.kernel.org/r/d15827a3-d0c8-e231-9f61-8507b3d7be3a@infradead.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-04pinctrl: samsung: Use bank name as irqchip nameMarek Szyprowski1-26/+32
Use the bank name as the irqchip name. This name is later visible in /proc/interrupts, what makes it possible to easily identify each GPIO interrupt. /proc/interrupts before this patch: 143: 0 exynos4210_wkup_irq_chip 7 Edge hdmi 144: 0 exynos4210_wkup_irq_chip 6 Level wm8994 145: 1 exynos4210_wkup_irq_chip 7 Edge max77686-pmic, max77686-rtc 146: 1 exynos_gpio_irq_chip 3 Edge 3-0048 /proc/interrupts after this patch: 143: 0 gpx3 7 Edge hdmi 144: 0 gpx3 6 Level wm8994 145: 1 gpx0 7 Edge max77686-pmic, max77686-rtc 146: 1 gpm2 3 Edge 3-0048 Handling of the eint_wake_mask_value has been reworked, because each bank has now its own exynos_irq_chip structure allocated. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200720145412.24221-1-krzk@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-04pinctrl: core: print gpio in pins debugfs fileDrew Fustini1-0/+21
If there is a gpio range mapping for the pin, then print out the gpio chip and line index for the pin in the debugfs 'pins' file with the format: "[line-index]:[gpio-label]" Here is example output on the BeagleBoard.org PocketBeagle (AM3358): /sys/kernel/debug/pinctrl/44e10800.pinmux-pinctrl-single/pins pin 25 (PIN25) 25:gpio-32-63 44e10864 00000037 pinctrl-single pin 26 (PIN26) 26:gpio-32-63 44e10868 00000037 pinctrl-single pin 27 (PIN27) 27:gpio-32-63 44e1086c 00000037 pinctrl-single pin 28 (PIN28) 0:? 44e10870 00000036 pinctrl-single pin 29 (PIN29) 0:? 44e10874 00000006 pinctrl-single pin 30 (PIN30) 28:gpio-32-63 44e10878 00000027 pinctrl-single pin 31 (PIN31) 29:gpio-32-63 44e1087c 00000037 pinctrl-single pin 32 (PIN32) 30:gpio-32-63 44e10880 00000037 pinctrl-single pin 33 (PIN33) 31:gpio-32-63 44e10884 00000037 pinctrl-single pin 34 (PIN34) 0:gpio-64-95 44e10888 00000037 pinctrl-single pin 35 (PIN35) 1:gpio-64-95 44e1088c 00000037 pinctrl-single Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Drew Fustini <drew@beagleboard.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20200722122751.266440-1-drew@beagleboard.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-04pinctrl: mediatek: add mt6779 eint supportHanks Chen1-0/+8
add driver setting to support mt6779 eint Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: Hanks Chen <hanks.chen@mediatek.com> Acked-by: Sean Wang <sean.wang@kernel.org> Link: https://lore.kernel.org/r/1595503197-15246-6-git-send-email-hanks.chen@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-04pinctrl: mediatek: add pinctrl support for MT6779 SoCHanks Chen4-0/+2875
This adds MT6779 pinctrl driver based on MediaTek pinctrl-paris core. Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: Andy Teng <andy.teng@mediatek.com> Signed-off-by: Hanks Chen <hanks.chen@mediatek.com> Acked-by: Sean Wang <sean.wang@kernel.org> Link: https://lore.kernel.org/r/1595503197-15246-5-git-send-email-hanks.chen@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-04pinctrl: mediatek: avoid virtual gpio trying to set regHanks Chen3-0/+33
for virtual gpios, they should not do reg setting and should behave as expected for eint function. Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: Hanks Chen <hanks.chen@mediatek.com> Acked-by: Sean Wang <sean.wang@kernel.org> Link: https://lore.kernel.org/r/1595503197-15246-4-git-send-email-hanks.chen@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-01Merge tag 'pinctrl-v5.8-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlLinus Torvalds4-2/+79
Pull pin control fix from Linus Walleij: "A single last minute pin control fix to the Qualcomm driver fixing missing dual edge PCH interrupts" * tag 'pinctrl-v5.8-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: qcom: Handle broken/missing PDC dual edge IRQs on sc7180
2020-07-23pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() APIFabien Dessenne1-36/+42
Use the hwspin_lock_timeout_in_atomic() API which is the most appropriated here. Indeed: - hwspin_lock_() is called after spin_lock_irqsave() - the hwspin_lock_timeout() API relies on jiffies count which won't work if IRQs are disabled which is the case here. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Link: https://lore.kernel.org/r/20200615124456.27328-1-alexandre.torgue@st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-23pinctrl: mcp23s08: Use irqchip templateLinus Walleij1-30/+14
This makes the driver use the irqchip template to assign properties to the gpio_irq_chip instead of using the explicit calls to gpiochip_irqchip_add_nested() and gpiochip_set_nested_irqchip(). The irqchip is instead added while adding the gpiochip. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Jan Kundrát <jan.kundrat@cesnet.cz> Cc: Phil Reid <preid@electromag.com.au> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Jason Kridner <jkridner@gmail.com> Link: https://lore.kernel.org/r/20200721125223.344411-1-linus.walleij@linaro.org
2020-07-23pinctrl: sx150x: Use irqchip templateLinus Walleij1-22/+22
This makes the driver use the irqchip template to assign properties to the gpio_irq_chip instead of using the explicit calls to gpiochip_irqchip_add_nested() and gpiochip_set_nested_irqchip(). The irqchip is instead added while adding the gpiochip. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Cc: Peter Rosin <peda@axentia.se> Cc: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200721132537.362160-1-linus.walleij@linaro.org
2020-07-22Merge tag 'intel-pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into develLinus Walleij10-329/+1191
intel-pinctrl for v5.9-1 * New driver for Emmitsburg * New driver for Tiger Lake-H * Part 3 of Cherryview driver clean up * Fix a glitch on Baytrail platforms The following is an automated git shortlog grouped by driver: ARM/orion/gpio: - Make use of for_each_requested_gpio() at91: - Make use of for_each_requested_gpio() baytrail: - Use fallthrough pseudo-keyword - Fix pin being driven low for a while on gpiod_get(..., GPIOD_OUT_HIGH) - Drop no-op ACPI_PTR() call cherryview: - Re-use data structures from pinctrl-intel.h (part 3) - Convert chv_writel() to use chv_padreg() - Introduce helpers to IO with common registers - Introduce chv_readl() helper gpio: - xra1403: Make use of for_each_requested_gpio() - mvebu: Make use of for_each_requested_gpio() gpiolib: - Introduce for_each_requested_gpio_in_range() macro intel: - Add Intel Emmitsburg pin controller support - Make use of for_each_requested_gpio_in_range() - Protect IO in few call backs by lock - Split intel_config_get() to three functions - Drop the only label in the code for consistency - Get rid of redundant 'else' in intel_config_set_debounce() - Make use of IRQ_RETVAL() - Reduce scope of the lock - Disable input and output buffer when switching to GPIO - Allow drivers to define ACPI address space ID - Allow drivers to define total amount of IRQs per community lynxpoint: - Drop no-op ACPI_PTR() call - Introduce helpers to enable or disable input - Make use of for_each_requested_gpio() merrifield: - Add I²S bus 2 pins to groups and functions - Update pin names in accordance with official list tigerlake: - Add support for Tiger Lake-H
2020-07-21pinctrl: intel: Add Intel Emmitsburg pin controller supportAndy Shevchenko3-0/+396
This driver adds pinctrl/GPIO support for Intel Emmitsburg PCH. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-07-20pinctl: ti: iodelay: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Link: https://lore.kernel.org/r/20200718120807.19714-1-grandmaster@al2klimov.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-20pinctrl: single: Use fallthrough pseudo-keywordGustavo A. R. Silva1-1/+1
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20200716212317.GA17754@embeddedor Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-20pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keywordGustavo A. R. Silva2-3/+3
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20200716212213.GA17623@embeddedor Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-19pinctrl: baytrail: Use fallthrough pseudo-keywordGustavo A. R. Silva1-2/+2
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-17pinctrl: lpc18xx: Use fallthrough pseudo-keywordGustavo A. R. Silva1-6/+6
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20200716212109.GA17525@embeddedor Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-17Merge tag 'sh-pfc-for-v5.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into develLinus Walleij6-427/+486
pinctrl: sh-pfc: Updates for v5.9 (take two) - Add support for the new RZ/G2H (R8A774E1) SoC, - One more conversion of DT bindings to json-schema, - Fix RZ/A1 kerneldoc.
2020-07-17pinctrl: rockchip: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20200713183541.36963-1-grandmaster@al2klimov.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-16pinctrl: pinctrl-amd: Do not define 'struct acpi_device_id' when !CONFIG_ACPILee Jones1-0/+2
Since ACPI_PTR() is used to NULLify the value when !CONFIG_ACPI, 'struct amd_gpio_acpi_match' becomes defined but unused. Fixes the following W=1 kernel build warning(s): drivers/pinctrl/pinctrl-amd.c:959:36: warning: ‘amd_gpio_acpi_match’ defined but not used [-Wunused-const-variable=] 959 | static const struct acpi_device_id amd_gpio_acpi_match[] = { Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Ken Xue <Ken.Xue@amd.com> Cc: "Wu, Jeff" <Jeff.Wu@amd.com> Cc: Nehal Shah <Nehal-bakulchandra.Shah@amd.com> Cc: Sundar S K <Shyam-sundar.S-k@amd.com> Link: https://lore.kernel.org/r/20200713144930.1034632-26-lee.jones@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-16pinctrl: mvebu: pinctrl-armada-37xx: Update documentation block for 'struct armada_37xx_pin_group'Lee Jones1-3/+4
Correct misspellings and provide missing entries. Fixes the following W=1 kernel build warning(s): drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:68: warning: Function parameter or member 'start_pin' not described in 'armada_37xx_pin_group' drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:68: warning: Function parameter or member 'val' not described in 'armada_37xx_pin_group' drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:68: warning: Function parameter or member 'extra_pin' not described in 'armada_37xx_pin_group' drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:68: warning: Function parameter or member 'extra_npins' not described in 'armada_37xx_pin_group' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@bootlin.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lore.kernel.org/r/20200713144930.1034632-25-lee.jones@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-16pinctrl: meson: pinctrl-meson-a1: Remove unused const variable 'i2c_slave_groups'Lee Jones1-5/+0
It has never been used. Fixes the following W=1 kernel build warning(s): drivers/pinctrl/meson/pinctrl-meson-a1.c:749:27: warning: ‘i2c_slave_groups’ defined but not used [-Wunused-const-variable=] 749 | static const char const i2c_slave_groups[] = { | ^~~~~~~~~~~~~~~~ Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Qianggui Song <qianggui.song@amlogic.com> Cc: linux-amlogic@lists.infradead.org Link: https://lore.kernel.org/r/20200713144930.1034632-24-lee.jones@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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