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2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284Thomas Gleixner20-182/+20
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 and only version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 294 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner1-9/+1
Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-04pinctrl: sh-pfc: Remove obsolete SH_PFC_PIN_NAMED*() macrosGeert Uytterhoeven1-16/+0
Now all Renesas pin control drivers have been converted to use the new non-GPIO helper macros, SH_PFC_PIN_NAMED() and SH_PFC_PIN_NAMED_CFG() are no longer used. Remove them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: sh73a0: Use new macros for non-GPIO pinsGeert Uytterhoeven1-7/+12
Update the SH-Mobile AG5 pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the SH-Mobile AG5 SoC (in 34x34 BGA package) by symbolic enum values, referring to signal names. Note that the user-visible names of these pins are still based on pin numbers instead of signal names, to preserve DT backwards compatibility. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: r8a77990: Use new macros for non-GPIO pinsGeert Uytterhoeven1-46/+41
Update the R-Car E3 pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the R-Car E3 SoC (in 25x25 FCBGA package) by symbolic enum values, referring to signal names. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: r8a77965: Use new macros for non-GPIO pinsGeert Uytterhoeven1-156/+151
Update the R-Car M3-N pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the R-Car M3-N SiP (in 39x39 BGA package) by symbolic enum values, referring to signal names. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: r8a7796: Use new macros for non-GPIO pinsGeert Uytterhoeven1-156/+151
Update the R-Car M3-W pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the R-Car M3-W SiP (in 39x39 BGA package) by symbolic enum values, referring to signal names. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: r8a7795: Use new macros for non-GPIO pinsGeert Uytterhoeven1-159/+154
Update the R-Car H3 ES2.0 and later pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the R-Car H3 ES2.0 SiP (in 39x39 BGA package) by symbolic enum values, referring to signal names. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: r8a7795-es1: Use new macros for non-GPIO pinsGeert Uytterhoeven1-170/+163
Update the R-Car H3 ES1.x pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the R-Car H3 ES1.x SiP (in 39x39 BGA package) by symbolic enum values, referring to signal names. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: r8a7790: Use new macros for non-GPIO pinsGeert Uytterhoeven1-15/+19
Update the R-Car H2 pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the R-Car H2 SoC (in 31x31 FCBGA package) by symbolic enum values, referring to signal names. Note that the user-visible names of these pins are still based on pin numbers instead of signal names, to preserve DT backwards compatibility. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: r8a7778: Use new macros for non-GPIO pinsGeert Uytterhoeven1-13/+16
Update the R-Car M1A pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the R-Car M1A SoC (in 25x25 FCBGA package) by symbolic enum values, referring to signal names. Note that the user-visible names of these pins are still based on pin numbers instead of signal names, to preserve DT backwards compatibility. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: emev2: Use new macros for non-GPIO pinsGeert Uytterhoeven1-36/+34
Update the EMMA Mobile EV2 pin control driver to use the new macros for describing pins without GPIO functionality. This replaces the use of physical pin numbers on the EMMA Mobile EV2 SoC (in 23x23 BGA package) by symbolic enum values, referring to signal names. Note that the user-visible names of these pins are still based on pin numbers instead of signal names, to preserve DT backwards compatibility. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-04pinctrl: sh-pfc: Add new non-GPIO helper macrosGeert Uytterhoeven1-0/+56
Add new macros for describing pins without GPIO functionality: - NOGP_ALL() expands to a list of PIN_id values, to be used for generating symbolic enum values, - PINMUX_NOGP_ALL() expands to a list of sh_pfc_pin entries, to list all pins and their capabilities. Both macros depend on an SoC-specific CPU_ALL_NOGP() macro, to be provided by each individual SoC pin control driver. The new macros offer two advantages over the existing SH_PFC_PIN_NAMED() and SH_PFC_PIN_NAMED_CFG() macros: 1. They do not rely on PIN_NUMBER() macros and physical pin numbering, hence do not suffer from pin numbering confusion among different SoC/SiP packages. 2. They are similar in spirit to the existing scheme for handling pins with GPIO functionality. Note that internal to the driver, non-GPIO pins use a sequential numbering scheme which starts after the highest GPIO pin number in use. This value is calculated automatically, using two new helper macros, for systems with either 32-port bank (GP port style) or linear (PORT style) pin space. Sample expansion: GP_LAST = sizeof(union { char dummy[0] __attribute__((deprecated, deprecated)); char GP_0_0[(0 * 32) + 0] __attribute__((deprecated, deprecated)); char GP_0_1[(0 * 32) + 1] __attribute__((deprecated, deprecated)); ... char GP_7_3[(7 * 32) + 3] __attribute__((deprecated, deprecated)); }) Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-06-02pinctrl: bcm2835: Fix build error without CONFIG_OFYueHaibing1-1/+1
drivers/pinctrl/bcm/pinctrl-bcm2835.c: In function bcm2835_pctl_dt_node_to_map: drivers/pinctrl/bcm/pinctrl-bcm2835.c:720:8: error: implicit declaration of function pinconf_generic_dt_node_to_map_all; drivers/pinctrl/bcm/pinctrl-bcm2835.c: In function bcm2835_pinctrl_probe: drivers/pinctrl/bcm/pinctrl-bcm2835.c:1022:15: error: struct gpio_chip has no member named of_node pc->gpio_chip.of_node = np; Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: 0de704955ee4 ("pinctrl: bcm2835: Add support for generic pinctrl binding") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-01pinctrl: stm32: Add links to consumersLinus Walleij1-0/+1
Using STM32 as guinea pig after Alex's initial positive test to see if this is something we should encourage in general and make default behaviour. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-01pinctrl: mediatek: mt8183: Add pm_opsNicolas Boichat1-0/+1
Setting this up will configure wake from suspend properly, and wake only for the interrupts that are setup in wake_mask, not all interrupts. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Acked-by: Sean Wang <sean.wang@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-01pinctrl: mediatek: Add pm_ops to pinctrl-parisNicolas Boichat2-0/+21
pinctrl variants that include pinctrl-paris.h (and not pinctrl-mtk-common.h) also need to use pm_ops to setup wake mask properly, so copy over the pm_ops from common to paris variant. It is not easy to merge the 2 copies (or move mtk_eint_suspend/resume to mtk-eint.c), as we need to dereference pctrl->eint, and struct mtk_pinctrl *pctl has a different structure definition for v1 and v2 (which is what paris variant uses). Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Acked-by: Sean Wang <sean.wang@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-01pinctrl: meson: update with SPDX Licence identifierNeil Armstrong8-56/+8
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-01pinctrl: tegra: Add Tegra194 pinmux driverKrishna Yarlagadda3-0/+175
Tegra194 has PCIE L5 rst and clkreq pins which need to be controlled dynamically at runtime. This driver supports change pinmux for these pins. Pinmux for rest of the pins is set statically by bootloader and will not be changed by this driver Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-01pinctrl: tegra: Support 32 bit register accessKrishna Yarlagadda2-8/+8
Tegra194 chip has 32 bit pinctrl registers. Existing register defines in header are only 16 bit. Modified common pinctrl-tegra driver to support 32 bit registers of Tegra 194 and later chips. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-01treewide: fix typos of SPDX-License-IdentifierMasahiro Yamada1-1/+1
Prior to the adoption of SPDX, it was difficult for tools to determine the correct license due to incomplete or badly formatted license text. The SPDX solves this issue, assuming people can correctly spell "SPDX-License-Identifier" although this assumption is broken in some places. Since scripts/spdxcheck.py parses only lines that exactly matches to the correct tag, it cannot (should not) detect this kind of error. If the correct tag is missing, scripts/checkpatch.pl warns like this: WARNING: Missing or malformed SPDX-License-Identifier tag in line * So, people should notice it before the patch submission, but in reality broken tags sometimes slip in. The checkpatch warning is not useful for checking the committed files globally since large number of files still have no SPDX tag. Also, I am not sure about the legal effect when the SPDX tag is broken. Anyway, these typos are absolutely worth fixing. It is pretty easy to find suspicious lines by grep. $ git grep --not -e SPDX-License-Identifier --and -e SPDX- -- \ :^LICENSES :^scripts/spdxcheck.py :^*/license-rules.rst arch/arm/kernel/bugs.c:// SPDX-Identifier: GPL-2.0 drivers/phy/st/phy-stm32-usbphyc.c:// SPDX-Licence-Identifier: GPL-2.0 drivers/pinctrl/sh-pfc/pfc-r8a77980.c:// SPDX-Lincense-Identifier: GPL 2.0 lib/test_stackinit.c:// SPDX-Licenses: GPLv2 sound/soc/codecs/max9759.c:// SPDX-Licence-Identifier: GPL-2.0 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-31Merge tag 'spdx-5.2-rc3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-coreLinus Torvalds46-272/+46
Pull yet more SPDX updates from Greg KH: "Here is another set of reviewed patches that adds SPDX tags to different kernel files, based on a set of rules that are being used to parse the comments to try to determine that the license of the file is "GPL-2.0-or-later" or "GPL-2.0-only". Only the "obvious" versions of these matches are included here, a number of "non-obvious" variants of text have been found but those have been postponed for later review and analysis. There is also a patch in here to add the proper SPDX header to a bunch of Kbuild files that we have missed in the past due to new files being added and forgetting that Kbuild uses two different file names for Makefiles. This issue was reported by the Kbuild maintainer. These patches have been out for review on the linux-spdx@vger mailing list, and while they were created by automatic tools, they were hand-verified by a bunch of different people, all whom names are on the patches are reviewers" * tag 'spdx-5.2-rc3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (82 commits) treewide: Add SPDX license identifier - Kbuild treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 225 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 224 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 223 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 222 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 221 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 220 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 218 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 217 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 216 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 215 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 214 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 213 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 211 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 210 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 209 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 207 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 206 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 203 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 ...
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner2-24/+2
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 228 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194Thomas Gleixner10-22/+10
Based on 1 normalized pattern(s): license terms gnu general public license gpl version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner14-126/+14
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner20-100/+20
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-28Merge tag 'pinctrl-v5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlLinus Torvalds2-36/+11
Pull pin control fixes from Linus Walleij: "The commits that stand out are the Intel fixes that arrived during the merge window and I got relayed by pull request from Andy. Apart from that a minor Kconfig noise. - Interrupt clearing fix for the Intel pin controllers affecting touchpads on some laptops. - Compile Kconfig fix for the STMFX expander pin controller" * tag 'pinctrl-v5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: stmfx: Fix compile issue when CONFIG_OF_GPIO is not defined pinctrl: intel: Clear interrupt status in mask/unmask callback pinctrl: intel: Use GENMASK() consistently
2019-05-27Merge tag 'intel-pinctrl-v5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixesLinus Walleij1-35/+10
intel-pinctrl for v5.2-2 Fix a laggish ELAN touchpad responsiveness due to an odd interrupt masking. The following is an automated git shortlog grouped by driver: intel: - Clear interrupt status in mask/unmask callback - Use GENMASK() consistently
2019-05-24pinctrl: Add pinconf support for BM1880 SoCManivannan Sadhasivam1-0/+134
Add pinconf support for Bitmain BM1880 SoC. Pinconf support includes pin bias, slew rate and schmitt trigger. Drive strength support will be added later. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24pinctrl: Rework the pinmux handling for BM1880 SoCManivannan Sadhasivam1-174/+149
Rework the BM1880 SoC pinmux handling by removing the BM1880_PINMUX_FUNCTION_MUX define and merging it with the BM1880_PINMUX_FUNCTION definition. Since the PWM muxing is handled by generic pin controller in the SoC itself, there is no need to have a dedicated code to do the muxing in PWM registers. So, lets club all pinmux handling in the same per pin mux handling code. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24pinctrl: meson: add output support in pinconfJerome Brunet1-55/+127
Add pinconf support for PIN_CONFIG_OUTPUT_ENABLE and PIN_CONFIG_OUTPUT in the meson pinctrl driver. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24pinctrl: stm32: add lock mechanism for irqmux selectionAlexandre Torgue1-1/+50
GPIOs are split between several banks (A, B, ...) and each bank can have up to 16 lines. Those GPIOs could be used as interrupt lines thanks to exti lines. As there are only 16 exti lines, a mux is used to select which gpio line is connected to which exti line. Mapping is done as follow: -A0, B0, C0.. -->exti_line_0 (X0 selected by mux_0) -A1, B1, C1.. -->exti_line_1 (X1 selected by mux_1) ... This patch adds a protection to avoid overriding on mux_n for exti_line_n. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24pinctrl: stm32: Enable suspend/resume for stm32mp157c SoCAlexandre Torgue1-0/+5
Apply suspend/resume management for stm32mp157c MPU. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24pinctrl: stm32: add suspend/resume managementAlexandre Torgue2-0/+134
During power sequence, GPIO hardware registers could be lost if the power supply is switched off. Each device using pinctrl API is in charge of managing pins during suspend/resume sequences. But for pins used as gpio or irq stm32 pinctrl driver has to save the hardware configuration. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24pinctrl: stmfx: Fix compile issue when CONFIG_OF_GPIO is not definedAmelie Delaunay1-1/+1
When CONFIG_GPIO_OF is not defined, struct gpio_chip 'of_node' member does not exist: drivers/pinctrl/pinctrl-stmfx.c: In function 'stmfx_pinctrl_probe': drivers/pinctrl/pinctrl-stmfx.c:652:17: error: 'struct gpio_chip' has no member named 'of_node' pctl->gpio_chip.of_node = np; Fixes: 1490d9f841b1 ("pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24pinctrl: core: Do not add device links for hogsLinus Walleij1-1/+3
Hogs would create circular device links, so do not link the device to itself. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: stmfx: enable links creationsBenjamin Gaignard1-0/+1
Set create_link to inform pinctrl core that stmfx wants to create link with its consumers. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: Enable device link creation for pin controlBenjamin Gaignard1-0/+11
A pin controller may want to create a link between itself and its clients to be sure of suspend/resume call ordering. Introduce link_consumers field in pinctrl_desc structure to let pinctrl core knows that controller expect to create a link. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> [Renamed create_link to link_consumers] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: bcm: Allow PINCTRL_BCM2835 for ARCH_BRCMSTBDoug Berger1-1/+5
ARCH_BRCMSTB needs to use the BCM2835 pin controller for chips like BCM7211 which adopted that pin controller for GPIO. This commit makes the option menu configurable with default enabled for ARCH_BRCMSTB and ARCH_BCM2835. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: meson: g12a: add DS bank valueGuillaume La Roque1-18/+18
add drive-strength bank regiter and bit value for G12A SoC Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: meson: add support of drive-strength-microampGuillaume La Roque2-1/+116
drive-strength-microamp is a new feature needed for G12A SoC. the default DS setting after boot is usually 500uA and it is not enough for many functions. We need to be able to set the drive strength to reliably enable things like MMC, I2C, etc ... Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: meson: Rework enable/disable bias partGuillaume La Roque1-36/+49
rework bias enable/disable part to prepare drive-strength integration no functional changes Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: generic: add new 'drive-strength-microamp' property supportGuillaume La Roque1-0/+2
Add drive-strength-microamp property support to allow drive strength in uA Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: rockchip: fix leaked of_node referencesWen Yang1-0/+1
The call to of_parse_phandle returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: ./drivers/pinctrl/pinctrl-rockchip.c:3221:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 3196, but without a corresponding object release within this function. ./drivers/pinctrl/pinctrl-rockchip.c:3223:1-7: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 3196, but without a corresponding object release within this function. Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-gpio@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13Thomas Gleixner1-13/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details [based] [from] [clk] [highbank] [c] you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 355 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4Thomas Gleixner5-10/+5
Based on 1 normalized pattern(s): licensed under gplv2 or later extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 118 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21pinctrl: sh-pfc: r8a7778: Use common PORT_GP_CFG_27() macroGeert Uytterhoeven1-17/+1
Get rid of the custom PORT_GP_PUP_27() macro by using the common PORT_GP_CFG_27() macro instead. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-21pinctrl: sh-pfc: Add PORT_GP_27 helper macroGeert Uytterhoeven1-2/+6
This follows the style of the existing PORT_GP_X macros, and will be used by a follow-up patch for the r8a7778 SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-21pinctrl: sh-pfc: r8a77965: Add TPU pins, groups and functionsGeert Uytterhoeven1-0/+42
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs on the R-Car M3-N SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-21pinctrl: sh-pfc: r8a7796: Add TPU pins, groups and functionsGeert Uytterhoeven1-2/+44
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs on the R-Car M3-W and RZ/G2M SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>