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2014-03-12pinctrl: msm: Replace lookup tables with mathStephen Boyd1-6/+8
We don't need to waste space with these lookup tables, just do the math directly. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-12pinctrl: msm: Drop OF_IRQ dependencyStephen Boyd1-1/+1
This driver doesn't rely on any functionality living in drivers/of/irq.c to compile. Drop this dependency. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-12pinctrl: msm: Drop unused includesStephen Boyd3-6/+1
These includes are unused or can be handled via forward declarations. Remove them. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-12pinctrl: msm: Check for ngpios > MAX_NR_GPIOStephen Boyd1-1/+5
Fail the probe and print a warning if SoC specific drivers have more GPIOs than there can be accounted for in the static bitmaps. This should avoid silent corruption/failures in the future. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-12pinctrl: msm: Silence recursive lockdep warningStephen Boyd1-0/+7
If a driver calls enable_irq_wake() on a gpio turned interrupt from the msm pinctrl driver we'll get a lockdep warning like so: ============================================= [ INFO: possible recursive locking detected ] 3.14.0-rc3 #2 Not tainted --------------------------------------------- modprobe/52 is trying to acquire lock: (&irq_desc_lock_class){-.....}, at: [<c026aea0>] __irq_get_desc_lock+0x48/0x88 but task is already holding lock: (&irq_desc_lock_class){-.....}, at: [<c026aea0>] __irq_get_desc_lock+0x48/0x88 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(&irq_desc_lock_class); lock(&irq_desc_lock_class); *** DEADLOCK *** May be due to missing lock nesting notation 4 locks held by modprobe/52: #0: (&__lockdep_no_validate__){......}, at: [<c04f2864>] __driver_attach+0x48/0x98 #1: (&__lockdep_no_validate__){......}, at: [<c04f2874>] __driver_attach+0x58/0x98 #2: (&irq_desc_lock_class){-.....}, at: [<c026aea0>] __irq_get_desc_lock+0x48/0x88 #3: (&(&pctrl->lock)->rlock){......}, at: [<c04bb4b8>] msm_gpio_irq_set_wake+0x20/0xa8 Silence it by putting the gpios into their own lock class. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-12pinctrl: mvebu: silence WARN to dev_warnSebastian Hesselbarth1-1/+2
Pinctrl will WARN on missing DT resources, which is a little bit too noisy. Use dev_warn with FW_BUG instead. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-12pinctrl: msm: drop wake_irqs bitmapJosh Cartwright1-13/+1
Currently, the wake_irqs bitmap is used to track whether there are any gpio's which are configured as wake irqs, and uses this to determine whether or not to call enable_irq_wake()/disable_irq_wake() on the summary interrupt. However, the genirq core already handles this case, by maintaining a 'wake_count' per irq_desc, and only calling into the controlling irq_chip when wake_count transitions 0 <-> 1. Drop this bitmap, and unconditionally call irq_set_irq_wake() on the summary interrupt. Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-11pinctrl-baytrail: add function mux checking in gpio pin requestChew, Kean Ho1-3/+39
The requested gpio pin must has the func_pin_mux field set to GPIO function by BIOS/FW in advanced. Else, the gpio pin request would fail. This is to ensure that we do not expose any gpio pins which shall be used for alternate functions, for eg: wakeup pin, I/O interfaces for LPSS, etc. Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Reviewed-by: Darren Hart <dvhart@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-11pinctrl: tegra: fix some typos and inconsistenciesStephen Warren2-29/+17
drive_dev3_pins in pinctrl-tegra114.c wasn't used; delete it. pinctrl-tegra124.c had quite a few typos. Fix those. pinctrl-tegra124.c had a few mismatches between the *_groups[] ararys and the function lists in tegra124_groups[]. Fix those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-09Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-1/+1
Pull ARM SoC fixes from from Olof Johansson: "A collection of fixes for ARM platforms. A little large due to us missing to do one last week, but there's nothing in particular here that is in itself large and scary. Mostly a handful of smaller fixes all over the place. The majority is made up of fixes for OMAP, but there are a few for others as well. In particular, there was a decision to rename a binding for the Broadcom pinctrl block that we need to go in before the final release since we then treat it as ABI" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: dts: omap3-gta04: Add ti,omap36xx to compatible property to avoid problems with booting ARM: tegra: add LED options back into tegra_defconfig ARM: dts: omap3-igep: fix boot fail due wrong compatible match ARM: OMAP3: Fix pinctrl interrupts for core2 pinctrl: Rename Broadcom Capri pinctrl binding pinctrl: refer to updated dt binding string. Update dtsi with new pinctrl compatible string ARM: OMAP: Kill warning in CPUIDLE code with !CONFIG_SMP ARM: OMAP2+: Add support for thumb mode on DT booted N900 ARM: OMAP2+: clock: fix clkoutx2 with CLK_SET_RATE_PARENT ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4 ARM: DRA7: hwmod data: correct the sysc data for spinlock ARM: OMAP5: PRM: Fix reboot handling ARM: sunxi: dt: Change the touchscreen compatibles ARM: sun7i: dt: Fix interrupt trigger types
2014-03-05pinctrl: sirf: fix kernel panic in gpio_lock_as_irqBarry Song1-2/+2
commit 655dada6277991 causes kernel panic, this patch fixes it. [ 1.197816] [ffffffee] *pgd=0d7fd821, *pte=00000000, *ppte=00000000 [ 1.204070] Internal error: Oops: 17 [#1] PREEMPT SMP ARM [ 1.209447] Modules linked in: [ 1.212490] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.0-rc1 #3 [ 1.218737] task: cd03c000 ti: cd040000 task.ti: cd040000 [ 1.224127] PC is at gpiod_lock_as_irq+0xc/0x64 [ 1.228634] LR is at sirfsoc_gpio_irq_startup+0x18/0x44 [ 1.233842] pc : [<c01d3990>] lr : [<c01d1c38>] psr: a0000193 [ 1.233842] sp : cd041d30 ip : 00000000 fp : 00000000 [ 1.245296] r10: 00000000 r9 : cd023db4 r8 : 60000113 [ 1.250505] r7 : 0000003e r6 : cd023dd4 r5 : c06bfa54 r4 : cd023d80 [ 1.257014] r3 : 00000020 r2 : 00000000 r1 : ffffffea r0 : ffffffea [ 1.263526] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 1.270903] Control: 10c53c7d Table: 00004059 DAC: 00000015 [ 1.276631] Process swapper/0 (pid: 1, stack limit = 0xcd040240) [ 1.282620] Stack: (0xcd041d30 to 0xcd042000) [ 1.286963] 1d20: cd023d80 c01d1c38 c01d1c20 cd023d80 [ 1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c [ 1.286963] 1d20: cd023d80 c01d1c38 c01d1c20 cd023d80 [ 1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c [ 1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c [ 1.303283] 1d60: 00000800 00000083 ccb6d880 cd023d80 c02b41d8 00000083 0000003e ccb7c410 [ 1.311442] 1d80: 00000000 c00671dc 00000083 0000003e c02b41d8 cd3dd5c0 0000003e ccb7c634 [ 1.319601] 1da0: cd040030 c00672a8 cd3dd5c0 ccb7c410 ccb6d340 ccb7c410 ccb6d340 cd3dd400 [ 1.327760] 1dc0: cd3dd410 c02b4434 ccb7c410 c01265a8 00000001 cd3dd410 c0687108 00000000 [ 1.335919] 1de0: c0687108 00000000 00000000 c0240170 c0240158 cd3dd410 c06c30d0 c023e8bc [ 1.344079] 1e00: c023e9d4 00000000 cd3dd410 c023e9d4 c0682150 c023cf88 cd003e98 cd2d50c4 [ 1.352238] 1e20: cd3dd410 cd3dd444 c06822f0 c023e768 cd3dd418 cd3dd410 c06822f0 c023de14 [ 1.360397] 1e40: cd3dd418 00000000 cd3dd410 c023c398 cd041e78 cd041ea8 cd3dd400 cd3dd410 [ 1.368556] 1e60: 00000083 00000000 cd3dd400 cd3dd410 00000083 000000c8 c04e00c8 c023fee8 [ 1.376715] 1e80: 00000000 cd041ea8 cd3dd400 00000001 00000083 c024048c c0435ef8 c0434dec [ 1.384874] 1ea0: c068da58 c04c6d04 c0682150 c0435ef8 ffffffff 00000000 00000000 c068da58 [ 1.393033] 1ec0: 00000020 00000000 00000000 00000000 c05dabb8 00000007 c068d640 c068d640 [ 1.401193] 1ee0: c04c247c c04c249c 00000000 c00088e8 cd004c00 c043bbb8 cd029180 c03812a0 [ 1.409352] 1f00: 00000000 00000000 60000113 c0673728 60000113 c0673728 00000000 00000000 [ 1.417511] 1f20: cd7fce01 c0390a54 00000065 c003a81c c049e8bc 00000007 cd7fce0e 00000007 [ 1.425670] 1f40: 00000000 c05dabb8 00000007 c068d640 c068d640 c04c050c c04e00c8 00000065 [ 1.433829] 1f60: c04e00c0 c04c0c54 00000007 00000007 c04c050c c037d8fc cd03c000 c004322c [ 1.441988] 1f80: c0662b40 0000d640 c03737c0 00000000 00000000 00000000 00000000 00000000 [ 1.450147] 1fa0: 00000000 c03737cc 00000000 c000e478 00000000 00000000 00000000 00000000 [ 1.458307] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 1.466467] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 0002d481 05014092 [ 1.474640] [<c01d3990>] (gpiod_lock_as_irq) from [<c01d1c38>] (sirfsoc_gpio_irq_startup+0x18/0x44) [ 1.483661] [<c01d1c38>] (sirfsoc_gpio_irq_startup) from [<c0068438>] (irq_startup+0x34/0x6c) [ 1.492163] [<c0068438>] (irq_startup) from [<c0067044>] (__setup_irq+0x450/0x4b8) [ 1.499714] [<c0067044>] (__setup_irq) from [<c00671dc>] (request_threaded_irq+0xa8/0x128) [ 1.507960] [<c00671dc>] (request_threaded_irq) from [<c00672a8>] (request_any_context_irq+0x4c/0x7c) [ 1.517164] [<c00672a8>] (request_any_context_irq) from [<c02b4434>] (gpio_extcon_probe+0x144/0x1d4) [ 1.526279] [<c02b4434>] (gpio_extcon_probe) from [<c0240170>] (platform_drv_probe+0x18/0x48) [ 1.534783] [<c0240170>] (platform_drv_probe) from [<c023e8bc>] (driver_probe_device+0x120/0x238) [ 1.543641] [<c023e8bc>] (driver_probe_device) from [<c023cf88>] (bus_for_each_drv+0x58/0x8c) [ 1.552143] [<c023cf88>] (bus_for_each_drv) from [<c023e768>] (device_attach+0x74/0x88) [ 1.560126] [<c023e768>] (device_attach) from [<c023de14>] (bus_probe_device+0x84/0xa8) [ 1.568113] [<c023de14>] (bus_probe_device) from [<c023c398>] (device_add+0x440/0x520) [ 1.576012] [<c023c398>] (device_add) from [<c023fee8>] (platform_device_add+0xb4/0x214) [ 1.584084] [<c023fee8>] (platform_device_add) from [<c024048c>] (platform_device_register_full+0xb8/0xdc) [ 1.593719] [<c024048c>] (platform_device_register_full) from [<c04c6d04>] (sirfsoc_init_late+0xec/0xf4) [ 1.603185] [<c04c6d04>] (sirfsoc_init_late) from [<c04c249c>] (init_machine_late+0x20/0x28) [ 1.611603] [<c04c249c>] (init_machine_late) from [<c00088e8>] (do_one_initcall+0xf8/0x144) [ 1.619934] [<c00088e8>] (do_one_initcall) from [<c04c0c54>] (kernel_init_freeable+0x13c/0x1dc) [ 1.628620] [<c04c0c54>] (kernel_init_freeable) from [<c03737cc>] (kernel_init+0xc/0x118) Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05pinctrl: sh-pfc: r8a7791: SD1_CLK fixMagnus Damm1-2/+4
Fix the SD1_CLK handling for r8a7791. Without this patch it is impossible to request all pins needed for SDHI1 on the Koelsch board. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05pinctrl: msm: make PINCTRL_MSM bool instead of tristateJosh Cartwright1-1/+1
Modular builds of pinctrl-msm break due to handle_bad_irq being unexported for module use. For now, make PINCTRL_MSM 'bool'. Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05pinctrl: sunxi: Fix interrupt register offset calculationHans de Goede1-3/+3
This fixing setting the interrupt type for eints >= 8. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05pinctrl: sunxi: Fix masking when setting irq typeHans de Goede1-1/+1
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05pinctrl: sunxi: use chained_irq_{enter, exit} for GIC compatibilityChen-Yu Tsai1-0/+4
On tha Allwinner A20 SoC, the external interrupts on the pin controller device are connected to the GIC. Without chained_irq_{enter, exit}, external GPIO interrupts, such as used by mmc core card detect, cause the system to hang. This issue was first encountered during my attempt to get out-of-band interrupts for WiFi on the Cubietruck working. With David's new series of sunci-mci using mmc slot-gpio for (GPIO interrupt based) card detection, removing the SD card also causes my Cubietruck to hang. This problem should extend to all Allwinner A20 based boards. With this fix, the system no longer hangs when I remove or insert the SD card. /proc/interrupts show that the interrupt has correctly fired. However the system still does not detect card removal/insertion. I believe this is another unrelated issue. Cc: stable@vger.kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05pinctrl: sh-pfc: r8a7791: Add alternative MSIOF pin groupsGeert Uytterhoeven1-0/+469
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05pinctrl: sh-pfc: r8a7790: Add alternative MSIOF pin groupsGeert Uytterhoeven1-0/+129
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-03Merge branch 'pinctrl-mvebu' into develLinus Walleij10-288/+1289
2014-03-01Merge tag 'tags/for-mvebu-pinctrl-3xx' into mvebu/pinctrlJason Cooper4-0/+931
Sign for-mvebu/pinctrl-3xx
2014-02-25pinctrl: mvebu: dove: use global register regmapSebastian Hesselbarth1-66/+58
Now that we have a regmap for global registers, get rid of the last remaining hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: mvebu: dove: use remapped pmu_mpp registersSebastian Hesselbarth1-5/+7
Now that we have ioremapped pmu_mpp registers, get rid of hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: mvebu: dove: use remapped mpp4 registerSebastian Hesselbarth1-26/+27
Now that we have an ioremapped mpp4 register, get rid of hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: mvebu: dove: use remapped mpp base registersSebastian Hesselbarth1-13/+14
Now that we have ioremapped mpp base registers, get rid of hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: mvebu: dove: request syscon regmap for global registersSebastian Hesselbarth2-0/+28
Dove pinctrl uses some global config registers to control pins. This patch requests a syscon regmap for those registers. As this changes DT to driver requirements, fallback to a self-registered regmap with hardcoded resources, if the corresponding syscon DT node is missing. Also, WARN about old DT binding usage to encourage users to update their DTBs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: mvebu: dove: request additional resourcesSebastian Hesselbarth1-3/+42
Dove pinctrl also requires additional registers to control all pins. This patch requests resources for mpp4 and pmu-mpp register ranges. As this changes DT to driver requirements, fallback to hardcoded resources, if the corresponding DT regs have not been set. Also, WARN about old DT binding usage to encourage users to update their DTBs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385Thomas Petazzoni3-0/+467
The Marvell Armada 380/385 are new ARM SoCs from Marvell, part of the mvebu family, but using a Cortex-A9 CPU core. In terms of pin-muxing, it is similar to Armada 370 and XP for the register layout, only different in the number of available pins and their functions. Therefore, we simply use the existing drivers/pinctrl/mvebu/ infrastructure, with no other changes that the list of pins and corresponding functions. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-02-25pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375Thomas Petazzoni3-0/+464
The Marvell Armada 375 is a new ARM SoC from Marvell, part of the mvebu family, but using a Cortex-A9 CPU core. In terms of pin-muxing, it is similar to Armada 370 and XP for the register layout, only different in the number of available pins and their functions. Therefore, we simply use the existing drivers/pinctrl/mvebu/ infrastructure, with no other changes that the list of pins and corresponding functions. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2014-02-25pinctrl: mvebu: dove: reuse mpp_{set,get} in pmu callbacksSebastian Hesselbarth1-20/+17
Dove has pins that can be switched between normal and pmu functions. Rework pmu_mpp callbacks to reuse default mpp ctrl helpers. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-02-25pinctrl: mvebu: dove: consolidate auto-numbered pmu mpp rangesSebastian Hesselbarth1-16/+1
Passing a NULL name for pin ranges will auto-generate standard names for each pin. With common pinctrl driver now checking NULL name correctly, consolidate mpp pins 0-15. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-02-25pinctrl: mvebu: remove MPP_REG_CTRL macroThomas Petazzoni1-16/+3
Now that each per-SoC pinctrl driver must implement its own get/set functions, there is no point in keeping the MPP_REG_CTRL macro, whose purpose was to let the core pinctrl mvebu driver use default get/set functions. While at it also update the comment about mvebu_mpp_ctrl. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-02-25pinctrl: mvebu: remove common get/set functionsSebastian Hesselbarth1-47/+2
With every SoC always providing its own get/set callbacks, we can now remove the generic ones, remove the obsolete base address, and always use the provided callbacks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-02-25pinctrl: mvebu: move resource allocation to SoC specific driversSebastian Hesselbarth5-16/+33
The way that mvebu pinctrl is designed, requesting mpp registers in common pinctrl driver does not allow SoC specific drivers to access this resource. Move resource allocation in each SoC pinctrl driver and enable already provided mpp_{set,get} callbacks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-02-25pinctrl: mvebu: armada-xp: provide generic mpp callbacksSebastian Hesselbarth1-0/+12
We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks that use generic mpp pins helper and will be used later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-02-25pinctrl: mvebu: armada-370: provide generic mpp callbacksSebastian Hesselbarth1-0/+12
We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks that use generic mpp pins helper and will be used later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-02-25pinctrl: mvebu: kirkwood: provide generic mpp callbacksSebastian Hesselbarth1-0/+12
We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks that use generic mpp pins helper and will be used later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
2014-02-25pinctrl: mvebu: dove: provide generic mpp callbacksSebastian Hesselbarth1-14/+22
We want to get rid of passing register addresses to common pinctrl driver, so provide set/get callbacks that use generic mpp pins helper and will be used later. While at it, also make use of globally defined MPP macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-02-25pinctrl: mvebu: add common mpp reg helper to mvebu pinctrl includeSebastian Hesselbarth1-0/+28
This adds some defines and helper functions for the common mpp reg layout to mvebu pinctrl include. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch>
2014-02-25pinctrl: mvebu: remove passing mvebu_mpp_ctrl to callbacksSebastian Hesselbarth3-45/+32
The only valuable information a special callback can derive from mvebu_mpp_ctrl passed to it, is the pin id. Instead of passing the struct, pass the pid directly. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-02-25pinctrl: mvebu: identify generic controls by nameSebastian Hesselbarth1-14/+16
We treat unnamed controls as generic mvebu mpp register controls but we identify them by not being special controls. Flip the logic and use the name pointer as identification instead. While at it, add some comments explaining the not so obvious treatment. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-02-25pinctrl: mvebu: remove obsolete per-control name buffer allocationSebastian Hesselbarth1-9/+0
With the introduction of a global name buffer, we can now remove the allocation and preparation of per-control name buffers. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-02-25pinctrl: mvebu: count unnamed controls and allocate name bufferSebastian Hesselbarth1-5/+19
pinctrl-mvebu allows SoCs to pass unnamed controls that will get an auto-generated name of "mpp<PIN#>". Currently, we are allocating name buffers on a per-control basis while looping over passed controls. This counts the total number of unnamed controls and allocates a global name buffer instead. The new buffer is then used while assigning controls to pinctrl groups later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-02-25pinctrl: pfc: r8a7791: add mux data for IIC(B) coresWolfram Sang1-0/+64
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: at91: implement get_directionRichard Genoud1-0/+12
This is needed for gpiod_get_direction(). Otherwise, it returns -EINVAL. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: imx: Fix pin name in debug message.Martin Fuzzey1-1/+1
The wrong index counter was being used, causing the debug message to show an incorrect pin name. Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl-sunxi: Fix sun5i-a13 port F multiplexingHans de Goede1-6/+6
The correct value for selecting the mmc0 function on port F pins is 2 not 4, as per the data-sheet: http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: pinctrl-adi: combine multiple groups of one function togetherSonic Zhang4-147/+139
The data pins of some peripheral are different if connecting to different devices in one pinmux function. In the PPI case, data pins can be used in 8, 16 and 24 pin groups individually. Add these groups into one ppi function. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: sirf: update copyright years to 2014Barry Song3-3/+6
Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: nomadik: Convert to modern pm_opsUlf Hansson1-8/+9
Use the SIMPLE_DEV_PM_OPS macro and convert to the modern pm ops. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25pinctrl: nomadik: Silence compiler warn for !CONFIG_PMUlf Hansson1-1/+3
The static suspend/resume functions were not being used while !CONFIG_PM. Fix it and convert to CONFIG_PM_SLEEP. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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