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path: root/drivers/pinctrl
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2012-09-21pinctrl: exynos: Correct the detection of wakeup-eint nodeTomasz Figa1-5/+9
Current way of finding the wakeup-eint node scans the whole device tree not only children of the pinctrl node, so it might detect a wakeup-eint node of another pinctrl device. This patch limits the scope of looking for nodes only to subnodes of the pinctrl node. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Mark exynos_irq_demux_eint as inlineTomasz Figa1-1/+1
The exynos_irq_demux_eint utility function is used in chained IRQ handler for EINT16-31 to handle multiplexed interrupts. Inlining it should improve the performance a bit. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Handle only unmasked wakeup interruptsTomasz Figa1-2/+5
A bit in EINTxx_PEND register is set regardless of interrupt mask, which causes spurious interrupts. To avoid them, the read value of pending register must be masked with current interrupt mask manually. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Fix typos in gpio/wkup _irq_maskTomasz Figa1-2/+2
To mask GPIO/wakeup IRQ, the corresponding bit in mask register has to be set. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTaTomasz Figa2-0/+13
Pins used as GPIO interrupts need to be configured as EINTs. This patch adds the required configuration code to exynos_gpio_irq_set_type, to set the pin as EINT when its interrupt trigger is configured. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-18pinctrl: imx: remove duplicated constRichard Zhao1-1/+1
fix smatch warning: drivers/pinctrl/pinctrl-imx.c:435:21: warning: duplicate const Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-14pinctrl: tegra: move pinconf-tegra.h content into drivers/pinctrlStephen Warren2-2/+44
Now that Tegra's pinmux is configured solely from device tree, there's no need for the pinconf types to be defined in arch/arm/mach-tegra/. Move it into the pinctrl directory to clean up mach-tegra, as a pre- requisite for single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-14pinctrl: use kasprintf() in pinmux_request_gpio()Thomas Petazzoni1-4/+1
Instead of using a temporary buffer, snprintf() and kstrdup(), just use kasprintf() that does the same thing in just oneline. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Colin Cross <ccross@google.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-13OF: pinctrl: MIPS: lantiq: adds support for FALCON SoCJohn Crispin3-0/+474
Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks of up to 32 pins. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
2012-09-13OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl supportJohn Crispin5-0/+1330
Implement support for pinctrl on lantiq/xway socs. The IO core found on these socs has the registers for pinctrl, pinconf and gpio mixed up in the same register range. As the gpio_chip handling is only a few lines, the driver also implements the gpio functionality. This obseletes the old gpio driver that was located in the arch/ folder. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
2012-09-13pinctrl: pinctrl-single: Add pinctrl-single,bits type of muxPeter Ujfalusi1-10/+36
With pinctrl-single,bits it is possible to update just part of the register within the pinctrl-single,function-mask area. This is useful when one register configures mmore than one pin's mux. pinctrl-single,bits takes three parameters: <reg offset, value, sub-mask> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> [Removed a misplaced comment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-10pinctrl/nomadik : add MC1_a_2 pin MC1 function group listPatrice Chotard1-1/+4
Another possible pin configuration for the MC1 pin group. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-10pinctrl: pinctrl-single: Make sure we do not change bits outside of maskPeter Ujfalusi1-1/+1
Use the pcs->fmask to make sure that the value is not changing (setting) bits in areas where it should not. To avoid situations like this: pmx_dummy: pinmux@4a100040 { compatible = "pinctrl-single"; reg = <0x4a100040 0x0196>; #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x00ff>; }; &pmx_dummy { pinctrl-names = "default"; pinctrl-0 = <&board_pins>; board_pins: pinmux_board_pins { pinctrl-single,pins = < 0x6c 0xf0f 0x6e 0x10f 0x70 0x23f 0x72 0xa5f >; }; }; Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-07pinctrl: add exynos4210 specific extensions for samsung pinctrl driverThomas Abraham4-0/+782
Add information about the Exynos4210 pin banks and driver data which is used by the Samsung pinctrl driver. In addition to this, the support for external gpio and wakeup interrupt support is included and hooked up with the Samsung pinctrl driver. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07pinctrl: add samsung pinctrl and gpiolib driverThomas Abraham4-0/+1133
Add a new device tree enabled pinctrl and gpiolib driver for Samsung SoC's. This driver provides a common and extensible framework for all Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This driver supports only device tree based instantiation and hence can be used only on those Samsung platforms that have device tree enabled. This driver is split into two parts: the pinctrl interface and the gpiolib interface. The pinctrl interface registers pinctrl devices with the pinctrl subsystem and gpiolib interface registers gpio chips with the gpiolib subsystem. The information about the pins, pin groups, pin functions and gpio chips, which are SoC specific, are parsed from device tree node. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-05pinctrl: sirf: add DT-binding pinmux mapping supportBarry Song1-1/+57
This makes us possible to define pinmux mapping in board-specific DTS. prima2.dtsi provides all possible (groups,functions) configuration, and device in .dts select configurations from dtsi files. Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-04Merge branch 'cleanup/io-pci' into next/cleanupArnd Bergmann8-24/+14
The io-pci series has gained a merge to resolve a nontrivial conflict. * cleanup/io-pci: ARM: Fix ioremap() of address zero Also includes an update to Linux 3.6-rc3 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-03pinctrl/nomadik: MASK_ON_SUSPENDEtienne Carriere1-0/+1
ux500 machines performs pins (GPIO) reconfiguration when entering in the suspended mode. This reconfiguration aims at reaching an ultra low power HW configuration. Due to this HW reconfiguration, some HW devices can change of HW state and have their output signals at level that could generate IRQs. If the non-wakeup IRQs are disabled but not yet masked (delayed interrupt disable feature from the generic irq layer), effective interrupts reach the system only because the system attempt to enter the suspended mode. To prevent such IRQs to trig, all irq chips embedded in ux500 platform should enable their IRQCHIP_MASK_ON_SUSPEND flag. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03pinctrl: imx5: start numbering pad from 0Shawn Guo2-446/+446
Unlike imx6q pinctrl driver that starts nubmering pad from 0, imx5 pinctrl drivers number pad from 1. It causes problem/confusion when driver accesses imx51_pinctrl_pads array using pin ID as the index. Change imx51_pads and imx53_pads numbering start from 0. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03pinctrl: pinctrl-imx: add imx35 pinctrl driverUwe Kleine-König3-0/+1604
This is mostly cut'n'paste from the imx51 pinctrl driver. The data was generated using sed and awk on arch/arm/plat-mxc/include/mach/iomux-mx35.h. Changes since (implicit) v1 - remove references to file names in binding documentation - remove sed commands from comments in driver - add explicit numbers for pins and functions Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03pinctrl/nomadik: add STn8815 ASIC supportLinus Walleij5-0/+377
This adds support for the STN8815 ASIC for the Nomadik pin controller. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03pinctrl/nomadik: add ASIC DB8450 pinctrl driverPatrice Chotard5-0/+1021
This implements a subdriver for the DB8540 ASIC for the Nomadik pin controller. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-17pinctrl/nomadik: add kp_b_2 keyboard function group listPatrice Chotard1-1/+4
There is yet another way to mux the keyboard, so fix up that group. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-17pinctrl: imx51: fix .conf_reg of MX51_PAD_SD2_CMD__CSPI_MOSIShawn Guo1-1/+1
The .conf_reg of MX51_PAD_SD2_CMD__CSPI_MOSI should be 0x7bc rather than NO_PAD. This error will cause SD2 probe failure. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-17trivial: pinctrl core: remove extraneous code linesRichard Genoud1-10/+3
In function pinctrl_get_locked, pointer p is returned on error, and also return on no_error. So, we just return it with no error test. It's pretty the same in function pinctrl_lookup_state_locked: state is returned in every case, so we drop the error test and just return state. Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
2012-08-17pinctrl/nomadik: fix null in irqdomain errorpathLinus Walleij1-1/+1
The irqdomain conversion failed to notice that we do not always have a DT node to dereference, fix this up by using a simple dev_err() that also tells the name of the device. Cc: Loic Pallardy <loic.pallardy@st.com> Cc: Patrice Chotard <patrice.chotard@stericsson.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-13pinctrl/coh901: move header to platform data dirLinus Walleij1-1/+1
Move the platform-specific COH901 pin control header out of the ARM tree and down into the proper platform data include directory. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-13pinctrl/coh901: retire ancient GPIO block versionsLinus Walleij1-175/+41
As the non-U335 U300 variants are retired from the ARM tree, also delete the pinctrl driver codepaths for these variants. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-07drivers/pinctrl/pinctrl-nomadik.c: drop devm_kfree of devm_kzalloc'd dataJulia Lawall1-1/+0
devm_kfree should not have to be explicitly used. The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,d; @@ x = devm_kzalloc(...) ... ?-devm_kfree(d,x); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-07pinctrl-sirf: remove devm_kfree at error pathDevendra Naga1-1/+0
the pointers that are allocated with devm_kzalloc will be automatically freed, at unload time. Signed-off-by: Devendra Naga <develkernel412222@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-07pinctrl/nomadik: fix hsi function group listPatrice Chotard1-1/+1
Tidy up a small typo in the HSI function group list. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-05pinctrl/pinctrl-u300: remove unneeded devm_kfree callDevendra Naga1-6/+2
the allocated memory will be destroyed at the driver unload time, automatically if driver uses the devm_ functions, so no need of doing devm_kfree at the error path Signed-off-by: Devendra Naga <develkernel412222@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-05pinctrl: mxs: register driver at postcore_initcall timeShawn Guo2-2/+2
It's not so usual, but there are still some cases which require pinctrl driver function at arch_initcall time. So register imx23 and imx28 pinctrl driver at postcore_initcall time. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-24Merge tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlLinus Torvalds11-79/+1064
Pull pin control changes from Linus Walleij: "These are the accumulated pin control patches for v3.6: - Various cleanups to the U300 driver - Refactor the pin control core to automatically remove any GPIO ranges when the drivers are removed, instead of having the drivers do this explicitly. - Add a function for registering a batch of GPIO ranges. - Fix a number of incorrect but non-regressive error checks. - Incremental improvements to the COH901, i.MX and Nomadik drivers - Add a one-register-per-pin entirely Device Tree-based pin control driver from Tony Lindgren." * tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: Add one-register-per-pin type device tree based pinctrl driver pinctrl/nomadik: add spi2_oc1_2 pin group pinctrl/nomadik: kerneldoc fix pinctrl/nomadik: use devm_* allocators for gpio probe pinctrl/nomadik: add pin group to mco function pinctrl/nomadik: add hsit_a_2 pin group pinctrl/nomadik: add pin group smcs1 and smps0 pinctrl/nomadik: fix hsir_a_1_pins pin list pinctrl: pinctrl-imx: fix map setting problem if NO_PAD_CTL is set pinctrl/coh901: use clk_prepare_[en|dis]able() pinctrl/pinctrl-tegra: remove IS_ERR checking of pmx->pctl pinctrl/pinctrl-spear: remove IS_ERR checking of pmx->pctl pinctrl/u300: drop unused variable pinctrl: select the proper symbol pinctrl: add pinctrl_add_gpio_ranges function pinctrl: remove pinctrl_remove_gpio_range pinctrl/pinctrl-core: cleanup pinctrl_register pinctrl/u300: delete pointless debug print pinctrl/pinctrl-u300: remove devm_kfree at driver unload
2012-07-23Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-1/+488
Pull arm-soc pincontrol drivers update from Arnd Bergmann: "We are converting platforms to use the pinctrl framework over time, rather than using platform specific code for the same effect. This adds the respective driver for the prima2 platform." * tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: prima2: enable gpiolib unconditionally PINCTRL: SiRF: add GPIO and GPIO irq support in CSR SiRFprimaII
2012-07-23Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-1/+1
Pull arm-soc device tree description updates from Arnd Bergmann: "This branch contains two kinds of updates: Some platforms in the process of getting converted to device tree based booting, and the platform specific patches necessary for that are included here. Other platforms are already converted, so we just need to update the actual device tree source files and the binding documents to add support for new board and new drivers. In the future we will probably separate those into two branches, and in the long run, the plan is to move the device tree source files out of the kernel repository, but that has to wait until we have completed a much larger portion of the binding documents." Fix up trivial conflicts in arch/arm/mach-imx/clk-imx6q.c due to newly added clkdev registers next to a few removed unnecessary ones. * tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits) ARM: LPC32xx: Add PWM to base dts file ARM: EXYNOS: mark the DMA channel binding for SPI as preliminary ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS5 platforms ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOS5 ARM: EXYNOS: Add spi clock support for EXYNOS5 ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS4 platforms ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOX4 ARM: EXYNOS: Fix the incorrect hierarchy of spi controller bus clock ARM: ux500: Remove PMU platform registration when booting with DT ARM: ux500: Remove temporary snowball_of_platform_devs enablement structure ARM: ux500: Ensure vendor specific properties have the vendor's identifier pinctrl: pinctrl-nomadik: Append sleepmode property with vendor specific prefixes ARM: ux500: Move rtc-pl031 registration to Device Tree when enabled ARM: ux500: Enable the AB8500 RTC for all DT:ed DB8500 based devices ARM: ux500: Correctly reference IRQs supplied by the AB8500 from Device Tree ARM: ux500: Apply ab8500-debug node do the db8500 DT structure ARM: ux500: Add a ab8500-usb Device Tree node for db8500 based devices ARM: ux500: Add db8500 Device Tree node for misc/ab8500-pwm ARM: ux500: Add db8500 Device Tree node for ab8500-sysctrl ARM: ux500: Enable LED heartbeat functionality on Snowbal via DT ...
2012-07-14pinctrl: Add one-register-per-pin type device tree based pinctrl driverTony Lindgren3-0/+996
Add one-register-per-pin type device tree based pinctrl driver. This driver has been tested on omap2+ series of processors, where there is either an 8 or 16-bit padconf register for each pin. Support for other similar pinmux controllers can be added. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-14pinctrl: pinctrl-imx6q: add missed mux function for USBOTG_IDDong Aisheng1-0/+2
The original pin registers table is derived from u-boot mainline, but somehow it was found missing some mux functions for USBOTG_ID. We added it at the bottom by following the exist pin function ids, then it will not break the exist using of pin function id in dts file. Reported-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
2012-07-14pinctrl: pinctrl-imx: only print debug message when DEBUG is definedDong Aisheng1-0/+2
Fix regression for commit 3a86a5f8 (pinctrl: pinctrl-imx: free allocated pinctrl_map structure only once and use kernel facilities for IMX_PMX_DUMP) introduced in 3.5-rc3. With above commit, the debug code will alway be excuted. Change to excute it only when DEBUG is defined. Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-13pinctrl: pinctrl-nomadik: Append sleepmode property with vendor specific prefixesLee Jones1-1/+1
Any non-standard property should contain the vendor's identifier which should be perpended onto the property name followed by a comma. This aids in name-space collision prevention. This patch ensures the sleepmode property adheres to the rules. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-07-05pinctrl/nomadik: add spi2_oc1_2 pin groupPatrice Chotard1-1/+4
On 8500 and 9540, all SPI2 pins are driven by SPI block except SPI2_FRM which is driven as GPIO due to specific constraints. A new group spi2_oc1_2 is created which exclude SPI2_FRM pin. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-04pinctrl/nomadik: kerneldoc fixLinus Walleij1-1/+1
Document a missing function parameter to nmk_config_pin(). Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-04pinctrl/nomadik: use devm_* allocators for gpio probeLinus Walleij1-26/+9
The GPIO portions of the Nomadik pinctrl driver was not using the managed devm_* interfaces, lets' use them consequently and cut down the error path and special case handling. Acked-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03pinctrl/nomadik: add pin group to mco functionPatrice Chotard1-1/+3
mc0_dat47_a_1 and mc0dat31dir_a_1 groups are missing for mco function Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03pinctrl/nomadik: add hsit_a_2 pin groupPatrice Chotard1-1/+4
On 8500 and 9540, all HSI pins are driven by HSI block except HSIT_ACWAKE0_a which is driven as GPIO due to specific constraints. A new group hsit_a_2 is created which exclude HSIT_ACWAKE0_a pin. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03pinctrl/nomadik: add pin group smcs1 and smps0Patrice Chotard1-3/+9
Add smcs1_b_1_pins as DB8500_PIN_B14 can be SM_CS1 in alt B Add smps0_c_1_pins as DB8500_PIN_E8 can be SM_PS0 in alt C Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03pinctrl/nomadik: fix hsir_a_1_pins pin listPatrice Chotard1-3/+4
move DB8500_PIN_AJ11(HSIR_RDY0_a) from hsit_a_1_pins to hsir_a_1_pins Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03pinctrl: pinctrl-imx: fix map setting problem if NO_PAD_CTL is setHui Wang1-6/+7
new_map is allocated according to map_num instead of grp->npins, if a pin or some pins of a group has NO_PAD_CTL property, the map_num and the grp->npin are different definitely. When we set mapping information to the new_map[], we should skip those pins with NO_PAD_CTL from index, otherwise it is possible the driver will aceesss to a unallocated region. Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Hui Wang <jason77.wang@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03pinctrl/coh901: use clk_prepare_[en|dis]able()Linus Walleij1-3/+3
The COH901 GPIO driver did not prepare or unprepare its clock, so let us fix it to do so. Acked-by: Pankaj Jangra <jangra.pankaj9@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03pinctrl/pinctrl-tegra: remove IS_ERR checking of pmx->pctlDevendra Naga1-2/+2
pinctrl_register returns a pointer of struct type struct pinctrl_dev, if successfully registered to pinctrl subsystem, otherwise returns NULL, and there wont' be any pointers which are not dereferencible. They are not type of pointer addresses but are kind of error codes rather actual addresses, but are a kind of return codes of functions returning integer types. return -ENODEV if device registration fails. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Devendra Naga <devendra.aaru@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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