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2021-09-02pwm: pca9685: Don't check the return code of pwmchip_remove()Uwe Kleine-König1-4/+1
pwmchip_remove() returns always 0. Don't use the value to make it possible to eventually change the function to return void. Also the driver core ignores the return value of pca9685_pwm_remove() and considers the device removed anyhow. So returning early results in a resource leak. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-06-04pwm: pca9685: Add error messages for failed regmap callsClemens Gruber1-24/+59
Regmap operations can fail if the underlying subsystem is not working properly (e.g. hogged I2C bus, etc.) As this is useful information for the user, print an error message if it happens. Let probe fail if the first regmap_read or the first regmap_write fails. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-06-04pwm: pca9685: Restrict period change for enabled PWMsClemens Gruber1-10/+64
Previously, the last used PWM channel could change the global prescale setting, even if other channels are already in use. Fix it by only allowing the first enabled PWM to change the global chip-wide prescale setting. If there is more than one channel in use, the prescale settings resulting from the chosen periods must match. GPIOs do not count as enabled PWMs as they are not using the prescaler and can't change it. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-06-04pwm: pca9685: Support new usage_power setting in PWM stateClemens Gruber1-15/+46
If usage_power is set, the pca9685 driver will phase shift the individual channels relative to their channel number. This improves EMI because the enabled channels no longer turn on at the same time, while still maintaining the configured duty cycle / power output. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-04-23pwm: pca9685: Improve runtime PM behaviorClemens Gruber1-6/+19
The chip does not come out of POR in active state but in sleep state. To be sure (in case the bootloader woke it up) we force it to sleep in probe. If runtime PM is disabled, we instead wake the chip in .probe and put it to sleep in .remove. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-04-23pwm: pca9685: Support hardware readoutClemens Gruber1-0/+36
Implement .get_state to read-out the current hardware state. The hardware readout may return slightly different values than those that were set in apply due to the limited range of possible prescale and counter register values. Also note that although the datasheet mentions 200 Hz as default frequency when using the internal 25 MHz oscillator, the calculated period from the default prescaler register setting of 30 is 5079040ns. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-04-23pwm: pca9685: Switch to atomic APIClemens Gruber1-170/+91
The switch to the atomic API goes hand in hand with a few fixes to previously experienced issues: - The duty cycle is no longer lost after disable/enable (previously the OFF registers were cleared in disable and the user was required to call config to restore the duty cycle settings) - If one sets a period resulting in the same prescale register value, the sleep and write to the register is now skipped - Previously, only the full ON bit was toggled in GPIO mode (and full OFF cleared if set to high), which could result in both full OFF and full ON not being set and on=0, off=0, which is not allowed according to the datasheet - The OFF registers were reset to 0 in probe, which could lead to the forbidden on=0, off=0. Fixed by resetting to POR default (full OFF) Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-03-22pwm: Always allocate PWM chip base ID dynamicallyUwe Kleine-König1-1/+0
Since commit 5e5da1e9fbee ("pwm: ab8500: Explicitly allocate pwm chip base dynamically") all drivers use dynamic ID allocation explicitly. New drivers are supposed to do the same, so remove support for driver specified base IDs and drop all assignments in the low-level drivers. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-09-24pwm: pca9685: Disable unused alternative addressesDavid Jander1-7/+16
The PCA9685 supports listening to 1 or more alternative I2C chip addresses for some special features that this driver does not support. By default the LED ALLCALL address is active (default 0x70), which causes this chip to respond to address 0x70 in addition to its main address (0x41). This is not desireable if there is another device on the same bus that uses this address (like a TMP103 for example). Since this feature is not supported by this driver, it is best to disable these addresses in the chip to avoid unsuspected bus collisions. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-09-24pwm: pca9685: Use BIT() macro instead of shiftDavid Jander1-4/+4
Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-09-24pwm: pca9685: Make comments more consistentDavid Jander1-7/+7
Make all explanatory comments start with an uppercase char. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-04-03pwm: pca9685: Fix PWM/GPIO inter-operationSven Van Asbroeck1-37/+48
This driver allows pwms to be requested as gpios via gpiolib. Obviously, it should not be allowed to request a GPIO when its corresponding PWM is already requested (and vice versa). So it requires some exclusion code. Given that the PWMm and GPIO cores are not synchronized with respect to each other, this exclusion code will also require proper synchronization. Such a mechanism was in place, but was inadvertently removed by Uwe's clean-up in commit e926b12c611c ("pwm: Clear chip_data in pwm_put()"). Upon revisiting the synchronization mechanism, we found that theoretically, it could allow two threads to successfully request conflicting PWMs/GPIOs. Replace with a bitmap which tracks PWMs in-use, plus a mutex. As long as PWM and GPIO's respective request/free functions modify the in-use bitmap while holding the mutex, proper synchronization will be guaranteed. Reported-by: YueHaibing <yuehaibing@huawei.com> Fixes: e926b12c611c ("pwm: Clear chip_data in pwm_put()") Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: YueHaibing <yuehaibing@huawei.com> Link: https://lkml.org/lkml/2019/5/31/963 Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> [cg: Tested on an i.MX6Q board with two NXP PCA9685 chips] Tested-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Sven Van Asbroeck <TheSven73@gmail.com> # cg's rebase Link: https://lore.kernel.org/lkml/20200330160238.GD2817345@ulmo/ Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-03-30pwm: pca9685: Use gpio core provided macro GPIO_LINE_DIRECTION_OUTRishi Gupta1-1/+1
GPIO core recently added macro to uniformly specify direction of a GPIO line, so use it. Signed-off-by: Rishi Gupta <gupt21@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-03-30pwm: pca9685: Replace CONFIG_PM with __maybe_unusedRishi Gupta1-4/+2
The __maybe_unused attribute is preferred over CONFIG_PM to prevent potential build time issues. This commit replaces CONFIG_PM with this attribute. Signed-off-by: Rishi Gupta <gupt21@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-03-30pwm: pca9685: Remove unused duty_cycle struct elementMatthias Schiffer1-4/+0
duty_cycle was only set, never read. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-01-20pwm: Remove set but not set variable 'pwm'yu kuai1-4/+0
Fixes gcc '-Wunused-but-set-variable' warning: drivers/pwm/pwm-pca9685.c: In function ‘pca9685_pwm_gpio_free’: drivers/pwm/pwm-pca9685.c:162:21: warning: variable ‘pwm’ set but not used [-Wunused-but-set-variable] It is never used, and so can be removed. In that case, hold and release the lock 'pca->lock' can be removed since nothing will be done between them. Fixes: e926b12c611c ("pwm: Clear chip_data in pwm_put()") Signed-off-by: yu kuai <yukuai3@huawei.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner1-12/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 503 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-09pwm: Clear chip_data in pwm_put()Uwe Kleine-König1-1/+0
After a PWM is disposed by its user the per chip data becomes invalid. Clear the data in common code instead of the device drivers to get consistent behaviour. Before this patch only three of nine drivers cleaned up here. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-07-25pwm: pca9685: clarify pca9685_set_sleep_mode() interface.Sven Van Asbroeck1-7/+7
The function static void pca9685_set_sleep_mode(struct pca9685 *pca, int sleep) takes the chip in and out of sleep mode, depending on the value of sleep, which is interpreted as a boolean. To clarify that 'int sleep' is a boolean and not a sleep delay, change the function interface to: static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable) Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Sven Van Asbroeck <thesven73@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-13pwm: pca9685: Fix GPIO-only operationSven Van Asbroeck1-33/+79
GPIO-only driver operation never clears the SLEEP bit, which can cause the GPIOs to become unusable. Example: 1. user requests first PWM -> driver clears SLEEP bit 2. user frees last PWM -> driver sets SLEEP bit 3. user requests GPIO 4. user switches GPIO on -> output does not turn on because SLEEP bit is set Prevent this behaviour by letting the runtime PM framework control the SLEEP bit. This will put the chip to SLEEP if no PWMs/GPIOs are exported or in use. Fixes: bccec89f0a35 ("Allow any of the 16 PWMs to be used as a GPIO") Reported-by: Sven Van Asbroeck <TheSven73@googlemail.com> Signed-off-by: Sven Van Asbroeck <TheSven73@googlemail.com> Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-02-10Merge branch 'for-4.11/drivers' into for-nextThierry Reding1-12/+163
2017-01-20pwm: pca9685: Fix period change with same duty cycleClemens Gruber1-11/+0
When first implementing support for changing the output frequency, an optimization was added to continue the PWM after changing the prescaler without having to reprogram the ON and OFF registers for the duty cycle, in case the duty cycle stayed the same. This was flawed, because we compared the absolute value of the duty cycle in nanoseconds instead of the ratio to the period. Fix the problem by removing the shortcut. Fixes: 01ec8472009c9 ("pwm-pca9685: Support changing the output frequency") Cc: <stable@vger.kernel.org> # v4.3+ Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-01-19pwm: pca9685: Allow any of the 16 PWMs to be used as a GPIOMika Westerberg1-1/+163
The PCA9685 controller has full on/off bit for each PWM channel. Setting this bit bypasses the PWM control and the line works just as it would be a GPIO. Furthermore in Intel Galileo it is actually used as GPIO output for discreet muxes on the board. This patch adds GPIO output only support for the driver so that we can control the muxes on Galileo using standard GPIO interfaces available in the kernel. GPIO and PWM functionality is exclusive so only one can be active at a time on a single PWM channel. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-01-04pwm: Remove .can_sleep from struct pwm_chipThierry Reding1-1/+0
All PWM devices have been marked as "might sleep" since v4.5, there is no longer a need to differentiate on a per-chip basis. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06pwm-pca9685: enable ACPI device found on Galileo Gen2Andy Shevchenko1-4/+16
There is a chip connected to i2c bus on Intel Galileo Gen2 board. Enable it via ACPI ID INT3492. Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm-pca9685: Support changing the output frequencyClemens Gruber1-1/+64
Previously, period_ns and duty_ns were only used to determine the ratio of ON and OFF time, the default frequency of 200 Hz was never changed. The PCA9685 however is capable of changing the PWM output frequency, which is expected when changing the period. This patch configures the prescaler accordingly, using the formula and notes provided in the PCA9685 datasheet. Bounds checking for the minimum and maximum frequencies, last updated in revision v.4 of said datasheet, is also added. The prescaler is only touched if the period changed, because we have to put the chip into sleep mode to unlock the prescale register. If it is changed, the PWM output frequency changes for all outputs, because there is one prescaler per chip. This is documented in the PCA9685 datasheet and in the comments. If the duty cycle is not changed at the same time as the period, then we restart the PWM output using the duty cycle to period ratio from before the period change. When using LEDs for example, previously set brightness levels stay the same when the frequency changes. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm-pca9685: Fix several driver bugsClemens Gruber1-0/+24
Problems: - When duty_ns == period_ns, the full OFF bit was not cleared and the PWM output of the PCA9685 stayed off. - When duty_ns == period_ns and the catch-all channel was used, the ALL_LED_OFF_L register was not cleared. - The full ON bit was not cleared when setting the OFF time, therefore the exact OFF time was ignored when setting a duty_ns < period_ns Solution: Clear both OFF registers when setting full ON and clear the full ON bit when changing the OFF registers. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm: pca9685: Drop owner assignmentKrzysztof Kozlowski1-1/+0
i2c_driver does not need to set an owner because i2c_register_driver() will set it. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-03-11pwm: pca9685: Constify struct regmap_configKrzysztof Kozlowski1-1/+1
The regmap_config struct may be const because it is not modified by the driver and regmap_init() accepts pointer to const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-26pwm: pca9685: Fix wrong argument to set MODE1_SLEEP bitAxel Lin1-2/+3
Current code actually does not set MODE1_SLEEP bit because the new value for bitmask (0x1) is wrong. To set MODE1_SLEEP bit, we should pass MODE1_SLEEP as the new value for bitmask. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-12pwm: Fill in missing .owner fieldsThierry Reding1-0/+1
Some drivers don't set the .owner fields of the struct device_driver or struct pwm_ops, which causes the module usage count to become wrong. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-12pwm: add pca9685 driverSteffen Trumtrar1-0/+298
Add pwm driver for the NXP pca9685 16 channel pwm-led controller. The driver is really barebones at this stage. E.g. the OE' pin and therefore the corresponding registers are not supported. The driver was tested on a HW where this pin is tied to GND. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> [thierry.reding@gmail.com: style and whitespace cleanups] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>