Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-02-18 | clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static | Wei Yongjun | 1 | -1/+1 |
2019-02-15 | soc: qcom: llcc-slice: Fix typos | Andy Gross | 1 | -2/+2 |
2019-02-12 | qcom: soc: llcc-slice: Consolidate some code | Jordan Crouse | 1 | -22/+20 |
2019-02-12 | qcom: soc: llcc-slice: Clear the global drv_data pointer on error | Jordan Crouse | 3 | -17/+66 |
2019-02-12 | drivers: soc: xilinx: Add ZynqMP power domain driver | Jolly Shah | 5 | -0/+347 |
2019-02-12 | firmware: xilinx: Add APIs to control node status/power | Rajan Vaja | 2 | -0/+84 |
2019-02-12 | dt-bindings: power: Add ZynqMP power domain bindings | Rajan Vaja | 2 | -0/+73 |
2019-02-12 | drivers: soc: xilinx: Add ZynqMP PM driver | Rajan Vaja | 3 | -0/+190 |
2019-02-12 | firmware: xilinx: Implement ZynqMP power management APIs | Jolly Shah | 2 | -0/+49 |