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QE has module to support TDM, some other protocols
supported by QE are based on TDM.
add a qe-tdm lib, this lib provides functions to the protocols
using TDM to configurate QE-TDM.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Add tdm clock configuration in both qe clock system and ucc
fast controller.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Rx_sync and tx_sync are used by QE-TDM mode,
add them to struct ucc_fast_info.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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On ARM64, the mtk-pmic-wrap driver causes a harmless warning:
mtk-pmic-wrap.c:1062:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
mtk-pmic-wrap.c:1074:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
mtk-pmic-wrap.c:1086:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
.int_en_all = ~(BIT(31) | BIT(1)),
The problem is that the result of the BIT() macro is an 'unsigned long',
so taking the bitwise NOT operation of that results in an integer
with the upper 32 bits all set and that cannot be assigned to a
'u32' variable without loss of information.
This is harmless because we were never interested in the upper bits
here anyway, so we can shut up the warning by adding a simple cast
to 'u32'.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons.
For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to get
done.
Finally, reset controller handling as always gets merged through here
as well"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
arm-ccn: Enable building as module
soc/tegra: pmc: Add generic PM domain support
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
drivers: firmware: psci: make two helper functions inline
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
...
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Pull ARM DT updates from Arnd Bergmann:
"These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as
well, and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and the
Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition" is
added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are
supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported,
which in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet
Processor", following the IPQ806x that is used in many high-end WiFi
routers. This one integrates two ath10k wifi radios that were
previously on separate chips.
Other boards that got added for existing chips are:
Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX
Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
Rockchips platform:
- mqmaker MiQi single-board computer
Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board
computers
Across many platforms, bug fixes went in to address warnings that dtc
now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti
Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits)
ARM: dts: tango4: Import watchdog node
ARM: dts: tango4: Update cpus node for cpufreq
ARM: dts: tango4: Update DT to match clk driver
ARM: dts: tango4: Initial thermal support
arm/dst: Add Aspeed ast2500 device tree
arm/dts: Add Aspeed ast2400 device tree
ARM: sun7i: dt: Add pll3 and pll7 clocks
ARM: dts: sunxi: Add a olinuxino-lime2-emmc
ARM: dts: at91: sama5d4: add trng node
ARM: dts: at91: sama5d3: add trng node
ARM: dts: at91: sama5d2: add trng node
ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
ARM: sun4i: dt: Add pll3 and pll7 clocks
ARM: sun5i: chip: Enable the TV Encoder
ARM: sun5i: r8: Add display blocks to the DTSI
ARM: sun5i: a13: Add display and TCON clocks
ARM: dts: ux500: configure the accelerometers open drain
ARM: mx5: dts: Enable USB OTG on M53EVK
ARM: dts: imx6ul-14x14-evk: Add audio support
ARM: dts: imx6qdl: Remove unneeded unit-addresses
...
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Pull ARM SoC cleanups and fixes from Arnd Bergmann:
"Traditionally we've had two separate branches for cleanups and
non-critical bug fixes, but both of these got smaller with each
release and the differences are rather unclear now, so it seems more
appropriate to have a combined branch.
The most notable change is for OMAP, which gets a small rework to
simplify handling of the AUXDATA mechanism used on machines that are
not completely DT based yet, along with other work that is used as
preparation for dropping the legacy board files"
* tag 'armsoc-cleanups-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: exynos: Add interrupt line to MAX8997 PMIC on exynos4210-trats
ARM: dts: exynos: Fix regulator name to avoid forbidden character on exynos4210-trats
ARM: dts: exynos: Add MFC memory banks for Peach boards
ARM: OMAP2+: n900 needs MMC slot names for legacy user space
ARM: OMAP2+: Add more functions to pwm pdata for ir-rx51
ARM: debug: remove extraneous DEBUG_HI3716_UART option
ARM: OMAP2+: Simplify auxdata by using the generic match
of/platform: Allow secondary compatible match in of_dev_lookup
ARM: davinci: use IRQCHIP_DECLARE for cp_intc
ARM: davinci: remove unused DA8XX_NUM_UARTS
ARM: davinci: simplify call to of populate
ARM: DaVinci USB: removed deprecated properties from MUSB config
ARM: rockchip: Fix use of plain integer as NULL pointer
ARM: realview: hide unused 'pmu_device' object
soc: versatile: dynamically detect RealView HBI numbers
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Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for kernel cycle v4.7:
Core infrastructural changes:
- Support for natively single-ended GPIO driver stages.
This means that if the hardware has registers to configure open
drain or open source configuration, we use that rather than (as we
did before) try to emulate it by switching the line to an input to
get high impedance.
This is also documented throughly in Documentation/gpio/driver.txt
for those of you who did not understand one word of what I just
wrote.
- Start to do away with the unnecessarily complex and unitelligible
ARCH_REQUIRE_GPIOLIB and ARCH_WANT_OPTIONAL_GPIOLIB, another
evolutional artifact from the time when the GPIO subsystem was
unmaintained.
Archs can now just select GPIOLIB and be done with it, cleanups to
arches will trickle in for the next kernel. Some minor archs ACKed
the changes immediately so these are included in this pull request.
- Advancing the use of the data pointer inside the GPIO device for
storing driver data by switching the PowerPC, Super-H Unicore and
a few other subarches or subsystem drivers in ALSA SoC, Input,
serial, SSB, staging etc to use it.
- The initialization now reads the input/output state of the GPIO
lines, so that each GPIO descriptor knows - if this callback is
implemented - whether the line is input or output. This also
reflects nicely in userspace "lsgpio".
- It is now possible to name GPIO producer names, line names, from
the device tree. (Platform data has been supported for a while).
I bet we will get a similar mechanism for ACPI one of those days.
This makes is possible to get sensible producer names for e.g.
GPIO rails in "lsgpio" in userspace.
New drivers:
- New driver for the Loongson1.
- The XLP driver now supports Broadcom Vulcan ARM64.
- The IT87 driver now supports IT8620 and IT8628.
- The PCA953X driver now supports Galileo Gen2.
Driver improvements:
- MCP23S08 was switched to use the gpiolib irqchip helpers and now
also suppors level-triggered interrupts.
- 74x164 and RCAR now supports the .set_multiple() callback
- AMDPT was converted to use generic GPIO.
- TC3589x, TPS65218, SX150X, F7188X, MENZ127, VX855, WM831X, WM8994
support the new single ended callback for open drain and in some
cases open source.
- Implement the .get_direction() callback for a few more drivers like
PL061, Xgene.
Cleanups:
- Paul Gortmaker combed through the drivers and de-modularized those
who are not really modules.
- Move the GPIO poweroff DT bindings to the power subdir where they
belong.
- Rename gpio-generic.c to gpio-mmio.c, which is much more to the
point. That's what it is handling, nothing more, nothing less"
* tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (126 commits)
MIPS: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
gpio: zevio: make it explicitly non-modular
gpio: timberdale: make it explicitly non-modular
gpio: stmpe: make it explicitly non-modular
gpio: sodaville: make it explicitly non-modular
pinctrl: sh-pfc: Let gpio_chip.to_irq() return zero on error
gpio: dwapb: Add ACPI device ID for DWAPB GPIO controller on X-Gene platforms
gpio: dt-bindings: add wd,mbl-gpio bindings
gpio: of: make it possible to name GPIO lines
gpio: make gpiod_to_irq() return negative for NO_IRQ
gpio: xgene: implement .get_direction()
gpio: xgene: Enable ACPI support for X-Gene GFC GPIO driver
gpio: tegra: Implement gpio_get_direction callback
gpio: set up initial state from .get_direction()
gpio: rename gpio-generic.c into gpio-mmio.c
gpio: generic: fix GPIO_GENERIC_PLATFORM is set to module case
gpio: dwapb: add gpio-signaled acpi event support
gpio: dwapb: convert device node to fwnode
gpio: dwapb: remove name from dwapb_port_property
gpio/qoriq: select IRQ_DOMAIN
...
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Pull networking updates from David Miller:
"Highlights:
1) Support SPI based w5100 devices, from Akinobu Mita.
2) Partial Segmentation Offload, from Alexander Duyck.
3) Add GMAC4 support to stmmac driver, from Alexandre TORGUE.
4) Allow cls_flower stats offload, from Amir Vadai.
5) Implement bpf blinding, from Daniel Borkmann.
6) Optimize _ASYNC_ bit twiddling on sockets, unless the socket is
actually using FASYNC these atomics are superfluous. From Eric
Dumazet.
7) Run TCP more preemptibly, also from Eric Dumazet.
8) Support LED blinking, EEPROM dumps, and rxvlan offloading in mlx5e
driver, from Gal Pressman.
9) Allow creating ppp devices via rtnetlink, from Guillaume Nault.
10) Improve BPF usage documentation, from Jesper Dangaard Brouer.
11) Support tunneling offloads in qed, from Manish Chopra.
12) aRFS offloading in mlx5e, from Maor Gottlieb.
13) Add RFS and RPS support to SCTP protocol, from Marcelo Ricardo
Leitner.
14) Add MSG_EOR support to TCP, this allows controlling packet
coalescing on application record boundaries for more accurate
socket timestamp sampling. From Martin KaFai Lau.
15) Fix alignment of 64-bit netlink attributes across the board, from
Nicolas Dichtel.
16) Per-vlan stats in bridging, from Nikolay Aleksandrov.
17) Several conversions of drivers to ethtool ksettings, from Philippe
Reynes.
18) Checksum neutral ILA in ipv6, from Tom Herbert.
19) Factorize all of the various marvell dsa drivers into one, from
Vivien Didelot
20) Add VF support to qed driver, from Yuval Mintz"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1649 commits)
Revert "phy dp83867: Fix compilation with CONFIG_OF_MDIO=m"
Revert "phy dp83867: Make rgmii parameters optional"
r8169: default to 64-bit DMA on recent PCIe chips
phy dp83867: Make rgmii parameters optional
phy dp83867: Fix compilation with CONFIG_OF_MDIO=m
bpf: arm64: remove callee-save registers use for tmp registers
asix: Fix offset calculation in asix_rx_fixup() causing slow transmissions
switchdev: pass pointer to fib_info instead of copy
net_sched: close another race condition in tcf_mirred_release()
tipc: fix nametable publication field in nl compat
drivers: net: Don't print unpopulated net_device name
qed: add support for dcbx.
ravb: Add missing free_irq() calls to ravb_close()
qed: Remove a stray tab
net: ethernet: fec-mpc52xx: use phy_ethtool_{get|set}_link_ksettings
net: ethernet: fec-mpc52xx: use phydev from struct net_device
bpf, doc: fix typo on bpf_asm descriptions
stmmac: hardware TX COE doesn't work when force_thresh_dma_mode is set
net: ethernet: fs-enet: use phy_ethtool_{get|set}_link_ksettings
net: ethernet: fs-enet: use phydev from struct net_device
...
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* pm-cpuidle:
cpuidle: Replace ktime_get() with local_clock()
drivers: firmware: psci: use const and __initconst for psci_cpuidle_ops
soc: qcom: spm: Use const and __initconst for qcom_cpuidle_ops
ARM: cpuidle: constify return value of arm_cpuidle_get_ops()
ARM: cpuidle: add const qualifier to cpuidle_ops member in structures
intel_idle: add BXT support
cpuidle: Indicate when a device has been unregistered
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This merges the Qualcomm SOC tree with the net-next, solving the
merge conflict in the SMD API between the two.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Merge "ARM: mediatek soc updates for v4.7" from Matthias Brugger:
- re-organize pmic wrapper code for easier and cleaner addiont of new SoCs and pmic wrappers
- add support for pmic wrapper mt6323
- add support for SoC mt2701
- enable gpt6 arch timer on mt7623
* tag 'v4.6-next-soc' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: enable gpt6 on boot up to make arch timer work on mt7623
soc: mediatek: PMIC wrap: add MT2701/7623 support
soc: mediatek: PMIC wrap: add mt6323 slave support
soc: mediatek: PMIC wrap: add a slave specific struct
soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()
soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type struct
soc: mediatek: PMIC wrap: SPI_WRITE needs a different bitmask for MT2701/7623
soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623
soc: mediatek: PMIC wrap: split SoC specific init into callback
soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clock
soc: mediatek: PMIC wrap: don't duplicate the wrapper data
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Merge "soc/tegra: Add generic PM domain support" from Thierry Reding:
Implements generic PM domain support on top of the existing Tegra power-
gate API. Drivers are thus allowed to move away from the Tegra-specific
API and towards using generic power domains directly.
* tag 'tegra-for-4.7-genpd' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Add generic PM domain support
dt-bindings: Add power domain info for NVIDIA PMC
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Merge "Rockchip driver updates for v4.7 - part2" from Heiko Stübner:
Ability to save and restore the power-domain quality of service
settings that get lost and reset on power-domain power cycles.
* tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: support qos save and restore
dt-bindings: modify document of Rockchip power domains
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Adds generic PM domain support to the PMC driver where the PM domains
are populated from device-tree and the PM domain consumer devices are
bound to their relevant PM domains via device-tree as well.
Update the tegra_powergate_sequence_power_up() API so that internally
it calls the same tegra_powergate_xxx functions that are used by the
Tegra generic PM domain code for consistency.
To ensure that the Tegra power domains (a.k.a. powergates) cannot be
controlled via both the legacy tegra_powergate_xxx functions as well
as the generic PM domain framework, add a bit map for available
powergates that can be controlled via the legacy powergate functions.
Move the majority of the tegra_powergate_remove_clamping() function
to a sub-function, so that this can be used by both the legacy and
generic power domain code.
This is based upon work by Thierry Reding <treding@nvidia.com>
and Vince Hsu <vinceh@nvidia.com>.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Merge "Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.7" from Simon Horman:
Introduce a DT-based driver for the R-Car System Controller, as found on
Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
* tag 'renesas-rcar-sysc2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits)
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
soc: renesas: rcar-sysc: Add support for R-Car H1 power areas
soc: renesas: rcar-sysc: Enable Clock Domain for I/O devices
soc: renesas: rcar-sysc: Make rcar_sysc_power_is_off() static
soc: renesas: rcar-sysc: Add DT support for SYSC PM domains
soc: renesas: rcar-sysc: Improve rcar_sysc_power() debug info
soc: renesas: Move pm-rcar to drivers/soc/renesas/rcar-sysc
clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev()
clk: renesas: mstp: Provide dummy attach/detach_dev callbacks
clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP support
soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7794 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7793 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7791 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7790 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7779 SYSC PM Domain Binding Definitions
...
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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R-Car M2-N is identical to R-Car M2-W w.r.t. power domains, so reuse the
definitions from the latter.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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On R-Car H3, some power areas (e.g. A3VP) contain I/O devices, which are
also part of the CPG/MSSR Clock Domain.
On all R-Car SoCs, devices in the "always-on" PM Domain are part of the
Clock Domain served by the CPG/MSSR or CPG/MSTP driver.
Hook up the CPG/MSTP or CPG/MSSR Clock Domain attach/detach callbacks to
enable power management using module clocks. Which callback to hook up
depends on the presence of device nodes compatible with
"renesas,cpg-mstp-clocks". This clears the path for a future migration
from the CPG/MSTP to the CPG/MSSR driver on R-Car H1 and
Gen2.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Do not leak a ioremap()'d cookie around, unmaping it in case of errors
Fixes: cef4bafcea2c ("soc: brcmstb: add SoC driver to brcmstb")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The newly added code for the SoC bus fails to link if the
bus is not built:
drivers/soc/built-in.o: In function `brcmstb_soc_device_init':
:(.init.text+0x110): undefined reference to `soc_device_register'
This adds a 'select' statement to avoid the error.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: cef4bafcea2c ("soc: brcmstb: add SoC driver to brcmstb")
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
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Merge "Qualcomm ARM Based SoC Updates for v4.7 part 2" from Andy Gross:
* Change SMD callback parameters
* Use writecombine mapping for SMEM
* tag 'qcom-soc-for-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
soc: qcom: smd: Make callback pass channel reference
soc: qcom: smem: Use write-combine remap for SMEM
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Merge "Broadcom ARM-based SoCs drivers changes" from Florian Fainelli:
- Justin adds a soc_dev driver to properly report to user-space the Broadcom
STB SoC family, product and revision
- Florian reworks how the brcmstb_gisb driver dependency is done to enable it
on Broadcom STB MIPS-based SoCs and remove a select in
arch/arm/mach-bcm/Kconfig
* tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux:
bus: brcmstb_gisb: Rework dependencies
soc: brcmstb: add SoC driver to brcmstb
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Merge "soc/tegra: Changes for v4.7-rc1" from Thierry Reding:
This contains a bunch of preparatory patches to the PMC driver which are
a prerequisite to moving the driver to generic power domains.
* tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Update NVIDIA PMC for Tegra
soc/tegra: pmc: Wait for powergate state to change
soc/tegra: pmc: Ensure GPU partition can be toggled on/off by PMC
soc/tegra: pmc: Remove additional check for a valid partition
soc/tegra: pmc: Fix verification of valid partitions
soc/tegra: pmc: Fix testing of powergate state
soc/tegra: pmc: Change powergate and rail IDs to be an unsigned type
soc/tegra: pmc: Protect public functions from potential race conditions
soc/tegra: pmc: Restore base address on probe failure
soc/tegra: pmc: Remove non-existing L2 partition for Tegra124
soc/tegra: pmc: Remove non-existing power partitions for Tegra210
soc/tegra: pmc: Remove debugfs entry on probe failure
soc/tegra: pmc: Fix sparse warning for tegra_pmc_init_tsense_reset()
soc/tegra: pmc: Add missing structure members to kernel-doc
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As of commit b12ff41658171f53 ("ARM: shmobile: r8a7779: Remove legacy PM
Domain remainings"), rcar_sysc_power_is_off() is no longer used from
SoC-specific code.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Populate the SYSC PM domains from DT, based on the presence of a device
node for the System Controller. The actual power area hiearchy, and
features of specific areas are obtained from tables in the C code.
The SYSCIER and SYSCIMR register values are derived from the power areas
present, which will help to get rid of the hardcoded values in R-Car H1
and R-Car Gen2 platform code later.
Initialization is done from an early_initcall(), to make sure the PM
Domains are initialized before secondary CPU bringup.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Print requested power domain state.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Move the pm-rcar driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and its header file to include/linux/soc/renesas/,
so it can be shared between arm32 (R-Car H1 and Gen2) and arm64 (R-Car
Gen3). Rename it to rcar-sysc as it's really a driver for the R-Car
System Controller (SYSC).
Kill the intermediate PM_RCAR config symbol, as it's not user
configurable anymore, and to prepare for SoC-specific make rules.
Add the missing #include <linux/types.h> to rcar-sysc.h, which was
exposed by different include order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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support qos save and restore when power domain on/off.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add the registers, callbacks and data structures required to make the
wrapper work on MT2701 and MT7623.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add support for MT6323 slaves. This PMIC can be found on MT2701 and MT7623
EVB. The only function that we need to touch is pwrap_init_cipher().
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This patch adds a new struct pwrap_slv_type that we use to store the slave
specific data. The patch adds 2 new helper functions to access the dew
registers. The slave type is looked up via the wrappers child node.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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With more SoCs being added the list of helper functions like these would
grow. To mitigate this problem we remove the existing helpers and change
the code to test against the pmic type stored inside the pmic specific
datastructure that our context structure points at. There is one usage of
pwrap_is_mt8135() that is ambiguous as the test should not be dependent on
mt8135, but rather on the existence of a bridge. Add a new element to
pmic_wrapper_type to indicate if a bridge is present and use this where
appropriate.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Different SoCs will use different bitmask for the wdt_src. This patch
defines the bitmask in the pmic_wrapper_type struct. This allows us to
support new SoCs with a different bitmask to the one currently used.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Different SoCs will use different bitmask for the SPI_WRITE command. This
patch defines the bitmask in the pmic_wrapper_type struct. This allows us
to support new SoCs with a different bitmask to the one currently used.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This patch moves the SoC specific wrapper init code into separate callback
to avoid pwrap_init() getting too large. This is done by adding a new
element called init_special to pmic_wrapper_type. Each currently supported
SoC gets its own version of the callback and we copy the code that was
previously inside pwrap_init() to these new callbacks. Finally we point the
2 instances of pmic_wrapper_type at the 2 new functions.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Split init_reg_clock up into SoC specific callbacks. The patch also
reorders the code to avoid the need for callback function prototypes.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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As we add support for more devices struct pmic_wrapper_type will grow and
we do not really want to start duplicating all the elements in
struct pmic_wrapper.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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The qcom_cpuidle_ops structures is not over-written, so add "const"
qualifier and replace __initdata with __initconst.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
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By passing the smd channel reference to the callback, rather than the
smd device, we can open additional smd channels from sub-devices of smd
devices.
Also updates the two smd clients today found in mainline.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Mapping the SMEM region as write combine makes the contiguous writes
in SMD perform better and also allows us to do unaligned read and writes
on ARM64.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Value of soc_dev_attributes:
* family = chip family id
* soc_id = product id
* revision = product revision
Signed-off-by: Justin Chen <justin.chen@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Rockchip soc-specific driver changes containing support for the
rk3399 powerdomains and necessary infrastructure changes to
accomodate them - like supporting nested powerdomains here.
* tag 'v4.7-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: check the existing of regmap
soc: rockchip: power-domain: Modify power domain driver for rk3399
dt-bindings: add binding for rk3399 power domains
dt-bindings: add power-domain header for RK3399 SoCs
soc: rockchip: power-domain: add support for sub-power domains
soc: rockchip: power-domain: allow domains only handling idle requests
soc: rockchip: power-domain: make idle handling optional
Signed-off-by: Olof Johansson <olof@lixom.net>
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This reverts commit cc8ed76938b5cf6a54ab3d60edabaf808dc960d1
("soc: mediatek: SCPSYS: Fix double enabling of regulators") [1].
This patch fixes mt8173-evb failing boot issue. With commit [1],
genpd state will not sync to real power domain state. So some
resources such as clocks and regulators may stay in a wrong state.
There is no regulator double enabling issue on mainline kernel, so
we can refert commit [1] safely.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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These two are both ARMv7 SoCs. They need not explicitly select
ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7.
Refer to commit a092f2b15399 ("ARM: 7291/1: cache: assume 64-byte L1
cachelines for ARMv7 CPUs").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Zhao Qiang
Arnd Bergmann
Linus Torvalds
Rafael J. Wysocki
Bjorn Andersson
Jon Hunter
Geert Uytterhoeven
Florian Fainelli
Elaine Zhang
John Crispin
Jisheng Zhang
Justin Chen
Olof Johansson
James Liao
Masahiro Yamada