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path: root/drivers/spi/spi-fsl-lpspi.c (follow)
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2018-12-13spi: lpspi: Let watermark change with send data lengthClark Wang1-2/+9
Configure watermark to change with the length of the sent data. Support LPSPI sending message shorter than tx/rxfifosize. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-13spi: lpspi: Add slave mode supportClark Wang1-28/+79
Add slave mode support to the fsl-lpspi driver, only in PIO mode. For now, there are some limitations for slave mode transmission: 1. The stale data in RXFIFO will be dropped when the Slave does any new transfer. 2. One transfer can be finished only after all transfer->len data been transferred to master device 3. Slave device only accepts transfer->len data. Any data longer than this from master device will be dropped. Any data shorter than this from master will cause LPSPI to stuck due to mentioned limitation 2. 4. Only PIO transfer is supported in Slave Mode. Wire connection: GND, SCK, MISO(to MISO of slave), MOSI(to MOSI of slave), SCS Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-13spi: lpspi: Replace all "master" with "controller"Clark Wang1-38/+46
In order to enable the slave mode and make the code more readable, replace all related structure names and object names which is named "master" with "controller". Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-10spi: fsl-lpspi: Prevent FIFO under/overrun by defaultHieu Tran Dang1-1/+1
Certain devices don't work well when a transmit FIFO underrun or receive FIFO overrun occurs. Example is the SAF400x radio chip when running at high speed which leads to garbage being sent to/received from the chip. In which case, it should stall waiting for further data to be available before proceeding. This patch unset the NOSTALL bit in CFGR1 by default to prevent this issue. Signed-off-by: Hieu Tran Dang <dangtranhieu2012@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-05-03spi: lpspi: Switch to SPDX identifierFabio Estevam1-16/+5
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-01-09spi: fsl-lpspi: fix indentation errorGao Pan1-3/+3
This patch fixes the indentation error in spi-fsl-lpspi.c. Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-14spi: fsl-lpspi: Pre-initialize ret in fsl_lpspi_transfer_one_msg()Geert Uytterhoeven1-1/+1
With gcc 4.1.2: drivers/spi/spi-fsl-lpspi.c: In function ‘fsl_lpspi_transfer_one_msg’: drivers/spi/spi-fsl-lpspi.c:369: warning: ‘ret’ may be used uninitialized in this function If the message contains no transfers, the function will set the message's status to an uninitialized value, and will return that uninitialized value. While __spi_validate() should have been called in all paths leading to this, and thus have rejected such messages, we better pre-initialize ret to be safe for future modifications (spi_transfer_one_message() also does this). Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-05spi: fsl-lpspi: quit reading rx fifo under error conditionGao Pan1-1/+4
In case that error occurs during waiting for txfifo empty, it is not necessary to read rx fifo. It's better to return directly. Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-05spi: fsl-lpspi: use GPL as module licenseGao Pan1-1/+1
At the beginning of lpspi driver, it is claimed that the dirver is under the terms of the GNU General Public License, either version 2 of the License. While at the end I only declared GPL V2. This patch make the license consistent. Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-30spi: fsl-lpspi: read lpspi tx/rx fifo size in probe()Gao Pan1-7/+14
The lpspi tx/rx fifo size is a read only parameter resides lpspi Parameter Register. It's better to read lpspi tx/rx fifo size in probe(). Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-30spi: fsl-lpspi: use wait_for_completion_timeout() while waiting transfer doneGao Pan1-1/+6
It's a potential problem to use wait_for_completion() because the completion condition may never come. Thus, it's better to repalce wait_for_completion() with wait_for_completion_timeout(). Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-25spi: imx: replace schedule() with cond_resched()Gao Pan1-1/+1
It's more rational that just do the schedule when necessary other than do it every time. Thus, it's better to replace schedule() with cond_resched() in fsl_lpspi_txfifo_empty(), which contributes to saving cpu time. Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-25spi: imx: fix potential shift truncationGao Pan1-1/+1
There is a static checker warning in fsl_lpspi_set_cmd(). I intended to write "temp |= (fsl_lpspi->config.mode & 0x3) << 30", but used "temp |= (fsl_lpspi->config.mode & 0x11) << 30" by mistake. This patch fixes this potential shift truncation. Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-25spi: imx: use prepare_transfer_hardware() for lpspiGao Pan1-6/+4
The old driver enable clk in fsl_lpspi_prepare_message() and disable clk in fsl_lpspi_unprepare_message(). Rather than doing this per message it's a bit better to do it in prepare_transfer_hardware(), that way if there's a sequence of messages queued one after another we don't turn the clock on and off all the time. Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-22spi: imx: add lpspi bus driverGao Pan1-0/+512
This patch adds lpspi driver to support new i.MX products which use lpspi instead of ecspi. The lpspi can continue operating in stop mode when an appropriate clock is available. It is also designed for low CPU overhead with DMA offloading of FIFO register accesses. Signed-off-by: Gao Pan <pandy.gao@nxp.com> Reviewed-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>