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path: root/drivers/spi
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2014-02-23spi: core: Replace msleep with usleep_range to get more accurate sleep timeAxel Lin1-1/+1
Fixes below checkpatch warning: WARNING: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt + msleep(10); Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: fsl-spi: Convert to let spi core validate xfer->bits_per_wordAxel Lin1-6/+4
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. fsl_spi_grlib_probe() may update mpc8xxx_spi->max_bits_per_word setting. So set master->bits_per_word_mask after fsl_spi_grlib_probe(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: xilinx: Convert to let spi core validate bits_per_wordAxel Lin1-16/+2
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. spi_bitbang requires custom setup_transfer() to be defined if there is a custom txrx_bufs(). Thus keep the empty xilinx_spi_setup_transfer() function in the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: Use list_last_entry at appropriate placesAxel Lin3-7/+4
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: sh-hspi: Convert to let spi core validate bits_per_wordAxel Lin1-16/+2
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: qup: Convert ot let spi core handle checking transfer speedAxel Lin1-14/+1
Set master->max_speed_hz then spi core will handle checking transfer speed. So we can remove the same checking in this driver. Also remove checking spi->chip_select in spi_qup_setup(), the checking is done by spi core. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: qup: Remove spi_master_put in spi_qup_removeAxel Lin1-1/+0
This driver uses devm_spi_register_master() so don't explicitly call spi_master_put() in spi_qup_remove(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: rspi: Fix loopback mode for Dual/Quad SPI TransfersGeert Uytterhoeven1-1/+3
While normal Dual and Quad SPI Transfers are unidirectional, we must do a bidirectional transfer if loopback mode is enabled, else rx_buf is not filled. With spidev it seemed to work, as spidev uses the same buffer for tranmission and reception. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: rspi: Remove empty rspi_cleanup()Geert Uytterhoeven1-5/+0
If spi_master.cleanup() is not needed, it can be left unimplemented. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: sunxi: Add Allwinner A10 SPI controller driverMaxime Ripard3-0/+484
The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI controller. Unfortunately, this SPI controller, even though quite similar, is significantly different from the recently supported A31 SPI controller (different registers offset, split/merged registers, etc.). Supporting both controllers in a single driver would be unreasonable, hence the addition of a new driver. Like its more recent counterpart, it supports DMA, but the driver only does PIO until we have a dmaengine driver for this platform. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi/imx: Use dev_name() for request_irq() to distinguish SPIsAlexander Shiyan1-1/+1
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi/imx: Drop default setting for SPI_IMXFabio Estevam1-1/+0
SPI_IMX is selected by imx_v6_v7_defconfig/imx_v4_v5_defconfig and we don't need to have a default setting which depends on the IMX_HAVE_PLATFORM_SPI_IMX symbol. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Use the core cs_gpio field, and make it optionalGeert Uytterhoeven1-3/+18
In current implementation, CS is controlled by GPIO, which is passed through spi->controller_data. However, the MSIOF HW module has a function to output CS by itself, which is already enabled and actual switch will be done by pinmux. Store the GPIO number in the core cs_gpio field, and ignore it if it is an invalid (negative) GPIO number. Loosely based on a patch from Takashi Yoshii <takasi-y@ops.dti.ne.jp>. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Add more register documentationGeert Uytterhoeven1-50/+98
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Change hz from unsigned long to u32Geert Uytterhoeven1-5/+3
Both spi_transfer.speed_hz and spi_master.max_speed_hz are u32 Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Typo in comment s/tx/rx/Geert Uytterhoeven1-1/+1
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Fix SPI bus population from DTGeert Uytterhoeven1-0/+1
DT doesn't instantiate SPI children if spi_master.dev.of_node is not set up properly. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: core: Validate length of the transfers in messageIvan T. Ivanov1-0/+17
SPI transfer length should be multiple of SPI word size, where SPI word size should be power-of-two multiple Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-20spi: clps711x: Refactor to use core message parsingAxel Lin1-52/+30
Convert to use default implementation of transfer_one_message() which provides standard handling of delays and chip select management. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-20spi: Add Qualcomm QUP SPI controller supportIvan T. Ivanov3-0/+851
Qualcomm Universal Peripheral (QUP) core is an AHB slave that provides a common data path (an output FIFO and an input FIFO) for serial peripheral interface (SPI) mini-core. SPI in master mode supports up to 50MHz, up to four chip selects, programmable data path from 4 bits to 32 bits and numerous protocol variants. Cc: Alok Chauhan <alokc@codeaurora.org> Cc: Gilad Avidov <gavidov@codeaurora.org> Cc: Kiran Gunda <kgunda@codeaurora.org> Cc: Sagar Dharia <sdharia@codeaurora.org> Cc: dsneddon@codeaurora.org Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi/topcliff-pch: Fix DMA channelAlexander Stein1-2/+2
bus_num might be asigned dynamically to e.g. 32766. In this case the calculated DMA channel based on SPI bus number is bogus. Use SPI channel number instead for calculation. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi/topcliff-pch: Fix debug messageAlexander Stein1-2/+1
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi: omap2-mcspi: Convert to let spi core validate transfer speedAxel Lin1-8/+3
Set master->max_speed_hz and master->min_speed_hz then spi core will handle checking transfer speed. So we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi: omap2-mcspi: Remove list_empty checking in omap2_mcspi_transfer_one_messageAxel Lin1-3/+0
This checking is done in __spi_validate(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-18spi: mpc512x-psc: Remove redundant code to get bus_num from DTAxel Lin1-14/+2
For DT case, spi core will call of_alias_get_id() and set master->bus_num if it was not set. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi: Remove explictly set bus_num and num_chipselect to default settingAxel Lin9-14/+0
The purpose of commit 1e8a52e18cfb "spi: By default setup spi_masters with 1 chipselect and dynamics bus number" is to avoid setting default value for bus_num and num_chipselect in spi master drivers. So let's remove the duplicate code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-By: David Daney <david.daney@cavium.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi/fsl-dspi: Remove some coding sytle not in standardChao Fu1-4/+4
Remove some coding sytle not in standard in former code. Signed-off-by: Chao Fu <b44548@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi/fsl-dspi: Convert to use regmap and add big-endian supportChao Fu2-27/+54
Freescale DSPI module will have two endianess in different platform, but ARM is little endian. So when DSPI in big endian, core in little endian, readl and writel can not adjust R/W register in this condition. This patch will remove general readl/writel, and import regmap mechanism. Data endian will be transfered in regmap APIs. Documents: dspi add bool "big-endian" in dts node if DSPI module work in big endian. Signed-off-by: Chao Fu <b44548@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi: sun6i: Fix define for SUN6I_TFR_CTL_CS_MASKAxel Lin1-2/+2
Current code in sun6i_spi_set_cs() actually clears CPHA and CPOL bits which is obvious wrong. The define for SUN6I_TFR_CTL_CS_MASK is wrong. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: spi-imx: Propagate the real error code on platform_get_irq() failureFabio Estevam1-1/+1
No need to return a 'fake' return value on platform_get_irq() failure. Just return the error code itself instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: spi-mxs: Propagate the real error code on platform_get_irq() failureFabio Estevam1-1/+1
No need to return a 'fake' return value on platform_get_irq() failure. Just return the error code itself instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: au1550: Convert to let spi core handle checking transfer speedAxel Lin1-26/+4
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle checking transfer speed. So we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: topcliff-pch: Convert to use master->max_speed_hzAxel Lin1-36/+1
Set "master->max_speed_hz = PCH_MAX_BAUDRATE" then we can remove pch_spi_setup. In additional, pspi->max_speed_hz will never be 0 because it's default value will be set to master->max_speed_hz. Also remove list_empty checking in pch_spi_transfer() because the checking is done by spi core. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: bfin5xx: Remove unused last_transfer pointer in bfin_spi_giveback()Axel Lin1-4/+0
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: ep93xx: Convert to let spi core handle checking transfer speedAxel Lin1-16/+5
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle checking transfer speed. So we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: nuc900: Remove unused fields from struct nuc900_spiAxel Lin1-6/+3
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: bfin5xx: Remove duplicate code to check spi->modeAxel Lin1-4/+0
This checking is already done in the implementation of spi_setup(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: s3c24xx: Convert to let spi core validate bits_per_wordAxel Lin1-10/+1
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: Clean up probe and remove functionsJean Delvare1-7/+5
While backporting 33cf00e5 ("spi: attach/detach SPI device to the ACPI power domain"), I noticed that the code changes were suboptimal: * Why use &spi->dev when we have dev at hand? * After fixing the above, spi is used only once, so we don't really need a local variable for it. This results in the following clean-up. Signed-off-by: Jean Delvare <jdelvare@suse.de> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-12spi: Make max_tx and max_rx the same typeMark Brown1-1/+1
Prevents spurious compiler warnings. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-12spi: Remove duplicate code to check chip_selectAxel Lin7-29/+0
In spi_add_device(), we have the code to validate spi->chip_select. So remove the duplicate code in various drivers. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: octeon: Remove unused bits_per_word from struct octeon_spi_setupAxel Lin1-2/+0
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: orion: Convert to let spi core validate xfer->bits_per_wordAxel Lin1-18/+9
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: sc18is602: Move checking chip_select for SC18IS602 to sc18is602_setupAxel Lin1-7/+12
So it will be checked when spi device is added onto the spi bus. spi_add_device() calls spi_setup() which then calls spi->master->setup(). No need to check it every time sc18is602_transfer_one() is called. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11Merge remote-tracking branches 'spi/fix/doc', 'spi/fix/nuc900' and 'spi/fix/rspi' into spi-linusMark Brown2-2/+4
2014-02-11Merge remote-tracking branch 'spi/fix/core' into spi-linusMark Brown1-3/+1
2014-02-11spi: tegra20-slink: Convert to use master->max_speed_hzAxel Lin1-13/+3
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove the duplicate code in tegra_slink_setup. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: tegra20-sflash: Convert to use master->max_speed_hzAxel Lin1-21/+3
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove tegra_sflash_setup(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: tegra114: Convert to use master->max_speed_hzAxel Lin1-16/+3
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove the duplicate code in tegra_spi_setup. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: txx9: Convert to let spi core handle checking transfer speedAxel Lin1-9/+3
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle checking transfer speed. Then we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Mark Brown <broonie@linaro.org>
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