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2014-02-10spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controllerAxel Lin1-0/+3
In __spi_validate(), xfer->speed_hz is set to be spi->max_speed_hz if it is not set for this transfer. However, if spi->max_speed_hz is also not set, xfer->speed_hz is 0. Some drivers (e.g. au1550, tegra114, tegra20-sflash, tegra20-slink, etc.) then use below code to avoid setting xfer->speed_hz to 0. /* Set speed to the spi max fequency if spi device has not set */ spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; Let's handle it in spi core. If spi->max_speed_hz is not set, make it default to spi->master->max_speed_hz. So In __spi_validate() if both xfer->speed_hz and spi->max_speed_hz are not set, xfer->speed_hz will be set to spi->master->max_speed_hz. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: omap2: use SUPERH, not SHPaul Bolle1-1/+1
Commit 0079aae0f1e6 ("spi: omap2: Add build dependencies for writel_relaxed()") added an optional Kconfig dependency on SH. That Kconfig symbol doesn't exist. Apparently SUPERH was intended. Use that. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: Use reinit_completion at appropriate placesAxel Lin4-4/+7
Calling init_completion() once is enough. For the rest of the iterations, call reinit_completion() instead. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: omap-100k: Remove unused fields from struct omap1_spi100kAxel Lin1-7/+0
Both *master and state are not really used, remove them. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: omap-100k: Remove unused pointer in omap1_spi100k_txrx_pio()Christian Engelmayer1-2/+0
Remove unused devdata pointer 'spi100k' in function omap1_spi100k_txrx_pio(). Detected by Coverity: CID 1077869. Signed-off-by: Christian Engelmayer <cengelma@gmx.at> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Michal Nazarewicz <mina86@mina86.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: omap-100k: Remove unused MOD_REG_BIT macroAxel Lin1-7/+0
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi/s3c64xx: Remove code no longer needed as a result of S3C_DMA removalMark Brown1-37/+2
Remove functions that only had an effect when using S3C_DMA and inline dmaengine_terminate_all() since it's pointless to have a function which expands to a single function call. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi/s3c64xx: Remove S3C_DMA supportMark Brown1-191/+0
All the platforms which use the old S3C_DMA API have now been converted to dmaengine so we can remove the legacy code from the driver, simplifying maintenance. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi/s3c64xx: Use core DMA mapping code with dmaengineMark Brown1-75/+103
When using dmaengine allow the core to do the DMA mapping. We still need local mapping code for the non-dmaengine case so this doesn't save us anything for now. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi: Use SPI_BPW_MASK macro at appropriate placesAxel Lin2-2/+4
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi: mxs: Use list_for_each_entry to iterate over transfer listAxel Lin1-2/+2
We don't modify the list entry while iterating the transfer list. So use list_for_each_entry instead of list_for_each_entry_safe. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi: orion: Let spi core handle checking transfer speedAxel Lin1-37/+2
Since commit a2fd4f9fa3b9 'spi: Support transfer speed checking in the core', the SPI core validates the desired speed of a given transfer against the minimum and maximum speeds supported by the controller. So we can remove the same code in this driver and let spi core handle checking the desired speed of a given transfer. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-06spi/sunxi: Add missing dependency on RESET_CONTROLLERMark Brown1-0/+1
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-06spi: orion: Remove unused pointer in orion_spi_write_read()Christian Engelmayer1-2/+0
Remove unused devdata pointer 'orion_spi' in function orion_spi_write_read(). Detected by Coverity: CID 1077860. Signed-off-by: Christian Engelmayer <cengelma@gmx.at> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-06spi: davinci: Use of_match_ptr at appropriate placeAxel Lin1-4/+2
It's pointless to use of_match_ptr within CONFIG_OF guard. Use of_match_ptr around davinci_spi_of_match when setting .of_match_table. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-06spi: davinci: Remove unneeded NULL checking for dspi and dspi->bitbang.masterAxel Lin1-8/+0
spi_master_get_devdata() never returns NULL when spi_alloc_master() success, so remove NULL test for dspi. We have ensured master is not NULL before assigning it to dspi->bitbang.master. So also remove NULL test for dspi->bitbang.master. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-05spi: sunxi: Add Allwinner A31 SPI controller driverMaxime Ripard3-0/+490
The Allwinner A31 has a new SPI controller IP compared to the older Allwinner SoCs. It supports DMA, but the driver only does PIO for now, and DMA will be supported eventually. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: nuc900: Set SPI_LSB_FIRST for master->mode_bits if hw->pdata->lsb is trueAxel Lin1-0/+2
Otherwise, spi_setup() fails with unsupported mode bits message. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org
2014-02-04spi: Make core DMA mapping functions generate scatterlistsMark Brown2-28/+87
We cannot unconditionally use dma_map_single() to map data for use with SPI since transfers may exceed a page and virtual addresses may not be provided with physically contiguous pages. Further, addresses allocated using vmalloc() need to be mapped differently to other addresses. Currently only the MXS driver handles all this, a few drivers do handle the possibility that buffers may not be physically contiguous which is the main potential problem but many don't even do that. Factoring this out into the core will make it easier for drivers to do a good job so if the driver is using the core DMA code then generate a scatterlist instead of mapping to a single address so do that. This code is mainly based on a combination of the existing code in the MXS and PXA2xx drivers. In future we should be able to extend it to allow the core to concatenate adjacent transfers if they are compatible, improving performance. Currently for simplicity clients are not allowed to use the scatterlist when they do DMA mapping, in the future the existing single address mappings will be replaced with use of the scatterlist most likely as part of pre-verifying transfers. This change makes it mandatory to use scatterlists when using the core DMA mapping so update the s3c64xx driver to do this when used with dmaengine. Doing so makes the code more ugly but it is expected that the old s3c-dma code can be removed very soon. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: Provide core support for full duplex devicesMark Brown1-0/+47
It is fairly common for SPI devices to require that one or both transfer directions is always active. Currently drivers open code this in various ways with varying degrees of efficiency. Start factoring this out by providing flags SPI_MASTER_MUST_TX and SPI_MASTER_MUST_RX. These will cause the core to provide buffers for the requested direction if none are specified in the underlying transfer. Currently this is fairly inefficient since we actually allocate a data buffer which may get large, support for mapping transfers using a scatterlist will allow us to avoid this for DMA based transfers. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: rspi: Document support for Renesas QSPI in KconfigGeert Uytterhoeven1-2/+2
As of commit 5ce0ba88650f2606244a761d92e2b725f4ab3583 ("spi: rcar: add Renesas QSPI support on RSPI") the rspi driver handles Renesas QSPI, too, but this was not reflected in the Kconfig help text. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: pl022: Remove redundant pinctrl to default state in probeUlf Hansson1-2/+0
The driver core is now taking care of putting our pins into default state at probe. Thus we can remove the redundant call for it in probe. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: pl022: Simplify clock handlingUlf Hansson1-12/+3
Make use of clk_prepare_enable and clk_disable_unprepare to simplify code. No functional change. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi/s3c64xx: Split wait_for_xfer() into PIO and DMA versionsMark Brown1-76/+88
There is no meaningful code sharing between the PIO and DMA variants (just the timeout calculation) so in order to make the code easier to work with split the two cases. Looking at the code it is not clear how the PIO version works for large transmits, greater than FIFO size is only handled for RX. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi/s3c64xx: Remove unused /CS GPIO managementMark Brown1-29/+0
The GPIO enable and disable is done in the core so does not need to be replicated in the driver, delete the unneeded code. enable_cs() was not referenced at all. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: fsl: Fix problem with multi message transfersStefan Roese1-5/+15
When used via spidev with more than one messages to tranfer via SPI_IOC_MESSAGE the current implementation would return with -EINVAL, since bits_per_word and speed_hz are set in all transfer structs. And in the 2nd loop status will stay at -EINVAL as its not overwritten again via fsl_spi_setup_transfer(). This patch changes this behavious by first checking if one of the messages uses different settings. If this is the case the function will return with -EINVAL. If not, the messages are transferred correctly. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: fix pointer-integer size mismatch warningSeongJae Park1-1/+1
Fix the pointer-integer size mismatch warning below: drivers/spi/spi-gpio.c: In function ‘spi_gpio_setup’: drivers/spi/spi-gpio.c:252:8: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] cs = (unsigned int) spi->controller_data; ^ Signed-off-by: SeongJae Park <sj38.park@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: rspi: Only enable interrupts when there's a need to waitGeert Uytterhoeven1-0/+3
rspi_wait_for_interrupt() unconditionally enables interrupts, even when the wait condition is already satisfied. This causes a high interrupt load (2 interrupts/byte for full-duplex Single SPI transfers, 1 interrupt/byte for RSPI with TX Only mode, or QSPI in unidirectional Dual or Quad Transfer mode). Change this to return immediately when the wait condition is satisfied. This dramatically reduces the interrupt load, especially in high-speed Quad Transfer mode, and increases transfer speed, as no interrupts need to be handled when there's space available in the output FIFO, or data available in the input FIFO. Benchmark results for QSPI on r8a7791 while reading 1 MiB from 30 MHz SPI FLASH on the Koelsch development board: Before: Single SPI Dual SPI Quad SPI Interrupts: 2096856 1048592 1048594 Mbps: 0.9 1.6 1.6 After: Single SPI Dual SPI Quad SPI Interrupts: 1048569 21295 8 Mbps: 0.7 10.8 12.9 I don't know why Single SPI slowed down a bit. I've also verified functionality for RSPI-RZ on r7s72100, but don't have benchmark results as there's no SPI FLASH connected to RSPI on the Genmai development board. Unlike RSPI and QSPI, RSPI-RZ has separate interrupts for RX and TX, which shows that Single SPI transfers now generate (mostly) RX interrupts, as expected. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: omap2-mcspi: Support divide-by-n clock dividersStefan Sørensen1-7/+36
Currently a divide-by-2^n clock is used, causing a very coarse clock selection, i.e. a 10MHz device will need to use a 6MHz clock. The McSPI can also use a divide-by-n clock, this patch adds support for selecting that when possible. Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: omap2-mcspi: Do not configure the controller on each transfer unless neededStefan Sørensen1-2/+5
spi_transfer->speed_hz and spi_transfer->bits_per_word used to only be set when not using the default settings but are not set on every transfer, causing omap2_mcspi_setup_transfer to be called on each transfer. This patch changes the check to only call omap2_mcspi_setup_transfer if the settings needs to be changed. Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: clps711x: Use SPI-core "cs_gpios" property for storing GPIOsAlexander Shiyan1-17/+14
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: clps711x: Add support for 1-8 BPW transfersAlexander Shiyan1-23/+16
This patch adds support for 1 to 8 BPW to driver and removes excess BPW validation since this is already checked by SPI core. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: clps711x: Simplify handling of RX & TX buffersAlexander Shiyan1-10/+7
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: rspi: fix build error when CONFIG_OF is not setShimoda, Yoshihiro1-0/+1
This patch fixes an issue that the following build error happens when the CONFIG_OF is not set: drivers/spi/spi-rspi.c: In function 'rspi_probe': drivers/spi/spi-rspi.c:1203:26: error: 'rspi_of_match' undeclared (first use in this function) Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: Provide core support for DMA mapping transfersMark Brown1-0/+82
The process of DMA mapping buffers for SPI transfers does not vary between devices so in order to save duplication of code in drivers this can be factored out into the core, allowing it to be integrated with the work that is being done on factoring out the common elements from the data path including more sharing of dmaengine code. In order to use this masters need to provide a can_dma() operation and while the hardware is prepared they should ensure that DMA channels are provided in tx_dma and rx_dma. The core will then ensure that the buffers are mapped for DMA prior to calling transfer_one_message(). Currently the cleanup on error is not complete, this needs to be improved. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: Add a timeout when waiting for transfersMark Brown1-1/+11
Don't wait indefinitely for transfers to complete but time out after 10ms more than we expect the transfer to take on the wire. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: tegra114: Use list_is_last() instead of open-codedAxel Lin1-2/+2
For better readability, and then we can remove the comment for last transfer. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: sirf: Avoid duplicate code in various bits_per_word casesAxel Lin1-15/+6
Trivial cleanup to avoid duplicate code in various bits_per_word cases. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: sc18is602: Remove sc18is602_setup() because it is done by spi coreAxel Lin1-9/+0
The checking for spi->mode is done in the implementation of spi_setup(). Calling sc18is602_check_transfer(spi, NULL, 0) is pointless because the code is equivent to checking if spi->max_speed_hz is 0. Note, sc18is602_check_transfer actually allows spi->max_speed_hz is 0 if t->speed_hz is set. So return error in sc18is602_setup() when spi->max_speed_hz is 0 does not make sense. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi/pl022: Unprepare clocks while suspendedMark Brown1-2/+2
When the driver was converted to clk_prepare() the suspend path didn't have any changes made so the clock remains prepared throughout the runtime of the driver. Unprepare it when suspended so that any savings that can be made as a result are made. Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03spi: octeon: Use list_is_last() instead of open-codedAxel Lin1-1/+2
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: delete non-required instances of include <linux/init.h>Paul Gortmaker29-29/+0
None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: dw-mmio: remove HAVE_CLK build dependecyBaruch Siach1-1/+1
Since 93abe8e4 (clk: add non CONFIG_HAVE_CLK routines) code using clk.h like this platform driver needs not depend on HAVE_CLK. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: dw-mmio: allow multiple instancesBaruch Siach1-1/+1
Use the platform_device id to uniquely identify each SPI master instance. Cc: Jean-Hugues Deschenes <jean-hugues.deschenes@octasic.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-30spi: rspi: Add support for Quad and Dual SPI Transfers on QSPIGeert Uytterhoeven1-14/+148
Add support for Quad and Dual SPI Transfers on the Renesas Quad Serial Peripheral Interface, as found in R-Car Gen2 SoCs like R-Car H2 (r8a7790) and R-Car M2 (r8a7791): - Add unidirectional transfer methods for Quad/Dual SPI Transfers. - Program the sequencer to handle SPI messages with multiple transfer modes when Quad or Dual transfers are enabled for an SPI slave. Up to 4 transfer modes per SPI message are supported by the hardware. - Advertise the availability of Quad and Dual SPI modes on QSPI. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-29spi: rspi: Add DT supportGeert Uytterhoeven1-29/+77
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-29Merge remote-tracking branch 'agust/next' into nextBenjamin Herrenschmidt1-8/+18
<< Switch mpc512x to the common clock framework and adapt mpc512x drivers to use the new clock driver. Old PPC_CLOCK code is removed entirely since there are no users any more. >>
2014-01-28spi: Fix crash with double message finalisation on error handlingGeert Uytterhoeven1-3/+1
This reverts commit e120cc0dcf2880a4c5c0a6cb27b655600a1cfa1d. It causes a NULL pointer dereference with drivers using the generic spi_transfer_one_message(), which always calls spi_finalize_current_message(), which zeroes master->cur_msg. Drivers implementing transfer_one_message() theirselves must always call spi_finalize_current_message(), even if the transfer failed: * @transfer_one_message: the subsystem calls the driver to transfer a single * message while queuing transfers that arrive in the meantime. When the * driver is finished with this message, it must call * spi_finalize_current_message() so the subsystem can issue the next * transfer Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-27spi: rspi: Use NULL as the clock IDGeert Uytterhoeven1-3/+1
There's only one RSPI/QSPI clock, so we can use NULL as the clock ID Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-27spi: rspi: Convert to clk_prepare_enable/disable_unprepareGeert Uytterhoeven1-3/+8
Get the driver ready for the migration to the common clock framework by calling clk_prepare_enable() and clk_disable_unprepare(). Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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