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path: root/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c (follow)
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2021-03-10staging: clocking-wizard: Remove the hardcoding of the clock outputsShubhrajyoti Datta1-8/+7
The number of output clocks are configurable in the hardware. Currently the driver registers the maximum number of outputs. Fix the same by registering only the outputs that are there. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/1614172241-17326-8-git-send-email-shubhrajyoti.datta@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-10staging: clocking-wizard: Add support for fractional supportShubhrajyoti Datta1-16/+137
Currently the set rate granularity is to integral divisors. Add support for the fractional divisors. Only the first output0 is fractional in the hardware. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/1614172241-17326-7-git-send-email-shubhrajyoti.datta@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-10staging: clocking-wizard: Add support for dynamic reconfigurationShubhrajyoti Datta1-5/+173
The patch adds support for dynamic reconfiguration of clock output rate. Output clocks are registered as dividers and set rate callback function is used for dynamic reconfiguration. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Co-developed-by: Chirag Parekh <chirag.parekh@xilinx.com> Link: https://lore.kernel.org/r/1614172241-17326-6-git-send-email-shubhrajyoti.datta@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-10staging: clocking-wizard: Allow changing of parent rate for single outputShubhrajyoti Datta1-0/+9
If there is only one output then allow changing of the parent rate. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/1614172241-17326-5-git-send-email-shubhrajyoti.datta@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-10staging: clocking-wizard: Update the fixed factor divisorsShubhrajyoti Datta1-5/+8
Update the fixed factor clock registration to register the divisors. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/1614172241-17326-4-git-send-email-shubhrajyoti.datta@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-10staging: clocking-wizard: Rename speed-grade to xlnx,speed-gradeShubhrajyoti Datta1-1/+1
Rename speed-grade to xlnx,speed-grade Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/1614172241-17326-3-git-send-email-shubhrajyoti.datta@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-10staging: clocking-wizard: Fix kernel-doc warningShubhrajyoti Datta1-1/+2
Fix the clocking wizard main structure kernel documentation. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/1614172241-17326-2-git-send-email-shubhrajyoti.datta@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-10-10staging: clocking-wizard: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-3/+1
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20191009150427.10852-1-yuehaibing@huawei.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-10-09staging: clocking-wizard: match parenthesis indentationIoannis Valasakis1-10/+10
Match parenthesis indentation after line end, and fixed alignment to conform to the coding style guidelines. Reported by checkpatch. Signed-off-by: Ioannis Valasakis <code@wizofe.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-01-15staging: clocking-wizard: remove redundant license textGreg Kroah-Hartman1-12/+0
Now that the SPDX tag is in the clocking-wizard driver files, that identifies the license in a specific and legally-defined manner. So the extra GPL text wording can be removed as it is no longer needed at all. This is done on a quest to remove the 700+ different ways that files in the kernel describe the GPL license text. And there's unneeded stuff like the address (sometimes incorrect) for the FSF which is never needed. No copyright headers or other non-license-description text was removed. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-01-15staging: clocking-wizard: add SPDX identifier.Greg Kroah-Hartman1-0/+1
It's good to have SPDX identifiers in all files to make it easier to audit the kernel tree for correct licenses. Fix up the staging clocking-wizard driver to have a proper SPDX identifier, based on the license text in the file itself. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This work is based on a script and data from Thomas Gleixner, Philippe Ombredanne, and Kate Stewart. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: Philippe Ombredanne <pombredanne@nexb.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-10-25staging: clocking-wizard: Fix incorrect type of speed gradeXavier Roumegue1-1/+1
The speed grade type is unsigned according to the dt-bindings. Fix sparse issue (-Wtypesign): CHECK drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c:162:56: warning: incorrect type in argument 3 (different signedness) drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c:162:56: expected unsigned int [usertype] *out_value drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c:162:56: got int *<noident> Signed-off-by: Xavier Roumegue <xroumegue@gmail.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-07Staging: clocking-wizard: CHECK:Please use a blank lineSirnamSwetha1-0/+1
This patch fixes the checkpatch.pl issue: CHECK: Please use a blank line after function/struct/union/enum declarations Signed-off-by: SirnamSwetha <theonly.ultimate@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-07Staging: clocking-wizard: Avoid CamelCaseSirnamSwetha1-4/+4
This patch fixes the checkpatch.pl issue: CHECK: Avoid CamelCase: <WZRD_CLkOUT0_FRAC_EN> CHECK: Avoid CamelCase: <WZRD_CLkFBOUT_FRAC_EN> Signed-off-by: SirnamSwetha <theonly.ultimate@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-07-20staging: clocking-wizard: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-01-17staging: clocking-wizard: Handle invalid clk in notifierSoren Brinkmann1-1/+3
Even though it should never happen, handle the case that the clock notifier is called with an unexpected clock handle. This avoids the compiler warning: drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c: In function 'clk_wzrd_clk_notifier': >> drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c:99:6: warning: 'max' may be used uninitialized in this function [-Wmaybe-uninitialized] if (ndata->new_rate > max) ^ Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-01-17Clocking-wizard: Fixed missing blank line warningAthira Lekshmi1-0/+1
Added a new line after declaration to remove the warning 'Missing a blank line after declarations' Signed-off-by: Athira Lekshmi <andnlnbn18@gmail.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-12-02Drivers:staging:clocking-wizard: Added a newlineAthira Sharikkal1-0/+1
Fixed checkpatch warning: Missing a newline after declarations Signed-off-by: Athira Sharikkal <athirasnamby@gmail.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-12-02staging: clocking-wizard: check for a valid clk_name pointerDevendra Naga1-0/+5
The clk_name gets the return value from kasprintf (part of which does the allocation of the returned buffer). So check the return pointer before using it for clk_register_fixed_factor. Signed-off-by: Devendra Naga <devendra.aaru@gmail.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-10-29staging: clocking-wizard: Contain macro argument in parenthesisSoren Brinkmann1-1/+1
A macro doing some arithmetic to calculate a register offset, did not contain an argument to the macro in parentheses, potentially leading to unexpected results when using that macro with arithmetic expressions as argument. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-10-20staging: Add Xilinx Clocking Wizard driverSoren Brinkmann1-0/+335
Add a driver for the Xilinx Clocking Wizard soft IP. The clocking wizard provides an AXI interface to dynamically reconfigure the clocking resources of Xilinx FPGAs. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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