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According to Server Base System Architecture (SBSA) specification,
the SBSA Generic Watchdog has two stage timeouts: the first signal (WS0)
is for alerting the system by interrupt, the second one (WS1) is a real
hardware reset.
More details about the hardware specification of this device:
ARM DEN0029B - Server Base System Architecture (SBSA)
This driver can operate ARM SBSA Generic Watchdog as a single stage watchdog
or a two stages watchdog, it's set up by the module parameter "action".
In the single stage mode, when the timeout is reached, your system
will be reset by WS1. The first signal (WS0) is ignored.
In the two stages mode, when the timeout is reached, the first signal (WS0)
will trigger panic. If the system is getting into trouble and cannot be reset
by panic or restart properly by the kdump kernel(if supported), then the
second stage (as long as the first stage) will be reached, system will be
reset by WS1. This function can help administrator to backup the system
context info by panic console output or kdump.
This driver bases on linux kernel watchdog framework, so it can get
timeout from module parameter and FDT at the driver init stage.
Signed-off-by: Fu Wei <fu.wei@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Tested-by: Pratyush Anand <panand@redhat.com>
Acked-by: Timur Tabi <timur@codeaurora.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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Fu Wei