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2018-07-20gtp: constify nla_policyStephen Hemminger1-1/+1
The netlink policy structure can be constant like other drivers. Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-20nbd: constify nla_policyStephen Hemminger1-3/+3
The netlink policy should be const like other drivers. Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19qede: Add driver callbacks for eeprom module query.Sudarsana Reddy Kalluru1-0/+88
This patch implements the ethtool callbacks for querying sfp/eeprom module. Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Ariel Elior <ariel.elior@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19qed: Add qed APIs for PHY module query.Sudarsana Reddy Kalluru4-0/+104
This patch adds qed APIs for reading the PHY module. Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Ariel Elior <ariel.elior@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: mv88e6xxx: Longer timeout for PTP TX timestampAndrew Lunn1-1/+1
For slow processors using bit-banging MDIO, 20ms can be too short a timeout when waiting for the transmit timestamp to become available. Double it to 40ms. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: mv88e6xxx: Set PTP EthertypeAndrew Lunn2-0/+8
For the 6352 and newer switches, the PTP Ethertype defaults to ETH_P_1588. Hence it was not explicitly set. The 6165 however defaults to 0. So explicitly set the EtherType. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: mv88e6xxx: Add hwtimestamp support for the 6165Andrew Lunn5-2/+110
The 6165 family supports a more restricted version of hardware time stamps. Only L2 PTP is supported. All ports have to use the same EtherType, and transport spec configuration. PTP can only be enabled/disabled globally, not per port. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: mv88e6xxx: Abstract supported PTP filtersAndrew Lunn3-12/+25
The 6165 only supports layer L2 PTP, where as the more modern devices also support UDP and UDPv6, i.e. L4. Abstract the supported receive filters. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: mv88e6xxx: Abstract HW timestamp setupAndrew Lunn4-22/+42
The 6165 family does not have per port PTP control registers. Also, it places the timestamp data in different registers. Abstract the current implementation of 6352 compatible PTP devices so that 6165 can be added. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: mv88e6xxx: Add mv88e6165 PTP supportAndrew Lunn3-0/+51
The mv88e6165 family has its global clock in the PTP global registers. It does not support any form of PTP events. Add a function to read the clock, fill in an ops structure, and register it with the two members of the family. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: mv88e6xxx: Add MV88E6165 AVB register accessAndrew Lunn3-0/+30
The MV88E6165 PTP registers are all in AVB bank F, unlike newer generations which spread them over AVB bank E and F. Implement AVB ops for the MV88E6165 which hides this difference. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: mv88e6xxx: Abstract PTP operationsAndrew Lunn4-17/+67
The mv88e6165 family supports PTP, but its registers use a different layout to the currently supported devices. Abstract accessing the PTP registers into a set of ops, so making space for a second implementation. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: Drop OF dependency for BCM_SF2Florian Fainelli1-1/+1
NET_DSA_BCM_SF2 does not need to depend on CONFIG_OF anymore since we have stubs when that option is disabled. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: ethernet: broadcom: Drop dependency on OFFlorian Fainelli1-2/+2
Both BCMGENET and SYSTEMPORT build just fine with CONFIG_OF=n, we do have a dependency on HAS_IOMEM that was not being reflected for SYSTEMPORT so add that. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: phy: Drop OF dependency for MDIO_BCM_UNIMACFlorian Fainelli1-1/+1
The driver builds fine even with CONFIG_OF=n since we now have stubs that are provided. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: cavium: add missing PCI dependenciesArnd Bergmann1-4/+6
While some of the cavium drivers don't require PCI support, most others do, as shown by these build failures: WARNING: unmet direct dependencies detected for MDIO_THUNDER Depends on [n]: NETDEVICES [=y] && MDIO_BUS [=y] && 64BIT [=y] && PCI [=n] Selected by [y]: - THUNDER_NIC_BGX [=y] && NETDEVICES [=y] && ETHERNET [=y] && NET_VENDOR_CAVIUM [=y] && 64BIT [=y] - THUNDER_NIC_RGX [=y] && NETDEVICES [=y] && ETHERNET [=y] && NET_VENDOR_CAVIUM [=y] && 64BIT [=y] drivers/net/ethernet/cavium/thunder/nicvf_main.c: In function 'nicvf_set_irq_affinity': drivers/net/ethernet/cavium/thunder/nicvf_main.c:1095:25: error: implicit declaration of function 'pci_irq_vector'; did you mean 'rcu_irq_enter'? [-Werror=implicit-function-declaration] drivers/net/ethernet/cavium/thunder/nic_main.c: In function 'nic_mbx_intr_handler': drivers/net/ethernet/cavium/thunder/nic_main.c:1135:13: error: implicit declaration of function 'pci_irq_vector'; did you mean 'rcu_irq_enter'? [-Werror=implicit-function-declaration] In file included from drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c:27: drivers/net/ethernet/cavium/liquidio/octeon_main.h: In function 'octeon_unmap_pci_barx': drivers/net/ethernet/cavium/liquidio/octeon_main.h:97:3: error: implicit declaration of function 'pci_release_region'; did you mean 'pci_release_regions'? [-Werror=implicit-function-declaration] drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c: In function 'octeon_mbox_process_cmd': drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c:263:3: error: implicit declaration of function 'pcie_capability_set_word'; did you mean 'has_capability_noaudit'? [-Werror=implicit-function-declaration] drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c: In function 'setup_cn23xx_octeon_pf_device': drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c:1315:22: error: 'data32' is used uninitialized in this function [-Werror=uninitialized] drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c: In function 'cn23xx_dump_vf_iq_regs': include/linux/dynamic_debug.h:135:3: error: 'regval' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/net/ethernet/cavium/liquidio/lio_core.c: In function 'octeon_setup_interrupt': drivers/net/ethernet/cavium/liquidio/lio_core.c:1067:17: error: invalid application of 'sizeof' to incomplete type 'struct msix_entry' drivers/net/ethernet/cavium/liquidio/octeon_main.h: In function 'octeon_unmap_pci_barx': drivers/net/ethernet/cavium/liquidio/octeon_main.h:97:3: error: implicit declaration of function 'pci_release_region'; did you mean 'pci_release_regions'? [-Werror=implicit-function-declaration] This adds back the minimum set of dependencies to get everything to build cleanly again, but leaving the ones that build cleanly. Fixes: 7e2bc7fb65d5 ("net: cavium: Drop dependency of NET_VENDOR_CAVIUM on PCI") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18liquidio: Using NULL instead of plain integerYueHaibing2-3/+3
Fixes the following sparse warnings: drivers/net/ethernet/cavium/liquidio/lio_main.c:3068:23: warning: Using plain integer as NULL pointer drivers/net/ethernet/cavium/liquidio/lio_main.c:2909:23: warning: Using plain integer as NULL pointer drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c:385:27: warning: Using plain integer as NULL pointer Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net/mlx5: fix an unused-function warningArnd Bergmann1-1/+1
These dummy helpers are all intended to be inline functions, but one of them by accident came without the 'inline' keyword, causing a harmless warning: In file included from drivers/net/ethernet/mellanox/mlx5/core/main.c:63: drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h:79:1: error: 'mlx5_accel_tls_add_flow' defined but not used [-Werror=unused-function] mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow, Fixes: ab412e1dd7db ("net/mlx5: Accel, add TLS rx offload routines") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: mvpp2: debugfs: fix incorrect bitwise operatorGustavo A. R. Silva1-1/+1
The use of the | operator always leads to true, which looks rather suspect in this case. Fix this by using & instead. Addresses-Coverity-ID: 1471903 ("Wrong operator used") Fixes: dba1d918da02 ("net: mvpp2: debugfs: add entries for classifier flows") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18cxgb4: display number of rx and tx pages freeGanesh Goudar2-7/+29
display free rx and tx page count in the meminfo of an adapter. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum: Extend to support Spectrum-2 ASICJiri Pirko2-32/+139
Extend existing driver for Spectrum ASIC to support Spectrum-2 ASIC. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum_acl: Add initial Spectrum-2 ACL implementationJiri Pirko7-1/+334
Utilize only C-TCAM for now. Do very minimal A-TCAM initialization in order to make C-TCAM work. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum_acl: Add region association callbackIdo Schimmel3-0/+15
In Spectrum-2, ACL regions that use 8 or 12 key blocks require several consecutive hardware regions. In order to allow defragmentation, the device stores a mapping from a logical region ID to an hardware region ID, which is similar to the page table that is used to translate virtual addresses to physical addresses. Add the region association callback to the region create sequence and implement it as a NOP in Spectrum which does not require it. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum_acl: Add support for Spectrum-2 block encodingIdo Schimmel1-0/+68
Encode each flexible key block in the general block scheme according its block index. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum_acl: Prepare for Spectrum-2 block encodingIdo Schimmel3-53/+66
In Spectrum the key (and mask) block layout is very straight forward and every block is 16 bytes aligned. However, in Spectrum-2 the blocks are not even byte aligned, which makes it difficult to encode them using current method. Instead, first encode each block and then encode the block in the general blocks layout. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: reg: Add Policy-Engine General Configuration RegisterIdo Schimmel1-0/+23
The PGCR register configures general Policy-Engine settings. Specifically, we are going to use it in order to set the default action base pointer, which determines where the default action (when there is no hit) is located for each region. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: reg: Add Policy-Engine Region eRP RegisterIdo Schimmel1-0/+71
The PERERP register configures the region eRPs. It can be used, for example, to enable lookup in the C-TCAM in addition to the A-TCAM. To be able to perform a lookup in the C-TCAM we need to "use" the eRP table. This is done by marking the pointer as valid, but zeroing the eRP table vector. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: reg: Add Policy-Engine Region Configuration RegisterIdo Schimmel1-0/+57
The PERCR register configures the region parameters such as whether to consult the bloom filter before performing a lookup using a specific eRP. For C-TCAM only usage we don't need to accurately set the master mask. Instead, we can set all of its bits to make sure all the extracted keys are actually used. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: reg: Add Policy-Engine Region Association RegisterJiri Pirko1-0/+43
The PERAR register is used to associate a hw region for region_id's. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: acl: Introduce activity get operation for action block/setJiri Pirko3-0/+35
In Spectrum-2, activity cannot be find out by TCAM rule (PTCEv2 register), but rather by associated action set. For that purpose, extend action ops to allow query activity from PEFA register. Block activity is decided according to activity of the first set. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: reg: Add support for activity information from PEFA registerJiri Pirko2-6/+45
In Spectrum-2, the PEFA register is extend to report if the action set was hit during processing of packets. Introduce this extension and adjust the code around this accordingly. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum: Introduce flex key blocks for Spectrum-2Jiri Pirko2-0/+111
Introduce key blocks for Spectrum-2 that contains the same elements used already for Spectrum1. Along with that, introduce encoder stub. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum: Add Spectrum-2 variant of flex actions opsJiri Pirko2-0/+13
In Spectrum-2, no action set is stored directly in TCAM, all are located in KVD linear. So ask core to treat the first set as dummy empty one, to be just used for PTCEV2 purposes. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum_mr_tcam: Add Spectrum-2 stubsJiri Pirko3-1/+86
Add dummy ops for now. The ops are going to be implemented later on. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: spectrum: Add KVDL manager implementation for Spectrum-2Jiri Pirko3-1/+307
In Spectrum-2, KVD linear indexes are hashed into KVD hash. Therefore it is possible for multiple resource types to use same indexes. There are multiple index spaces. Also, the index space is bigger than the actual KVD hash area, which allows to have holes in the index space without any penalization. The HW has to be told in case the index for particular resource type is no longer used so it can be freed from KVD hash. IEDR register is used for that. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-19mlxsw: reg: Add Infrastructure Entry Delete RegisterJiri Pirko1-0/+62
The IEDR register is used for deleting entries from the entry tables. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18dsa: rtl8366: Remove unused variable.David S. Miller1-1/+0
drivers/net/dsa/rtl8366.c: In function ‘rtl8366_reset_vlan’: drivers/net/dsa/rtl8366.c:234:25: warning: unused variable ‘vlan4k’ [-Wunused-variable] Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18ravb: fix byte order for TX descriptor tag field lower bitsNiklas Söderlund1-1/+1
The wrong helper is used to swap the bytes when adding the lower bits of the TX descriptors tag field in the shared ds_tagl variable. The variable contains the DS[11:0] field and then the TAG[3:0] bits. The mistake was highlighted by the sparse warning: ravb_main.c:1622:31: left side has type restricted __le16 ravb_main.c:1622:31: right side has type unsigned short ravb_main.c:1622:31: warning: invalid assignment: |= ravb_main.c:1622:34: warning: cast to restricted __le16 Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18ravb: fix warning about memcpy lengthNiklas Söderlund1-1/+1
This fixes sparse warning: ravb_main.c:1257 ravb_get_strings() error: memcpy() '*ravb_gstrings_stats' too small (32 vs 960) Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18ravb: fix shadowing of symbol 'stats' in ravb_get_ethtool_stats()Niklas Söderlund1-1/+1
Inside a loop in ravb_get_ethtool_stats() a variable 'stats' is declared resulting in the argument also named 'stats' to be shadowed. Fix this warning by renaming the unused argument 'stats' to 'estats'. This fixes the sparse warning: ravb_main.c:1225:36: originally declared here ravb_main.c:1233:41: warning: symbol 'stats' shadows an earlier one Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: dsa: realtek-smi: Add Realtek SMI driverLinus Walleij6-0/+2584
This adds a driver core for the Realtek SMI chips and a subdriver for the RTL8366RB. I just added this chip simply because it is all I can test. The code is a massaged variant of the code that has been sitting out-of-tree in OpenWRT for years in the absence of a proper switch subsystem. This creates a DSA driver for it. I have tried to credit the original authors wherever possible. The main changes I've done from the OpenWRT code: - Added an IRQ chip inside the RTL8366RB switch to demux and handle the line state IRQs. - Distributed the phy handling out to the PHY driver. - Added some RTL8366RB code that was missing in the driver at the time, such as setting up "green ethernet" with a funny jam table and forcing MAC5 (the CPU port) into 1 GBit. - Select jam table and add the default jam table from the vendor driver, also for ASIC "version 0" if need be. - Do not store jam tables in the device tree, store them in the driver. - Pick in the "initvals" jam tables from OpenWRT's driver and make those get selected per compatible for the whole system. It's apparently about electrical settings for this system and whatnot, not really configuration from device tree. - Implemented LED control: beware of bugs because there are no LEDs on the device I am using! We do not implement custom DSA tags. This is explained in a comment in the driver as well: this "tagging protocol" is not simply a few extra bytes tagged on to the ethernet frame as DSA is used to. Instead, enabling the CPU tags will make the switch start talking Realtek RRCP internally. For example a simple ping will make this kind of packets appear inside the switch: 0000 ff ff ff ff ff ff bc ae c5 6b a8 3d 88 99 a2 00 0010 08 06 00 01 08 00 06 04 00 01 bc ae c5 6b a8 3d 0020 a9 fe 01 01 00 00 00 00 00 00 a9 fe 01 02 00 00 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 As you can see a custom "8899" tagged packet using the protocol 0xa2. Norm RRCP appears to always have this protocol set to 0x01 according to OpenRRCP. You can also see that this is not a ping packet at all, instead the switch is starting to talk network management issues with the CPU port. So for now custom "tagging" is disabled. This was tested on the D-Link DIR-685 with initramfs and OpenWRT userspaces and works fine on all the LAN ports (lan0 .. lan3). The WAN port is yet not working. Cc: Antti Seppälä <a.seppala@gmail.com> Cc: Roman Yeryomin <roman@advem.lv> Cc: Colin Leitner <colin.leitner@googlemail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: phy: realtek: Support RTL8366RB variantLinus Walleij1-0/+31
The RTL8366RB is an ASIC with five internal PHYs for LAN0..LAN3 and WAN. The PHYs are spawn off the main device so they can be handled in a distributed manner by the Realtek PHY driver. All that is really needed is the power save feature enablement and letting the PHY driver core pick up the IRQ from the switch chip. Cc: Antti Seppälä <a.seppala@gmail.com> Cc: Roman Yeryomin <roman@advem.lv> Cc: Colin Leitner <colin.leitner@googlemail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18r8169: power down chip in probeHeiner Kallweit1-3/+4
The removed code would be called in two situations: 1. interface is brought up never or >10s after driver load 2. after close() Case 1 we can handle cleaner by ensuring chip is powered down when leaving probe(). open() callback will power up the chip. In case 2 we call rtl_pll_power_down() twice currently, from the close() callback and 10s later when entering runtime-suspend. This is avoided by this patch. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18net: phy: sfp: Add HWMON support for module sensorsAndrew Lunn2-0/+728
SFP modules can contain a number of sensors. The EEPROM also contains recommended alarm and critical values for each sensor, and indications of if these have been exceeded. Export this information via HWMON. Currently temperature, VCC, bias current, transmit power, and possibly receiver power is supported. The sensors in the modules can either return calibrate or uncalibrated values. Uncalibrated values need to be manipulated, using coefficients provided in the SFP EEPROM. Uncalibrated receive power values require floating point maths in order to calibrate them. Performing this in the kernel is hard. So if the SFP module indicates it uses uncalibrated values, RX power is not made available. With this hwmon device, it is possible to view the sensor values using lm-sensors programs: in0: +3.29 V (crit min = +2.90 V, min = +3.00 V) (max = +3.60 V, crit max = +3.70 V) temp1: +33.0°C (low = -5.0°C, high = +80.0°C) (crit low = -10.0°C, crit = +85.0°C) power1: 1000.00 nW (max = 794.00 uW, min = 50.00 uW) ALARM (LCRIT) (lcrit = 40.00 uW, crit = 1000.00 uW) curr1: +0.00 A (crit min = +0.00 A, min = +0.00 A) ALARM (LCRIT, MIN) (max = +0.01 A, crit max = +0.01 A) The scaling sensors performs on the bias current is not particularly good. The raw values are more useful: curr1: curr1_input: 0.000 curr1_min: 0.002 curr1_max: 0.010 curr1_lcrit: 0.000 curr1_crit: 0.011 curr1_min_alarm: 1.000 curr1_max_alarm: 0.000 curr1_lcrit_alarm: 1.000 curr1_crit_alarm: 0.000 In order to keep the I2C overhead to a minimum, the constant values, such as limits and calibration coefficients are read once at module insertion time. Thus only reading *_input and *_alarm properties requires i2c read operations. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18hwmon: Add support for power min, lcrit, min_alarm and lcrit_alarmAndrew Lunn1-0/+4
Some sensors support reporting minimal and lower critical power, as well as alarms when these thresholds are reached. Add support for these attributes to the hwmon core. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18r8169: don't read chip phy status registerHeiner Kallweit1-4/+5
Instead of accessing the PHYstatus register we can use the information phylib stores in the phy_device structure. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18r8169: remove mii_if_info member from struct rtl8169_privateHeiner Kallweit1-31/+7
The only remaining usage of the struct mii_if_info member is to store the information whether the chip is GMII-capable. So we can replace it with a simple flag. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18r8169: remove rtl8169_set_speed_xmiiHeiner Kallweit1-90/+0
We can remove rtl8169_set_speed_xmii() now that phylib handles all this. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18r8169: use phy_speed_down / phy_speed_upHeiner Kallweit1-25/+4
Use new phylib functions phy_speed_down() and phy_speed_up(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-18r8169: use phy_mii_ioctlHeiner Kallweit1-22/+3
Switch to using phy_mii_ioctl(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>