aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
AgeCommit message (Expand)AuthorFilesLines
2015-09-30drm/i915: Calculate watermark configuration during atomic check (v2)Matt Roper4-55/+72
2015-09-30drm/i915: Don't set plane visible during HW readout if CRTC is offMatt Roper1-1/+1
2015-09-30drm/i915: Calculate ILK-style watermarks during atomic check (v3)Matt Roper3-45/+51
2015-09-30drm/i915: Calculate pipe watermarks into CRTC state (v3)Matt Roper2-35/+57
2015-09-30drm/i915: Refactor ilk_update_wm (v3)Ville Syrjälä1-29/+35
2015-09-30drm/i915: Drop intel_update_sprite_watermarksMatt Roper5-88/+0
2015-09-30drm/i915/ivb: Move WaCxSRDisabledForSpriteScaling w/a to atomic checkMatt Roper4-30/+48
2015-09-30drm/i915/skl: Eliminate usage of pipe_wm_parameters from SKL-style WM (v3)Matt Roper1-175/+151
2015-09-30drm/i915/skl: Simplify wm structures slightly (v2)Matt Roper4-55/+52
2015-09-30drm/i915: Determine I915_MAX_PLANES from plane enumMatt Roper1-6/+6
2015-09-30drm/i915: Eliminate usage of pipe_wm_parameters from ILK-style WM (v2)Matt Roper1-55/+29
2015-09-30drm/i915: Eliminate usage of plane_wm_parameters from ILK-style WM code (v2)Matt Roper1-63/+70
2015-09-30drm/i915: Drop redundant watermark programmingMatt Roper1-9/+2
2015-09-30drm/i915/bxt: fix RC6 residency time calculationImre Deak1-0/+3
2015-09-30drm/i915/guc: Media domain bit needed when notify GuC rc6 stateAlex Dai2-2/+14
2015-09-30drm/i915: s/_TRANSA_CHICKEN/TRANS_CHICKEN(PIPE_A)/Ville Syrjälä2-6/+6
2015-09-30drm/i915: s/_FDI_RXA_.../FDI_RX_...(PIPE_A)/Ville Syrjälä2-24/+24
2015-09-30drm/i915: Add missing const to audio_rate_need_prog()Takashi Iwai1-1/+1
2015-09-30drm/i915/bdw: Check for slice, subslice and EU count for BDWŁukasz Daniluk3-1/+124
2015-09-30drm: i915: drop null test before destroy functionsJulia Lawall1-13/+6
2015-09-30drm/i915: make backlight hooks connector specificJani Nikula5-68/+74
2015-09-30drm/i915/ddi: use switch case instead of if ladder for ddi_get_encoder_portJani Nikula1-7/+13
2015-09-30drm/i915/ddi: warn instead of oops on invalid ddi encoder typeJani Nikula1-2/+1
2015-09-30drm/i915: Use czclk_freq in vlv c0 residency calculationsVille Syrjälä1-2/+6
2015-09-30drm/i915: Simplify vlv/chv rc6 residency calculationVille Syrjälä1-28/+3
2015-09-30drm/i915: Read czclk from CCK on vlv/chvVille Syrjälä4-56/+60
2015-09-30drm/i915: Renaming CCK related reg definitionsVandana Kannan2-10/+10
2015-09-30drm/i915: Fix comparison bugRasmus Villemoes1-1/+5
2015-09-30drm/i915/gen8: Move WaHdcDisableFetchWhenMasked to common init fnArun Siluvery1-6/+2
2015-09-30drm/i915/gen8: Move WaForceEnableNonCoherent to common init fnArun Siluvery1-12/+8
2015-09-30drm/i915/gen8: Move GEN7_GT_MODE WA to common init fnArun Siluvery1-24/+12
2015-09-30drm/i915/gen8: Move Wa4x4STCOptimizationDisable to common init fnArun Siluvery1-8/+3
2015-09-30drm/i915/gen8: Move HiZ RAW stall optimization disable WA to common init fnArun Siluvery1-15/+10
2015-09-30drm/i915/gen8: Move WaDisablePartialInstShootdown to common init fnArun Siluvery1-8/+6
2015-09-30drm/i915/gen8: Move WaDisableAsyncFlipPerfMode to common init fnArun Siluvery1-6/+3
2015-09-30drm/i915/gen8: Move INSTPM WA to common functionArun Siluvery1-4/+4
2015-09-30drm/i915/gen8: Add gen8_init_workarounds for common WAArun Siluvery1-0/+16
2015-09-30drm/i915/skl: Remove WaDisableVFUnitClockGatingArun Siluvery1-6/+0
2015-09-30drm/i915/skl: Remove WaSetGAPSunitClckGateDisableArun Siluvery1-6/+0
2015-09-30drm/i915/skl: Remove WaDisableSDEUnitClockGatingArun Siluvery1-3/+1
2015-09-30drm/i915/bxt: Add WaStoreMultiplePTEenable nameArun Siluvery1-6/+3
2015-09-30drm/i915/gen9: Merge two WA as they part of same registerArun Siluvery1-3/+2
2015-09-30drm/i915/gen9: Handle error returned by gen9_init_workaroundsArun Siluvery1-2/+8
2015-09-30drm/i915: Add CD and pixel clock informationMika Kahola1-0/+4
2015-09-30drm/i915: s/DDI_BUF_CTL_A/DDI_BUF_CTL(PORT_A)/Ville Syrjälä1-1/+1
2015-09-30drm/i915: Add VLV_HDMIB etc. which already include VLV_DISPLAY_BASEVille Syrjälä2-16/+19
2015-09-30drm/i915: s/_CURACNTR/CURCNTR(PIPE_A)/Ville Syrjälä2-7/+7
2015-09-30drm/i915: Parametrize PALETTE and LGC_PALETTEVille Syrjälä2-9/+11
2015-09-30drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSRVille Syrjälä2-6/+6
2015-09-30drm/i915: Always use GEN8_RING_PDP_{LDW, UDW} instead of hand rolling the register offsetsVille Syrjälä1-3/+2