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2022-06-17drm/i915/mpllb: use I915_STATE_WARN() for state mismatch warningsJani Nikula1-8/+6
The pipe_config_mismatch() function is primarily for logging comparison results. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/167e54e13a9a41c944910a274e79cbfd39d963b1.1655372759.git.jani.nikula@intel.com
2022-06-17drm/i915/dpll: move shared dpll state verification to intel_dpll_mgr.cJani Nikula3-92/+95
Keep the shared dpll implementation details together by moving the dpll state verification to intel_dpll_mgr.c. Also declutter intel_display.c. v2: intel_shared_dpll_verify_state -> intel_shared_dpll_state_verify (Ville) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/85b02186f1269dd374d11db35900130547a5f2c6.1655372759.git.jani.nikula@intel.com
2022-06-17drm/i915/wm: move wm state verification to intel_pm.cJani Nikula3-142/+132
By moving wm state verification to intel_pm.c, we can make a bunch of functions static, hiding the wm details better. Also declutter intel_display.c. v2: intel_wm_state_verify -> intel_wm_verify_state (Ville) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/2a7e3141e87181c07eaddcd9c352b8810550b0ce.1655372759.git.jani.nikula@intel.com
2022-06-17soc: mediatek: SVS: add mt8192 SVS GPU driverRoger Lu1-5/+468
mt8192 SVS GPU uses 2-line (high/low bank) HW architecture to provide bank voltages. High bank helps update higher frequency's voltage and low bank helps update lower frequency's voltage. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20220516004311.18358-8-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17soc: mediatek: SVS: add debug commandsRoger Lu1-0/+275
The purpose of SVS is to help find the suitable voltages for DVFS. Therefore, if SVS bank voltages are concerned to be wrong, we can show/disable SVS bank voltages by this patch. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20220516004311.18358-6-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17soc: mediatek: SVS: add monitor modeRoger Lu1-6/+250
SVS monitor mode is based on different thermal temperature to provide suitable SVS bank voltages. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20220516004311.18358-5-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17soc: mediatek: SVS: introduce MTK SVS engineRoger Lu3-0/+1428
The Smart Voltage Scaling(SVS) engine is a piece of hardware which calculates suitable SVS bank voltages to OPP voltage table. Then, DVFS driver could apply those SVS bank voltages to PMIC/Buck when receiving OPP_EVENT_ADJUST_VOLTAGE. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20220516004311.18358-4-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17firewire: convert sysfs sprintf/snprintf family to sysfs_emitJiapeng Chong1-4/+2
Fix the following coccicheck warning: ./drivers/firewire/core-device.c:375:8-16: WARNING: use scnprintf or sprintf. Reported-by: Abaci Robot<abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Link: https://lore.kernel.org/r/20220615121505.61412-2-o-takashi@sakamocchi.jp Signed-off-by: Takashi Iwai <tiwai@suse.de>
2022-06-17firewire: cdev: fix potential leak of kernel stack due to uninitialized valueTakashi Sakamoto1-1/+1
Recent change brings potential leak of value on kernel stack to userspace due to uninitialized value. This commit fixes the bug. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Fixes: baa914cd81f5 ("firewire: add kernel API to access CYCLE_TIME register") Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Link: https://lore.kernel.org/r/20220512112037.103142-1-o-takashi@sakamocchi.jp Signed-off-by: Takashi Iwai <tiwai@suse.de>
2022-06-17drm/i915/fdinfo: Don't show engine classes not presentTvrtko Ursulin1-2/+3
Stop displaying engine classes with no engines - it is not a huge problem if they are shown, since the values will correctly be all zeroes, but it does count as misleading. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Fixes: 055634e4b62f ("drm/i915: Expose client engine utilisation via fdinfo") Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220616140056.559074-1-tvrtko.ursulin@linux.intel.com
2022-06-17drm/i915: Improve user experience and driver robustness under SIGINT or similarTvrtko Ursulin8-29/+77
We have long standing customer complaints that pressing Ctrl-C (or to the effect of) causes engine resets with otherwise well behaving programs. Not only is logging engine resets during normal operation not desirable since it creates support incidents, but more fundamentally we should avoid going the engine reset path when we can since any engine reset introduces a chance of harming an innocent context. Reason for this undesirable behaviour is that the driver currently does not distinguish between banned contexts and non-persistent contexts which have been closed. To fix this we add the distinction between the two reasons for revoking contexts, which then allows the strict timeout only be applied to banned, while innocent contexts (well behaving) can preempt cleanly and exit without triggering the engine reset path. Note that the added context exiting category applies both to closed non- persistent context, and any exiting context when hangcheck has been disabled by the user. At the same time we rename the backend operation from 'ban' to 'revoke' which more accurately describes the actual semantics. (There is no ban at the backend level since banning is a concept driven by the scheduling frontend. Backends are simply able to revoke a running context so that is the more appropriate name chosen.) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220527072452.2225610-1-tvrtko.ursulin@linux.intel.com
2022-06-17ata: libata-core: make ata_exec_internal_sg() *static*Sergey Shtylyov2-8/+4
ata_exec_internal_sg() is only called by ata_exec_internal() further in the same file, so we can make it *static* and remove its prototype from drivers/ata/libata.h... Suggested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-06-17soc: amlogic: Fix refcount leak in meson-secure-pwrc.cLiang He1-1/+3
In meson_secure_pwrc_probe(), there is a refcount leak in one fail path. Signed-off-by: Liang He <windhl@126.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Fixes: b3dde5013e13 ("soc: amlogic: Add support for Secure power domains controller") Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220616144915.3988071-1-windhl@126.com
2022-06-17ata: make transfer mode masks *unsigned int*Sergey Shtylyov12-43/+43
The packed transfer mode masks and also the {pio|mwdma|udma}_mask fields of *struct*s ata_device and ata_port_info are declared as *unsigned long* (which is a 64-bit type on 64-bit architectures) but actually the packed masks occupy only 20 bits (7 PIO modes, 5 MWDMA modes, and 8 UDMA modes) and the PIO/MWDMA/UDMA masks easily fit into just 8 bits each, so we can safely use (always 32-bit) *unsigned int* variables instead. This saves 745 bytes of object code in libata-core.o alone, not to mention LLDDs... Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2022-06-17clk: renesas: r8a779f0: Add HSCIF clocksWolfram Sang1-0/+4
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220614094937.8104-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17clk: renesas: r8a779f0: Add PCIe clocksYoshihiro Shimoda1-0/+2
Add the module clocks used by the PCIe controllers on the Renesas R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220613115627.2831257-1-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17clk: renesas: r8a779f0: Add Z0 and Z1 clock supportGeert Uytterhoeven1-0/+2
Add support for the Z0 and Z1 (Cortex-A55 Sub-System 0 (CPU 0-3) and Sub-System 1 (CPU 4-7)) clocks on R-Car S4-8, based on the existing support for Z clocks on R-Car Gen4. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/43009e25be1223a717e00c392cb2d416f5d47032.1654695893.git.geert+renesas@glider.be
2022-06-17mtd: nand: raw: qcom_nandc: add support for unprotected spare data pagesChristian Marangi1-5/+194
IPQ8064 nand have special pages where a different layout scheme is used. These special page are used by boot partition and on reading them lots of warning are reported about wrong ECC data and if written to results in broken data and not bootable device. The layout scheme used by these special page consist in using 512 bytes as the codeword size (even for the last codeword) while writing to CFG0 register. This forces the NAND controller to unprotect the 4 bytes of spare data. Since the kernel is unaware of this different layout for these special page, it does try to protect the spare data too during read/write and warn about CRC errors. Add support for this by permitting the user to declare these special pages in dts by declaring offset and size of the partition. The driver internally will convert these value to nand pages. On user read/write the page is checked and if it's a boot page the correct layout is used. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220616001835.24393-3-ansuelsmth@gmail.com
2022-06-17mtd: nand: raw: qcom_nandc: reorder qcom_nand_host structChristian Marangi1-45/+62
Reorder structs in nandc driver to save holes. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220616001835.24393-2-ansuelsmth@gmail.com
2022-06-17mtd: parsers: scpart: add missing of_node_put() in scpart_parse()Yang Yingliang1-0/+1
of_get_child_by_name() will increase the refcount of 'ofpart_node', so add of_node_put() after using it to avoid refcount leak. Fixes: 9b78ef0c7997 ("mtd: parsers: add support for Sercomm partitions") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220617014008.851583-1-yangyingliang@huawei.com
2022-06-16Merge tag 'drm-fixes-2022-06-17' of git://anongit.freedesktop.org/drm/drmLinus Torvalds15-111/+136
Pull drm fixes from Dave Airlie: "Regular drm fixes for rc3. Nothing too serious, i915, amdgpu and exynos all have a few small driver fixes, and two ttm fixes, and one compiler warning. atomic: - fix spurious compiler warning ttm: - add NULL ptr check in swapout code - fix bulk move handling i915: - Fix page fault on error state read - Fix memory leaks in per-gt sysfs - Fix multiple fence handling - Remove accidental static from a local variable amdgpu: - Fix regression in GTT size reporting - OLED backlight fix exynos: - Check a null pointer instead of IS_ERR() - Rework initialization code of Exynos MIC driver" * tag 'drm-fixes-2022-06-17' of git://anongit.freedesktop.org/drm/drm: drm/amd/display: Cap OLED brightness per max frame-average luminance drm/amdgpu: Fix GTT size reporting in amdgpu_ioctl drm/exynos: mic: Rework initialization drm/exynos: fix IS_ERR() vs NULL check in probe drm/ttm: fix bulk move handling v2 drm/i915/uc: remove accidental static from a local variable drm/i915: Individualize fences before adding to dma_resv obj drm/i915/gt: Fix memory leaks in per-gt sysfs drm/i915/reset: Fix error_state_read ptr + offset use drm/ttm: fix missing NULL check in ttm_device_swapout drm/atomic: fix warning of unused variable
2022-06-16net: phy: add support to get Master-Slave configurationRaju Lakkaraju1-0/+3
Add support to Master-Slave configuration and state Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: lan743x: Add support to SGMII 1G and 2.5GRaju Lakkaraju3-9/+442
Add SGMII access read and write functions Add support to SGMII 1G and 2.5G for PCI11010/PCI11414 chips Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: lan743x: Add support to Secure-ON WOLRaju Lakkaraju3-0/+51
Add support to Magic Packet Detection with Secure-ON for PCI11010/PCI11414 chips Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: lan743x: Add support to LAN743x register dumpRaju Lakkaraju2-0/+71
Add support to LAN743x common register dump Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: dsa: realtek: rtl8365mb: handle PHY interface modes correctlyAlvin Šipraga1-107/+174
Realtek switches in the rtl8365mb family always have at least one port with a so-called external interface, supporting PHY interface modes such as RGMII or SGMII. The purpose of this patch is to improve the driver's handling of these ports. A new struct rtl8365mb_chip_info is introduced together with a static array of such structs. An instance of this struct is added for each supported switch, distinguished by its chip ID and version. Embedded in each chip_info struct is an array of struct rtl8365mb_extint, describing the external interfaces available. This is more specific than the old rtl8365mb_extint_port_map, which was only valid for switches with up to 6 ports. The struct rtl8365mb_extint also contains a bitmask of supported PHY interface modes, which allows the driver to distinguish which ports support RGMII. This corrects a previous mistake in the driver whereby it was assumed that any port with an external interface supports RGMII. This is not actually the case: for example, the RTL8367S has two external interfaces, only the second of which supports RGMII. The first supports only SGMII and HSGMII. This new design will make it easier to add support for other interface modes. Finally, rtl8365mb_phylink_get_caps() is fixed up to return supported capabilities based on the external interface properties described above. This addresses Vladimir's point in the linked thread that the capabilities are not actually a function of the DSA port type: Although most typical applications will treat the ports with internal PHY as user ports, there is no actual hardware limitation preventing one from using them as a CPU port. Equally, ports with external interface(s) may well be treated as user ports, even though it is typical to use those ports as CPU ports. Link: https://lore.kernel.org/netdev/20220510192301.5djdt3ghoavxulhl@bang-olufsen.dk/ Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Acked-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Acked-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: dsa: realtek: rtl8365mb: remove learn_limit_max private data memberAlvin Šipraga1-6/+1
The variable is just assigned the value of a macro, so it can be removed. Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: dsa: realtek: rtl8365mb: correct the max number of portsAlvin Šipraga1-2/+1
The maximum number of ports is actually 11, according to two observations: 1. The highest port ID used in the vendor driver is 10. Since port IDs are indexed from 0, and since DSA follows the same numbering system, this means up to 11 ports are to be presumed. 2. The registers with port mask fields always amount to a maximum port mask of 0x7FF, corresponding to a maximum 11 ports. In view of this, I also deleted the comment. Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Reviewed-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: dsa: realtek: rtl8365mb: remove port_mask private data memberAlvin Šipraga1-7/+1
There is no real need for this variable: the line change interrupt mask is sufficiently masked out when getting linkup_ind and linkdown_ind in the interrupt handler. Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: dsa: realtek: rtl8365mb: rename macro RTL8367RB -> RTL8367RB_VBAlvin Šipraga1-3/+3
The official name of this switch is RTL8367RB-VB, not RTL8367RB. There is also an RTL8367RB-VC which is rather different. Change the name of the CHIP_ID/_VER macros for reasons of consistency. Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Reviewed-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: ipa: move more code out of gsi_channel_update()Alex Elder1-14/+20
Move the processing done for TX channels in gsi_channel_update() into gsi_evt_ring_rx_update(). The called function is called for both RX and TX channels, so rename it to be gsi_evt_ring_update(). As a result, this code no longer assumes events in an event ring are associated with just one channel. Because all events in a ring are handled in that function, we can move the call to gsi_trans_move_complete() there, and can ring the event ring doorbell there as well after all new events in the ring have been processed. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: ipa: call gsi_evt_ring_rx_update() unconditionallyAlex Elder1-3/+3
When an RX transaction completes, we update the trans->len field to contain the actual number of bytes received. This is done in a loop in gsi_evt_ring_rx_update(). Change that function so it checks the data transfer direction recorded in the transaction, and only updates trans->len for RX transfers. Then call it unconditionally. This means events for TX endpoints will run through the loop without otherwise doing anything, but this will change shortly. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: ipa: pass GSI pointer to gsi_evt_ring_rx_update()Alex Elder1-6/+7
The only reason the event ring's channel pointer is needed in gsi_evt_ring_rx_update() is so we can get at its GSI pointer. We can pass the GSI pointer as an argument, along with the event ring ID, and thereby avoid using the event ring channel pointer. This is another step toward no longer assuming an event ring services a single channel. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: ipa: don't pass channel when mapping transactionAlex Elder1-6/+10
Change gsi_channel_trans_map() so it derives the channel used from the transaction. Pass the index of the *first* TRE used by the transaction, and have the called function account for the fact that the last one used is what's important. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: ipa: don't assume one channel per event ringAlex Elder3-27/+6
In gsi_evt_ring_rx_update(), use gsi_event_trans() repeatedly to find the transaction associated with an event, rather than assuming consecutive events are associated with the same channel. This removes the only caller of gsi_trans_pool_next(), so get rid of it. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16net: phy: dp83867: implement support for io_impedance_ctrl nvmem cellRasmus Villemoes1-6/+49
We have a board where measurements indicate that the current three options - leaving IO_IMPEDANCE_CTRL at the (factory calibrated) reset value or using one of the two boolean properties to set it to the min/max value - are too coarse. Implement support for the newly added binding allowing device tree to specify an nvmem cell containing an appropriate value for this specific board. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16phy: aquantia: Fix AN when higher speeds than 1G are not advertisedClaudiu Manoil1-1/+14
Even when the eth port is resticted to work with speeds not higher than 1G, and so the eth driver is requesting the phy (via phylink) to advertise up to 1000BASET support, the aquantia phy device is still advertising for 2.5G and 5G speeds. Clear these advertising defaults when requested. Cc: Ondrej Spacek <ondrej.spacek@nxp.com> Fixes: 09c4c57f7bc41 ("net: phy: aquantia: add support for auto-negotiation configuration") Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Link: https://lore.kernel.org/r/20220610084037.7625-1-claudiu.manoil@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski65-417/+627
No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-16mm: kmemleak: remove kmemleak_not_leak_phys() and the min_count argument to kmemleak_alloc_phys()Patrick Wang1-1/+1
Patch series "mm: kmemleak: store objects allocated with physical address separately and check when scan", v4. The kmemleak_*_phys() interface uses "min_low_pfn" and "max_low_pfn" to check address. But on some architectures, kmemleak_*_phys() is called before those two variables initialized. The following steps will be taken: 1) Add OBJECT_PHYS flag and rbtree for the objects allocated with physical address 2) Store physical address in objects if allocated with OBJECT_PHYS 3) Check the boundary when scan instead of in kmemleak_*_phys() This patch set will solve: https://lore.kernel.org/r/20220527032504.30341-1-yee.lee@mediatek.com https://lore.kernel.org/r/9dd08bb5-f39e-53d8-f88d-bec598a08c93@gmail.com v3: https://lore.kernel.org/r/20220609124950.1694394-1-patrick.wang.shcn@gmail.com v2: https://lore.kernel.org/r/20220603035415.1243913-1-patrick.wang.shcn@gmail.com v1: https://lore.kernel.org/r/20220531150823.1004101-1-patrick.wang.shcn@gmail.com This patch (of 4): Remove the unused kmemleak_not_leak_phys() function. And remove the min_count argument to kmemleak_alloc_phys() function, assume it's 0. Link: https://lkml.kernel.org/r/20220611035551.1823303-1-patrick.wang.shcn@gmail.com Link: https://lkml.kernel.org/r/20220611035551.1823303-2-patrick.wang.shcn@gmail.com Signed-off-by: Patrick Wang <patrick.wang.shcn@gmail.com> Suggested-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Yee Lee <yee.lee@mediatek.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-06-16mm/memory-failure: disable unpoison once hw error happenszhenwei pi1-1/+1
Currently unpoison_memory(unsigned long pfn) is designed for soft poison(hwpoison-inject) only. Since 17fae1294ad9d, the KPTE gets cleared on a x86 platform once hardware memory corrupts. Unpoisoning a hardware corrupted page puts page back buddy only, the kernel has a chance to access the page with *NOT PRESENT* KPTE. This leads BUG during accessing on the corrupted KPTE. Suggested by David&Naoya, disable unpoison mechanism when a real HW error happens to avoid BUG like this: Unpoison: Software-unpoisoned page 0x61234 BUG: unable to handle page fault for address: ffff888061234000 #PF: supervisor write access in kernel mode #PF: error_code(0x0002) - not-present page PGD 2c01067 P4D 2c01067 PUD 107267063 PMD 10382b063 PTE 800fffff9edcb062 Oops: 0002 [#1] PREEMPT SMP NOPTI CPU: 4 PID: 26551 Comm: stress Kdump: loaded Tainted: G M OE 5.18.0.bm.1-amd64 #7 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996) ... RIP: 0010:clear_page_erms+0x7/0x10 Code: ... RSP: 0000:ffffc90001107bc8 EFLAGS: 00010246 RAX: 0000000000000000 RBX: 0000000000000901 RCX: 0000000000001000 RDX: ffffea0001848d00 RSI: ffffea0001848d40 RDI: ffff888061234000 RBP: ffffea0001848d00 R08: 0000000000000901 R09: 0000000000001276 R10: 0000000000000003 R11: 0000000000000000 R12: 0000000000000001 R13: 0000000000000000 R14: 0000000000140dca R15: 0000000000000001 FS: 00007fd8b2333740(0000) GS:ffff88813fd00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: ffff888061234000 CR3: 00000001023d2005 CR4: 0000000000770ee0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 PKRU: 55555554 Call Trace: <TASK> prep_new_page+0x151/0x170 get_page_from_freelist+0xca0/0xe20 ? sysvec_apic_timer_interrupt+0xab/0xc0 ? asm_sysvec_apic_timer_interrupt+0x1b/0x20 __alloc_pages+0x17e/0x340 __folio_alloc+0x17/0x40 vma_alloc_folio+0x84/0x280 __handle_mm_fault+0x8d4/0xeb0 handle_mm_fault+0xd5/0x2a0 do_user_addr_fault+0x1d0/0x680 ? kvm_read_and_reset_apf_flags+0x3b/0x50 exc_page_fault+0x78/0x170 asm_exc_page_fault+0x27/0x30 Link: https://lkml.kernel.org/r/20220615093209.259374-2-pizhenwei@bytedance.com Fixes: 847ce401df392 ("HWPOISON: Add unpoisoning support") Fixes: 17fae1294ad9d ("x86/{mce,mm}: Unmap the entire page if the whole page is affected and poisoned") Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Naoya Horiguchi <naoya.horiguchi@nec.com> Reviewed-by: Miaohe Lin <linmiaohe@huawei.com> Reviewed-by: Oscar Salvador <osalvador@suse.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: <stable@vger.kernel.org> [5.8+] Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-06-16scsi: iscsi: Make iscsi_unregister_transport() return voidMax Gurtovoy1-3/+1
This function always returns 0. We can make it return void to simplify the code. Also, no caller ever checks the return value of this function. Link: https://lore.kernel.org/r/20220616080210.18531-1-mgurtovoy@nvidia.com Reviewed-by: Mike Christie <michael.christie@oracle.com> Signed-off-by: Max Gurtovoy <mgurtovoy@nvidia.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: ufs-mediatek: Disable unused VCCQx power railsStanley Chu1-0/+24
Some MediaTek UFS platforms support different VCCQx power rails, for example, both 1.2v and 1.8v VCCQx, in a single kernel image. To optimize the system power consumption, provide a way to disable and release the unused power rail during the device probing. Link: https://lore.kernel.org/r/20220616053725.5681-12-stanley.chu@mediatek.com Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: ufs-mediatek: Support multiple VCC sourcesStanley Chu2-1/+59
Support multiple VCC sources in MediaTek UFS platforms. Two options are provided and distinguished by specific device tree attributes as below examples, [Option 1: By numbering] mediatek,ufs-vcc-by-num; vcc-opt1-supply = <&mt6373_vbuck4_ufs>; vcc-opt2-supply = <&mt6363_vemc>; [Option 2: By UFS version] mediatek,ufs-vcc-by-ver; vcc-ufs3-supply = <&mt6373_vbuck4_ufs>; Link: https://lore.kernel.org/r/20220616053725.5681-11-stanley.chu@mediatek.com Signed-off-by: Alice Chao <alice.chao@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: Export regulator functionsStanley Chu3-3/+7
Export below regulator functions to allow vendors to customize regulator configuration in their own platforms. int ufshcd_populate_vreg(struct device *dev, const char *name, struct ufs_vreg **out_vreg); int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg); Link: https://lore.kernel.org/r/20220616053725.5681-10-stanley.chu@mediatek.com Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: ufs-mediatek: Support low-power mode for parents of VCCQxStanley Chu2-13/+37
Provide the facility to configure parents of VCCQx power rails as low-power or full-power mode in MediaTek UFS platforms. Link: https://lore.kernel.org/r/20220616053725.5681-9-stanley.chu@mediatek.com Signed-off-by: Alice Chao <alice.chao@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: ufs-mediatek: Support flexible parameters for SMC callsStanley Chu2-16/+39
Provide flexible number of parameters for UFS SMC calls to be used in a subsequent commit. Link: https://lore.kernel.org/r/20220616053725.5681-8-stanley.chu@mediatek.com Signed-off-by: Alice Chao <alice.chao@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: ufs-mediatek: Support low-power mode for VCCQPeter Wang1-6/+13
Allow VCCQ to enter low-power mode, and also remove the restriction of VCC because VCCQ/VCCQ2 can be changed to low-power mode even if VCC stays on while the device is not in active power mode. Link: https://lore.kernel.org/r/20220616053725.5681-7-stanley.chu@mediatek.com Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: ufs-mediatek: Prevent device regulators setting LPM incorrectlyPo-Wen Kao1-2/+10
Device regulatrs are allowed to enter low-power mode if neither device is not in active mode, nor VCC does not keep on. Fix this by adding conditions before LPM decision. Link: https://lore.kernel.org/r/20220616053725.5681-6-stanley.chu@mediatek.com Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: ufs-mediatek: Fix the timing of configuring device regulatorsPo-Wen Kao1-5/+53
Currently the LPM configurations of device regulators may not work since VCC is not disabled yet while ufs_mtk_vreg_set_lpm() is executed. Fix this by changing the timing of invoking ufs_mtk_vreg_set_lpm(). Link: https://lore.kernel.org/r/20220616053725.5681-5-stanley.chu@mediatek.com Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-06-16scsi: ufs: ufs-mediatek: Introduce workaround for power mode changeCC Chou2-2/+59
Some MediaTek SoC chips need special flow for power mode change, especially for chips supporting HS-G5. Enable the workaround by setting the host-specific capability. Link: https://lore.kernel.org/r/20220616053725.5681-4-stanley.chu@mediatek.com Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: CC Chou <cc.chou@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Dennis Yu <tun-yu.yu@mediatek.com> Signed-off-by: Peter Wang <peter.want@medaitek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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