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2022-06-06drm/bridge: analogix_dp: Support PSR-exit to disable transitionBrian Norris1-4/+38
Most eDP panel functions only work correctly when the panel is not in self-refresh. In particular, analogix_dp_bridge_disable() tends to hit AUX channel errors if the panel is in self-refresh. Given the above, it appears that so far, this driver assumes that we are never in self-refresh when it comes time to fully disable the bridge. Prior to commit 846c7dfc1193 ("drm/atomic: Try to preserve the crtc enabled state in drm_atomic_remove_fb, v2."), this tended to be true, because we would automatically disable the pipe when framebuffers were removed, and so we'd typically disable the bridge shortly after the last display activity. However, that is not guaranteed: an idle (self-refresh) display pipe may be disabled, e.g., when switching CRTCs. We need to exit PSR first. Stable notes: this is definitely a bugfix, and the bug has likely existed in some form for quite a while. It may predate the "PSR helpers" refactor, but the code looked very different before that, and it's probably not worth rewriting the fix. Cc: <stable@vger.kernel.org> Fixes: 6c836d965bad ("drm/rockchip: Use the helpers for PSR") Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220228122522.v2.1.I161904be17ba14526f78536ccd78b85818449b51@changeid
2022-06-06drm/probe-helper: Default to 640x480 if no EDID on DPDouglas Anderson1-1/+10
If we're unable to read the EDID for a display because it's corrupt / bogus / invalid then we'll add a set of standard modes for the display. Since we have no true information about the connected display, these modes are essentially guesses but better than nothing. At the moment, none of the modes returned is marked as preferred, but the modes are sorted such that the higher resolution modes are listed first. When userspace sees these modes presented by the kernel it needs to figure out which one to pick. At least one userspace, ChromeOS [1] seems to use the rules (which seem pretty reasonable): 1. Try to pick the first mode marked as preferred. 2. Try to pick the mode which matches the first detailed timing descriptor in the EDID. 3. If no modes were marked as preferred then pick the first mode. Unfortunately, userspace's rules combined with what the kernel is doing causes us to fail section 4.2.2.6 (EDID Corruption Detection) of the DP 1.4a Link CTS. That test case says that, while it's OK to allow some implementation-specific fall-back modes if the EDID is bad that userspace should _default_ to 640x480. Let's fix this by marking 640x480 as default for DP in the no-EDID case. NOTES: - In the discussion around v3 of this patch [2] there was talk about solving this in userspace and I even implemented a patch that would have solved this for ChromeOS, but then the discussion turned back to solving this in the kernel. - Also in the discussion of v3 [2] it was requested to limit this change to just DP since folks were worried that it would break some subtle corner case on VGA or HDMI. [1] https://source.chromium.org/chromium/chromium/src/+/a051f741d0a15caff2251301efe081c30e0f4a96:ui/ozone/platform/drm/common/drm_util.cc;l=488 [2] https://lore.kernel.org/r/20220513130533.v3.1.I31ec454f8d4ffce51a7708a8092f8a6f9c929092@changeid Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220601112302.v4.1.I31ec454f8d4ffce51a7708a8092f8a6f9c929092@changeid
2022-06-06drm/amdgpu/soc21: add mode2 asic reset for SMU IP v13.0.4Alex Deucher1-0/+7
Set the default reset method to mode2 for SMU IP v13.0.4 Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Tim Huang <tim.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/radeon: fix potential buffer overflow in ni_set_mc_special_registers()Alexey Kodanev1-4/+2
The last case label can write two buffers 'mc_reg_address[j]' and 'mc_data[j]' with 'j' offset equal to SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE since there are no checks for this value in both case labels after the last 'j++'. Instead of changing '>' to '>=' there, add the bounds check at the start of the second 'case' (the first one already has it). Also, remove redundant last checks for 'j' index bigger than array size. The expression is always false. Moreover, before or after the patch 'table->last' can be equal to SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE and it seems it can be a valid value. Detected using the static analysis tool - Svace. Fixes: 69e0b57a91ad ("drm/radeon/kms: add dpm support for cayman (v5)") Signed-off-by: Alexey Kodanev <aleksei.kodanev@bell-sw.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amdgpu/display: fix DCN3.2 Makefiles for non-x86Alex Deucher2-2/+16
Add proper handling for PPC64. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amdgpu/display: make some functions staticAlex Deucher3-6/+6
Fixes "no previous prototype" warnings. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amdgpu/discovery: add comments about VCN instance handlingAlex Deucher1-0/+8
Add comments to clarify code that is safe, but triggers and smatch warning. Link: https://lists.freedesktop.org/archives/amd-gfx/2022-June/079905.html Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Dan Carpenter <dan.carpenter@oracle.com>
2022-06-06drm/amd/display: Detect dpcd_rev when hotplug mst monitorWayne Lin1-1/+37
[Why] Once mst topology is constructed, later on new connected monitors are reported to source by CSN message. Within CSN, there is no carried info of DPCD_REV comparing to LINK_ADDRESS reply. As the result, we might leave some ports connected to DP but without DPCD revision number which will affect us determining the capability of the DP Rx. [How] Send out remote DPCD read when the port's dpcd_rev is 0x0 in detect_ctx(). Firstly, read out the value from DPCD 0x2200. If the return value is 0x0, it's likely the DP1.2 DP Rx then we reques revision from DPCD 0x0 again. Reviewed-by: Hersen Wu <hersenwu@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: Update optimized blank calc and programmingGabe Teeger5-16/+5
[Why] The existing calculations in DCN3.1 were placeholder and need to be replaced with HW team approved calculations. [How] The new calculations add new parameters to the bounding box and pipe params - VblankNom and the bounding box default. The placeholder calculations are dropped from DCN3.1 in the meantime while we work out hardware approved replacements. Also fix a bug where we wipe out other register contents with a REG_SET instead of a REG_UPDATE for the register we were programming the min_dst_y_next_start_optimized. Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Gabe Teeger <gabe.teeger@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: Implement MPO PSR SULeo Li2-4/+144
[WHY] For additional power savings, PSR SU (also referred to as PSR2) can be enabled on eDP panels with PSR SU support. PSR2 saves more power compared to PSR1 by allowing more opportunities for the display hardware to be shut down. In comparison to PSR1, Shut down can now occur in-between frames, as well as in display regions where there is no visible update. In otherwords, it allows for some display hw components to be enabled only for a **selectively updated** region of the visible display. Hence PSR SU. [HOW] To define the SU region, support from the OS is required. OS needs to inform driver of damaged regions that need to be flushed to the eDP panel. Today, such support is lacking in most compositors. Therefore, an in-between solution is to implement PSR SU for MPO and cursor scenarios. The plane bounds can be used to define the damaged region to be flushed to panel. This is achieved by: * Leveraging dm_crtc_state->mpo_requested flag to identify when MPO is enabled. * If MPO is enabled, only add updated plane bounds to dirty region. Determine plane update by either: * Existence of drm damaged clips attached to the plane (added by a damage-aware compositor) * Change in fb id (flip) * Change in plane bounds (position and dimensions) * If cursor is enabled, the old_pos and new_pos of cursor plus cursor size is used as damaged regions(*). (*) Cursor updates follow a different code path through DC. PSR SU for cursor is already implemented in DC, and the only thing required to enable is to set DC_PSR_VERSION_SU_1 on the eDP link. See dcn10_dmub_update_cursor_data(). Signed-off-by: Leo Li <sunpeng.li@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: update cursor position to DMUB FWDavid Zhang4-0/+136
[why] To involve the cursor position into dirty rectangle calculation. [how] - separate plane and cursor update by different DMUB command - send the cursor information while cursor updating, when updating cursor position/attribute, store cursor pos/attr to hubp, and notify dmub FW to exit psr before program cursor registers Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: calculate psr config settings in runtime in DMDavid Zhang1-5/+10
[why] Currently the psr configuration parameters are hardcoded before feeding into the DC helper before passing to DMUB FW. We'd rework to call a shared helper to calculate/update generic psr config fields which are relying on the stream timing and eDP sink PSR caps to avoid hard-coding. [how] - drop part of hard-coded psr config fields by replacing w/ the call of helper from DM before feeding into DC link setup psr helper - For those DM specific psr config fields, e.g. allow smu opt, is not to be set/updated from the shared helper but to rely on the DC feature mask - for the psr version field in psr_config structure, since only the field psr_version of DC link psr_settings matters for that fed to DMUB FW, thus no need to set/update the psr_version field of psr_config structure. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: add shared helpers to update psr config fields to power moduleDavid Zhang2-0/+90
[why] Currently the amdgpu DM psr configuration parameters are hardcoded before feeding into the DC helper to setup PSR. We would define a helper which is to calculate parts of the psr config fields to avoid hard-coding. [how] To make helper shareable, declare and define the helper in the module_helper, to set/update below fields: - psr remote buffer setup time - sdp tx line number deadline - line time in us - su_y_granularity - su_granularity_required - psr_frame_capture_indication_req - psr_exit_link_training_required add another helper to check given the stream context, if there is only one stream and the output is eDP panel connected. changes in v2: ------------------ - add detailed comment for how psr setup time is calculated as per eDP 1.5 spec Cc: Chandan Vurdigerenataraj <chandan.vurdigerenataraj@amd.com> Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: PSRSU+DSC WA for specific TCONDavid Zhang2-0/+15
[why] Some specific TCON chip has HW limitation to support PSRSU+DSC. [how] Force ffu mode when DSC enabled if we detect it is the specific model from sink OUI DPCD. And disable ABM update for this case. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: use HW lock mgr for PSR-SUDavid Zhang1-0/+2
[why] Feature requires synchronization of dig, pipe, and cursor locking between driver and DMUB fw for PSR-SU [how] return True if PSR-SU in the checker should_use_dmub_lock() Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: Set PSR level to enable ALPM by defaultDavid Zhang2-1/+7
[Why & How] While support ALPM, do ALPM state transition while PSR entry/exit. ALPM is needed for PSR-SU feature, and since the function is ready, we'd enable it by default. - Add psr level definition to enable/disable ALPM and set ALPM powerdone mode. - Enable ALPM by default Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: fix system hang when PSR exitsDavid Zhang2-0/+23
[why] When DC driver send PSR exit dmub command to DMUB FW, it might not wait until PSR exit. Then it may hit the following deadlock situation. 1. DC driver send HW LOCK command to DMUB FW due to frame update 2. DMUB FW Set the HW lock 3. DMUB execute PSR exit sequence and stuck at polling DPG Pending register due to the HW Lock is set 4. DC driver ask DMUB FW to unlock HW lock, but DMUB FW is polling DPG pending register [how] The reason why DC driver doesn't wait until PSR exit is because some of the PSR state machine state is not update the dc driver. So when DC driver read back the PSR state, it take the state for PSR inactive. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: add vline time in micro sec to PSR contextDavid Zhang3-0/+5
[why] The current PSR SU programming margin is fixed base on FHD 60HZ panel. If the resolution and refresh rate become higher, the time of current margin might not cover the programming SU time. [how] Notice that the programming SU time is the same among different panels. Instead of fixing the margin with target line number, change the margin unit to micro second which indicate the time needed for programming SU. Then FW set the margin line number base on the line time and margin time. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: Set default value of line_capture_indicationDavid Zhang1-0/+1
[Why & how] We only support line capture indication as 0 for PSRSU Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: Passing Y-granularity to dmub fwDavid Zhang3-0/+18
[Why] The Y-granularity panel parameter indicate the grid pattern granularity in the Y direction for PSRSU. [How] Send the Y-granularity data by PSR_COPY_SETTINGS dmub command. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/amdgpu: add pipe1 hardware supportArunpravin Paneer Selvam1-1/+1
Enable pipe1 support starting from SIENNA CICHLID asic Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/amdgpu: Enable high priority gfx queueArunpravin Paneer Selvam5-27/+81
Starting from SIENNA CICHLID asic supports two gfx pipes, enabling two graphics queues, 1 on each pipe, pipe0 queue0 would be the normal piority queue and pipe1 queue0 would be the high priority queue Only one queue per pipe is visble to SPI, SPI looks at the priority value assigned to CP_GFX_HQD_QUEUE_PRIORITY from each of the queue's HQD/MQD. Create contexts applying AMDGPU_CTX_PRIORITY_HIGH which submits job to the high priority queue on GFX pipe1. There would be starvation of LP workload if HP workload is always available. v2: - remove unnecessary check(Nirmoy) - make pipe1 hardware support a separate patch(Nirmoy) - remove duplicate code(Shashank) - add CSA support for second gfx pipe(Alex) v3(Christian): - fix incorrect indentation - merge COMPUTE and GFX switch cases as both calls the same function. v4: - rebase w/ latest code base Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amdgpu: adding device coredump supportSomalapuram Amaranath2-0/+69
Added device coredump information: - Kernel version - Module - Time - VRAM status - Guilty process name and PID - GPU register dumps v1 -> v2: Variable name change v1 -> v2: NULL check v1 -> v2: Code alignment v1 -> v2: Adding dummy amdgpu_devcoredump_free v1 -> v2: memset reset_task_info to zero v2 -> v3: add CONFIG_DEV_COREDUMP for variables v2 -> v3: remove NULL check on amdgpu_devcoredump_read Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com> Reviewed-by: Shashank Sharma <Shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amdgpu: save the reset dump register value for devcoredumpSomalapuram Amaranath3-3/+11
Allocate memory for register value and use the same values for devcoredump. v1 -> v2: Change krealloc_array() to kmalloc_array() v2 -> v3: Fix alignment Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com> Reviewed-by: Shashank Sharma <Shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: program PSR2 DPCD ConfigurationDavid Zhang2-2/+34
[Why] To support PSR2 Source DPCD configuration [How] Update the PSR2 Source DPCD settings while the PSR2 enabled Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: revise Start/End SDP dataDavid Zhang1-2/+27
[why & how] We need to implement the VSC packet rev4 that is required by PSRSU. Follow the eDP 1.5 spec pg. 257 changes in v2: ------------------- - set vsc packet rev2 for PSR1 Cc: Chandan Vurdigerenataraj <chandan.vurdigerenataraj@amd.com> Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: update GSP1 generic info packet for PSRSUDavid Zhang1-0/+15
[why & how] Based on PSRSU specification, every selective update frame need to use two SDP to indicate the frame active range. So we occupy another GSP1 for PSRSU execution. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: combine dirty rectangles in DMUB FWDavid Zhang2-0/+59
[why] In PSR-SU design, the DMUB FW handles the combination of multiple dirty rectangles. [how] - create DC dmub update dirty rectangle helper which sends the dirty rectangles per pipe from DC to DMUB, and DMUB FW will handle to combine the dirty RECTs - call the helper from DC commit plane update function. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06drm/amd/display: feed PSR-SU as psr version to dmub FWDavid Zhang1-0/+3
[why & how] set psr version as PSR-SU in kernel-FW interface function to ensure the correct dmub command parameter is fed into FW. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-06net: phy: dp83867: retrigger SGMII AN when link changeTan Tee Min1-0/+29
There is a limitation in TI DP83867 PHY device where SGMII AN is only triggered once after the device is booted up. Even after the PHY TPI is down and up again, SGMII AN is not triggered and hence no new in-band message from PHY to MAC side SGMII. This could cause an issue during power up, when PHY is up prior to MAC. At this condition, once MAC side SGMII is up, MAC side SGMII wouldn`t receive new in-band message from TI PHY with correct link status, speed and duplex info. As suggested by TI, implemented a SW solution here to retrigger SGMII Auto-Neg whenever there is a link change. v2: Add Fixes tag in commit message. Fixes: 2a10154abcb7 ("net: phy: dp83867: Add TI dp83867 phy") Cc: <stable@vger.kernel.org> # 5.4.x Signed-off-by: Sit, Michael Wei Hong <michael.wei.hong.sit@intel.com> Reviewed-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Tan Tee Min <tee.min.tan@linux.intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220526090347.128742-1-tee.min.tan@linux.intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-06firmware: arm_scmi: Remove all the unused local variablesCristian Marussi4-13/+12
While using SCMI iterators helpers a few local automatic variables are defined but then used only as input for sizeof operators. cppcheck is fooled to complain about this with: | drivers/firmware/arm_scmi/sensors.c:341:48: warning: Variable 'msg' is | not assigned a value. [unassignedVariable] | struct scmi_msg_sensor_list_update_intervals *msg; Even though this is an innocuos warning, since the uninitialized variable is at the end never used in the reported cases, fix these occurences all over SCMI stack to avoid keeping unneeded objects on the stack. Link: https://lore.kernel.org/r/20220530115237.277077-1-cristian.marussi@arm.com Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-06-06firmware: arm_scmi: Relax base protocol sanity checks on the protocol listCristian Marussi1-5/+11
Even though malformed replies from firmware must be treated carefully to avoid memory corruption in the kernel, some out-of-spec SCMI replies can be tolerated to avoid breaking existing deployed system, as long as they won't cause memory issues. Relax the sanity checks on the recieved protocol list in the base protocol to avoid breaking one of the deployed platform whose firmware is not easily upgradable currently. Link: https://lore.kernel.org/r/20220523171559.472112-1-cristian.marussi@arm.com Cc: Etienne Carriere <etienne.carriere@linaro.org> Cc: Sudeep Holla <sudeep.holla@arm.com> Reported-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Tested-By: Frank Wunderlich <frank-w@public-files.de> Acked-by: Michael Riesch <michael.riesch@wolfvision.net> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-06-06drm/i915/display/fbc: Do not apply WA 22014263786 to DG2José Roberto de Souza1-2/+2
This workaround brings some regressions to DG2 and if really necessary for DG2 an alternative workaround will be implemented. BSpec: 54077 Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220602201730.199418-1-jose.souza@intel.com
2022-06-06ath11k: Fix warnings reported by checkpatchManikanta Pubbisetty4-6/+6
Fix warnings reported by checkpatch tool. Below are the errors fixed, drivers/net/wireless/ath/ath11k/hal_rx.c:760: 'recevied' may be misspelled - perhaps 'received? drivers/net/wireless/ath/ath11k/qmi.c:2232: Prefer strscpy over strlcpy drivers/net/wireless/ath/ath11k/qmi.c:2238: Prefer strscpy over strlcpy drivers/net/wireless/ath/ath11k/qmi.c:2662: Prefer strscpy over strlcpy drivers/net/wireless/ath/ath11k/mac.c:7836: 'atleast' may be misspelled - perhaps 'at least'? drivers/net/wireless/ath/ath11k/wmi.c:6566: 'succeded' may be misspelled - perhaps 'succeeded'? Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1 Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220602131350.29486-1-quic_mpubbise@quicinc.com
2022-06-06ath11k: Fix LDPC config in set_bitrate_mask hookManikanta Pubbisetty2-3/+3
Currently ar->ht_cap_info is not set anywhere in the code, this could result in LDPC config computed wrongly in the set_bitrate_mask() hook and eventually sending wrong config to the target. Fix this by checking the LDPC support from the band HT capabilities of the radio instead. Furthermore, it looks like firmwares running on the ath11k hardware do not set WMI_HT_CAP_LDPC for advertising the TX LDPC capability, WMI_HT_CAP_TX_LDPC is set instead and this should be checked for getting hardware's TX LDPC support. This is true for QCA6390, WCN6855 & WCN6750 hardware. Also, remove unused variables ht_cap_info & vht_cap_info from struct ath11k{}. Found this during code review. Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1 Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220602124142.29909-1-quic_mpubbise@quicinc.com
2022-06-06ath11k: Avoid REO CMD failed prints during firmware recoveryManikanta Pubbisetty1-2/+3
Currently when firmware recovery is in progress, we do not queue REO commands to the firmware, instead -ESHUTDOWN will be returned to the caller leading to a failure print on the console. The REO command in the problem scenario is sent for all tids of a peer in which case we will have 16 failure prints on the console for a single peer. For an AP usecase, this count would be even higher in a worst case scenario. Since these commands are bound to fail during firmware recovery, it is better to avoid printing these failures and thereby avoid message flooding on the console. Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1 Fixes: 8ee8d38ca472 ("ath11k: Fix crash during firmware recovery on reo cmd ring access") Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220602122929.18896-1-quic_mpubbise@quicinc.com
2022-06-06ath11k: Fix incorrect debug_mask mappingsManikanta Pubbisetty1-2/+2
Currently a couple of debug_mask entries are mapped to the same value, this could enable unintended driver logging. If enabling DP_TX logs was the intention, then this could also enable PCI logs flooding the dmesg buffer or vice versa. Fix this by correctly assigning the debug masks. Found during code review. Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1 Fixes: aa2092a9bab3f ("ath11k: add raw mode and software crypto support") Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220602115621.15339-1-quic_mpubbise@quicinc.com
2022-06-06xen/grant-dma-ops: Retrieve the ID of backend's domain for DT devicesOleksandr Tyshchenko2-7/+42
Use the presence of "iommus" property pointed to the IOMMU node with recently introduced "xen,grant-dma" compatible as a clear indicator of enabling Xen grant mappings scheme for that device and read the ID of Xen domain where the corresponding backend is running. The domid (domain ID) is used as an argument to the Xen grant mapping APIs. To avoid the deferred probe timeout which takes place after reusing generic IOMMU device tree bindings (because the IOMMU device never becomes available) enable recently introduced stub IOMMU driver by selecting XEN_GRANT_DMA_IOMMU. Also introduce xen_is_grant_dma_device() to check whether xen-grant DMA ops need to be set for a passed device. Remove the hardcoded domid 0 in xen_grant_setup_dma_ops(). Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Link: https://lore.kernel.org/r/1654197833-25362-8-git-send-email-olekstysh@gmail.com Signed-off-by: Juergen Gross <jgross@suse.com>
2022-06-06xen/grant-dma-iommu: Introduce stub IOMMU driverOleksandr Tyshchenko3-0/+83
In order to reuse generic IOMMU device tree bindings by Xen grant DMA-mapping layer we need to add this stub driver from a fw_devlink perspective (grant-dma-ops cannot be converted into the proper IOMMU driver). Otherwise, just reusing IOMMU bindings (without having a corresponding driver) leads to the deferred probe timeout afterwards, because the IOMMU device never becomes available. This stub driver does nothing except registering empty iommu_ops, the upper layer "of_iommu" will treat this as NO_IOMMU condition and won't return -EPROBE_DEFER. As this driver is quite different from the most hardware IOMMU implementations and only needed in Xen guests, place it in drivers/xen directory. The subsequent commit will make use of it. Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Link: https://lore.kernel.org/r/1654197833-25362-7-git-send-email-olekstysh@gmail.com Signed-off-by: Juergen Gross <jgross@suse.com>
2022-06-06xen/virtio: Enable restricted memory access using Xen grant mappingsJuergen Gross1-0/+11
In order to support virtio in Xen guests add a config option XEN_VIRTIO enabling the user to specify whether in all Xen guests virtio should be able to access memory via Xen grant mappings only on the host side. Also set PLATFORM_VIRTIO_RESTRICTED_MEM_ACCESS feature from the guest initialization code on Arm and x86 if CONFIG_XEN_VIRTIO is enabled. Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Link: https://lore.kernel.org/r/1654197833-25362-5-git-send-email-olekstysh@gmail.com Signed-off-by: Juergen Gross <jgross@suse.com>
2022-06-06ath11k: fix missing skb drop on htc_tx_completion errorChristian 'Ansuel' Marangi1-1/+3
On htc_tx_completion error the skb is not dropped. This is wrong since the completion_handler logic expect the skb to be consumed anyway even when an error is triggered. Not freeing the skb on error is a memory leak since the skb won't be freed anywere else. Correctly free the packet on eid >= ATH11K_HTC_EP_COUNT before returning. Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01208-QCAHKSWPL_SILICONZ-1 Fixes: f951380a6022 ("ath11k: Disabling credit flow for WMI path") Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com> Reviewed-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220528142516.20819-2-ansuelsmth@gmail.com
2022-06-06drm/mediatek: Add suffix 0 to DDP_COMPONENT_DITHER for mt8195 vdosys0jason-jh.lin2-6/+6
Because mt8195 vdosys0 has 2 DITHER components, so the suffix 0 need to be added to DDP_COMPONENT_DITHER. Then DITHER enum will become: DDP_COMPONENT_DITHER0 and DDP_COMPONENT_DITHER1. Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220526102126.19756-5-jason-jh.lin@mediatek.com/ Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-06-06drm/mediatek: Add mediatek-drm of vdosys0 support for mt8195jason-jh.lin3-9/+153
1. Add driver data of mt8195 vdosys0 to mediatek-drm and the sub driver. 2. Add get driver data function to identify which vdosys by io_start. Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220526102126.19756-4-jason-jh.lin@mediatek.com/ Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-06-06drm/mediatek: Add MERGE support for mediatek-drmjason-jh.lin7-1/+276
Add MERGE engine file: MERGE module is used to merge two slice-per-line inputs into one side-by-side output. Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220526102126.19756-3-jason-jh.lin@mediatek.com/ Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-06-06drm/mediatek: Add DSC support for mediatek-drmjason-jh.lin2-0/+48
DSC is designed for real-time systems with real-time compression, transmission, decompression and display. The DSC standard is a specification of the algorithms used for compressing and decompressing image display streams, including the specification of the syntax and semantics of the compressed video bit stream. Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220526102126.19756-2-jason-jh.lin@mediatek.com/ Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-06-06mtd: spinand: Add support for ATO25D1GAAidan MacDonald3-1/+88
Add support for the ATO25D1GA SPI NAND flash. Datasheet: - https://atta.szlcsc.com/upload/public/pdf/source/20191212/C469320_04599D67B03B078044EB65FF5AEDDDE9.pdf Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220604113250.4745-1-aidanmacdonald.0x0@gmail.com
2022-06-06mtd: rawnand: meson: Fix a potential double free issueChristophe JAILLET1-1/+0
When meson_nfc_nand_chip_cleanup() is called, it will call: meson_nfc_free_buffer(&meson_chip->nand); nand_cleanup(&meson_chip->nand); nand_cleanup() in turn will call nand_detach() which calls the .detach_chip() which is here meson_nand_detach_chip(). meson_nand_detach_chip() already calls meson_nfc_free_buffer(), so we could double free some memory. Fix it by removing the unneeded explicit call to meson_nfc_free_buffer(). Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/ec15c358b8063f7c50ff4cd628cf0d2e14e43f49.1653064877.git.christophe.jaillet@wanadoo.fr
2022-06-06mtd: rawnand: cafe: fix drivers probe/remove methodsPeng Wu1-2/+7
Driver should call pci_disable_device() if it returns from cafe_nand_probe() with error. Meanwhile, the driver calls pci_enable_device() in cafe_nand_probe(), but never calls pci_disable_device() during removal. Signed-off-by: Peng Wu <wupeng58@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220520084425.116686-1-wupeng58@huawei.com
2022-06-06mtd: maps: Fix refcount leak in ap_flash_initMiaoqian Lin1-0/+1
of_find_matching_node() returns a node pointer with refcount incremented, we should use of_node_put() on it when not need anymore. Add missing of_node_put() to avoid refcount leak. Fixes: b0afd44bc192 ("mtd: physmap_of: add a hook for Versatile write protection") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220523143255.4376-1-linmq006@gmail.com
2022-06-06mtd: maps: Fix refcount leak in of_flash_probe_versatileMiaoqian Lin1-0/+1
of_find_matching_node_and_match() returns a node pointer with refcount incremented, we should use of_node_put() on it when not need anymore. Add missing of_node_put() to avoid refcount leak. Fixes: b0afd44bc192 ("mtd: physmap_of: add a hook for Versatile write protection") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220523140205.48625-1-linmq006@gmail.com