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2022-04-25scsi: ufs: Remove the driver versionBart Van Assche5-5/+0
The current version number is 0.2. That driver version was assigned more than nine years ago. A version number that is not updated while the driver is updated is not useful. Hence remove the driver version number from the UFS driver. See also commit e0eca63e3421 ("[SCSI] ufs: Separate PCI code into glue driver"). Link: https://lore.kernel.org/r/20220419225811.4127248-16-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Make the config_scaling_param calls type safeBart Van Assche2-15/+9
Pass the actual type to config_scaling_param callback as the third argment instead of a void pointer. Remove a superfluous NULL pointer check from ufs_qcom_config_scaling_param(). Link: https://lore.kernel.org/r/20220419225811.4127248-15-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Switch to aggregate initializationBart Van Assche1-12/+14
Make it easier to verify for humans that ufshcd_init_pwr_dev_param() initializes all structure members. This patch does not change any functionality. Link: https://lore.kernel.org/r/20220419225811.4127248-14-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Remove unused constants and codeBart Van Assche2-37/+3
Commit 5b44a07b6bb2 ("scsi: ufs: Remove pre-defined initial voltage values of device power") removed the code that uses the UFS_VREG_VCC* constants and also the code that sets the min_uV and max_uV member variables. Hence also remove these constants and that member variable. Link: https://lore.kernel.org/r/20220419225811.4127248-13-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Invert the return value of ufshcd_is_hba_active()Bart Van Assche1-5/+4
It is confusing that ufshcd_is_hba_active() returns 'true' if the HBA is not active. Clear up this confusion by inverting the return value of ufshcd_is_hba_active(). This patch does not change any functionality. Link: https://lore.kernel.org/r/20220419225811.4127248-12-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Declare the quirks array constBart Van Assche4-6/+8
Declare the quirks array and also its 'model' member const to make it explicit that these are not modified. Link: https://lore.kernel.org/r/20220419225811.4127248-11-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Rename struct ufs_dev_fix into ufs_dev_quirkBart Van Assche4-7/+7
Since struct ufs_dev_fix contains quirk information, rename it into struct ufs_dev_quirk. Link: https://lore.kernel.org/r/20220419225811.4127248-10-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Remove the UFS_FIX() and END_FIX() macrosBart Van Assche3-32/+32
Since these two macros reduce code readability, remove them. Link: https://lore.kernel.org/r/20220419225811.4127248-9-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Use get_unaligned_be16() instead of be16_to_cpup()Bart Van Assche1-1/+1
Use get_unaligned_be16(...) instead of the equivalent but harder to read be16_to_cpup((__be16 *)...). Link: https://lore.kernel.org/r/20220419225811.4127248-8-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Remove ufshcd_lrb.sense_bufferBart Van Assche2-7/+4
ufshcd_lrb.sense_buffer is NULL if ufshcd_lrb.cmd is NULL and ufshcd_lrb.sense_buffer points at cmd->sense_buffer if ufshcd_lrb.cmd is set. In other words, the ufshcd_lrb.sense_buffer member is identical to cmd->sense_buffer. Hence this patch that removes the ufshcd_lrb.sense_buffer structure member. Link: https://lore.kernel.org/r/20220419225811.4127248-7-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Remove ufshcd_lrb.sense_bufflenBart Van Assche2-5/+0
ufshcd_lrb.sense_bufflen is set but never read. Hence remove this struct member. Link: https://lore.kernel.org/r/20220419225811.4127248-6-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Keoseong Park <keosung.park@samsung.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Simplify statements that return a booleanBart Van Assche3-27/+8
Convert "if (expr) return true; else return false;" into "return expr;" if either 'expr' is a boolean expression or the return type of the function is 'bool'. Link: https://lore.kernel.org/r/20220419225811.4127248-5-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Keoseong Park <keosung.park@samsung.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Remove superfluous boolean conversionsBart Van Assche3-8/+6
Remove "? true : false" if the preceding expression yields a boolean or if the result of the expression is assigned to a boolean since in these two cases the "? true : false" part is superfluous. Link: https://lore.kernel.org/r/20220419225811.4127248-4-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Declare ufshcd_wait_for_register() staticBart Van Assche2-4/+1
Declare this function static since it is only used inside the ufshcd.c source file. Link: https://lore.kernel.org/r/20220419225811.4127248-3-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: Fix a spelling error in a source code commentBart Van Assche1-1/+1
Change one occurrence of "adpater" into "adapter". Link: https://lore.kernel.org/r/20220419225811.4127248-2-bvanassche@acm.org Tested-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: ufs: core: Increase fDeviceInit poll frequencyKonstantin Vyshetsky1-1/+1
UFS devices are expected to clear fDeviceInit flag in single digit milliseconds. Current values of 5 to 10 millisecond sleep add to increased latency during the initialization and resume path. This CL lowers the sleep range to 500 to 1000 microseconds. Link: https://lore.kernel.org/r/20220421002429.3136933-1-bvanassche@acm.org Acked-by: Avri Altman <avri.altman@wdc.com> Signed-off-by: Konstantin Vyshetsky <vkon@google.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: target: core: Silence the message about unknown VPD pagesKonstantin Shelekhin1-1/+1
Target does not support some VPD pages and is very verbose about it. Sometimes initiators don't bother and just keep sending the same request from time to time, filling up the logs. This patch lowers the message priority to debug. Link: https://lore.kernel.org/r/20220418212622.275516-1-k.shelekhin@yadro.com Signed-off-by: Konstantin Shelekhin <k.shelekhin@yadro.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25null-blk: save memory footprint for struct nullb_cmdYu Kuai1-3/+5
Total 16 bytes can be saved in two ways: 1) The field 'bio' will only be used in bio based mode, and the field 'rq' will only be used in mq mode. Since they won't be used in the same time, declare a union for them. 2) The field 'bool fake_timeout' can be placed in the hole after the field 'error'. Signed-off-by: Yu Kuai <yukuai3@huawei.com> Link: https://lore.kernel.org/r/20220426022133.3999006-1-yukuai3@huawei.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-04-25scsi: mpt3sas: Fix adapter replyPostRegisterIndex declarationDamien Le Moal2-5/+6
The replyPostRegisterIndex array of struct MPT3SAS_ADAPTER stores iomem resource addresses. Fix its declaration to annotate it with __iomem to avoid sparse warnings for writel() calls using the stored addresses. Link: https://lore.kernel.org/r/20220307234854.148145-6-damien.lemoal@opensource.wdc.com Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: mpt3sas: Fix event callback log_code value handlingDamien Le Moal1-3/+3
In mpt3sas_scsih_event_callback(), fix a sparse warning when testing the event log code value by replacing the use of a pointer to the address storing the event log code with a log code local variable. Doing so, le32_to_cpu() is used when the log code value is assigned, avoiding a sparse warning. Link: https://lore.kernel.org/r/20220307234854.148145-5-damien.lemoal@opensource.wdc.com Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: mpt3sas: Fix ioc->base_readl() useDamien Le Moal1-7/+6
The functions _base_readl_aero() and _base_readl() used for an adapter base_readl() method are implemented using a regular readl() call which internally performs a conversion to CPU endianness (le32_to_cpu()) of the values read. The users of the ioc base_readl() method should thus not convert again the values read using le16_to_cpu(). Fixing this removes sparse warnings. Link: https://lore.kernel.org/r/20220307234854.148145-4-damien.lemoal@opensource.wdc.com Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: mpt3sas: Fix writel() useDamien Le Moal1-5/+5
writel() internally executes cpu_to_le32() to convert the value being written to little endian. The caller should thus not use this conversion function for the value passed to writel(). Remove the cpu_to_le32() calls in _base_put_smid_scsi_io_atomic(), _base_put_smid_fast_path_atomic(), _base_put_smid_hi_priority_atomic() _base_put_smid_default_atomic() and _base_handshake_req_reply_wait(). Link: https://lore.kernel.org/r/20220307234854.148145-3-damien.lemoal@opensource.wdc.com Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: mpt3sas: Fix _ctl_set_task_mid() TaskMID checkDamien Le Moal1-5/+6
The TaskMID field of struct Mpi2SCSITaskManagementRequest_t is a 16-bit little endian value. Fix the search loop in _ctl_set_task_mid() to add a cpu_to_le16() conversion before checking the value of TaskMID to avoid sparse warnings. While at it, simplify the search loop code to remove an unnecessarily complicated if condition. Link: https://lore.kernel.org/r/20220307234854.148145-2-damien.lemoal@opensource.wdc.com Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25scsi: qla2xxx: Remove free_sg command flagGleb Chesnokov2-3/+0
The use of the free_sg command flag was dropped in commit 2c39b5ca2a8c ("qla2xxx: Remove SRR code"). Hence remove this flag and its check. Link: https://lore.kernel.org/r/AS8PR10MB4952747D20B76DC8FE793CCA9DEE9@AS8PR10MB4952.EURPRD10.PROD.OUTLOOK.COM Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com> Signed-off-by: Gleb Chesnokov <Chesnokov.G@raidix.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2022-04-25clk: mediatek: Add MT8186 ipesys clock supportChun-Jie Chen2-1/+56
Add MT8186 ipesys clock controller which provides clock gate control for Image Process Engine. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-16-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 mdpsys clock supportChun-Jie Chen2-1/+81
Add MT8186 mdpsys clock controller which provides clock gate control in Multimedia Data Path. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-15-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 camsys clock supportChun-Jie Chen2-1/+92
Add MT8186 camsys clock controllers which provide clock gate control for camera IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-14-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 vencsys clock supportChun-Jie Chen2-1/+52
Add MT8186 vencsys clock controller which provide clock gate control for video encoder. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-13-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 vdecsys clock supportChun-Jie Chen2-1/+89
Add MT8186 vdec clock controller which provide clock gate control for video decoder. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-12-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 imgsys clock supportChun-Jie Chen2-1/+70
Add MT8186 imgsys clock controllers which provide clock gate control for image IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-11-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 wpesys clock supportChun-Jie Chen2-1/+52
Add MT8186 wpesys clock controllers which provide clock gate control in Wrapping Engine. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-10-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 mmsys clock supportChun-Jie Chen2-1/+112
Add MT8186 mmsys clock controller which provides clock gate control in video system. This is integrated with mtk-mmsys driver which will populate device by platform_device_register_data to start mmsys clock driver. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-9-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 mfgsys clock supportChun-Jie Chen2-1/+50
Add MT8186 mfg clock controller which provides clock gate control for GPU. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-8-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 imp i2c wrapper clock supportChun-Jie Chen2-1/+68
Add MT8186 imp i2c wrapper clock controllers which provide clock gate control in i2c IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-7-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 apmixedsys clock supportChun-Jie Chen2-1/+135
Add MT8186 apmixedsys clock controller which provides Plls generated from SoC. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-6-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 infrastructure clock supportChun-Jie Chen2-1/+217
Add MT8186 infrastructure clock controller which provides clock gate control for basic IP like pwm, uart, spi and so on. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-5-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 topckgen clock supportChun-Jie Chen2-1/+781
Add MT8186 topckgen clock controller which provides muxes, dividers to handle variety clock selection in other IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-4-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mediatek: Add MT8186 mcusys clock supportChun-Jie Chen3-0/+117
Add MT8186 mcusys clock controller which provides muxes to select the clock source of APMCU. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220409132251.31725-3-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25Merge tag 'sunxi-clk-fixes-for-5.18-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixesStephen Boyd2-0/+4
Pull Allwinner clk fixes from Jernej Skrabec: - Add missing sentinel - check return value for platform_get_resource() - mark rtc-32k as critical * tag 'sunxi-clk-fixes-for-5.18-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi: sun9i-mmc: check return value after calling platform_get_resource() clk: sunxi-ng: sun6i-rtc: Mark rtc-32k as critical clk: sunxi-ng: fix not NULL terminated coccicheck error
2022-04-25clk: ux500: Implement the missing CLKOUT clocksLinus Walleij3-7/+199
This implements the two missing CLKOUT clocks for the ux500 (well really U8500/DB8500) SoC. The clocks are initialized using a specific parent and divider and these are specified in the device tree, see the separate binding patch. The implementation is a bit different in that it will only create the clock in the clock framework if a user appears in the device tree, rather than it being registered upfront like most of the other clocks. This is because the clock needs parameters for source and divider from the consumer phandle for the clock to be set up properly when the clock is registered. There could be more than one user of a CLKOUT clock, but we have not seen this in practice. If this happens the framework prints and info and returns the previously registered clock. Using the clocks requires also muxing the CLKOUT1 or CLKOUT2 to the appropriate pad. In practice this is achived in a pinctrl handle in the DTS node for the device using the CLKOUT clock, so this muxing is done separately from the clock itself. Example: haptic@49 { compatible = "immersion,isa1200"; reg = <0x49>; (...) /* clkout1 from ACLK divided by 8 */ clocks = <&clkout_clk DB8500_CLKOUT_1 DB8500_CLKOUT_SRC_ACLK 8>; pinctrl-names = "default"; pinctrl-0 = <&isa1200_janice_default>; }; isa1200_janice_default: isa1200_janice { /* Bring out clkout1 on pin GPIO227 pin AH7 */ janice_mux { function = "clkout"; groups = "clkout1_a_1"; }; janice_cfg1 { pins = "GPIO227_AH7"; ste,config = <&out_lo>; }; (...) This was tested successfully with the Immersion ISA1200 haptic feedback unit on the Samsung Galaxy S Advance GT-I9070 (Janice) mobile phone. As the CLKOUT clocks need some undefined fixed rate parent clocks that are currently missing from the PRCMU clock implementation, the three simplest are added in this patch: clk38m_to_clkgen, aclk and sysclk. The only parent not yet available in the implementation is clk009, which is a kind of special muxed and divided clock which isn't even implemented in the vendor clock driver. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220414221751.323525-6-linus.walleij@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: ux500: Rewrite PRCMU clocks to use clk_hw_*Linus Walleij3-208/+182
This rewrites all the u8500 PRCMU clocks and helper functions to handle clocks using struct clk_hw rather than struct clk, as is normal for modern clock drivers. Use clk_hw_register(), of_clk_add_hw_provider() and stack all the clocks into a compile-time dynamic array of struct clk_hw_onecell_data. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220414221751.323525-5-linus.walleij@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: ux500: Drop .is_prepared state from PRCMU clocksLinus Walleij1-27/+2
The core already keeps a software prepare count. Drop this custom software prepare count. The only semantic difference is that if disabling the clock fails, .is_prepared() will still return 1, but this will only serve to confuse the framework, the error message is sufficient. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220414221751.323525-4-linus.walleij@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: ux500: Drop .is_enabled state from PRCMU clocksLinus Walleij1-35/+0
The core already keeps a software enable count. Drop this custom software enable count. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220414221751.323525-3-linus.walleij@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-25clk: mux: remove redundant initialization of variable widthColin Ian King1-2/+2
Variable width is being ininitialized with a value that is never read. The ininitializtion is redundant and can be removed. Move the variable to the scope it is required. Cleans up cppcheck warning: Variable 'width' is assigned a value that is never used. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20220424182227.1364966-1-colin.i.king@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-04-26drm: mxsfb: Obtain bus flags from bridge stateMarek Vasut1-2/+5
In case the MXSFB is connected to a bridge, attempt to obtain bus flags from that bridge state too. The bus flags may specify e.g. the DE signal polarity. Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220417021011.337066-1-marex@denx.de
2022-04-26drm: mxsfb: Reorder mxsfb_crtc_mode_set_nofb()Marek Vasut1-9/+9
Reorder mxsfb_crtc_mode_set_nofb() such that all functions which perform register IO are called from one single location in this function. This is a clean up. No functional change. Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Acked-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220417020800.336675-4-marex@denx.de
2022-04-26drm: mxsfb: Factor out mxsfb_set_mode()Marek Vasut1-44/+52
Pull mode registers programming from mxsfb_enable_controller() into dedicated function mxsfb_set_mode(). This is a clean up. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Acked-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220417020800.336675-3-marex@denx.de
2022-04-26drm: mxsfb: Replace mxsfb_get_fb_paddr() with drm_fb_cma_get_gem_addr()Marek Vasut1-18/+7
Replace mxsfb_get_fb_paddr() with drm_fb_cma_get_gem_addr() to correctly handle FB offset. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Acked-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220417020800.336675-2-marex@denx.de
2022-04-26drm: mxsfb: Wrap FIFO reset and comments into mxsfb_reset_block()Marek Vasut1-16/+20
Wrap FIFO reset and comments into mxsfb_reset_block(), this is a clean up. No functional change. Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Acked-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220417020800.336675-1-marex@denx.de
2022-04-26drm/msm/dsi: Add support for DSC configurationVinod Koul1-1/+97
When DSC is enabled, we need to configure DSI registers accordingly and configure the respective stream compression registers. Add support to calculate the register setting based on DSC params and timing information and configure these registers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/480934/ Link: https://lore.kernel.org/r/20220406094031.1027376-15-vkoul@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>