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2022-04-11drm/msm: Fix range size vs end confusionRob Clark1-1/+1
The fourth param is size, rather than range_end. Note that we could increase the address space size if we had a way to prevent buffers from spanning a 4G split, mostly just to avoid fw bugs with 64b math. Fixes: 84c31ee16f90 ("drm/msm/a6xx: Add support for per-instance pagetables") Signed-off-by: Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20220407202836.1211268-1-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-04-11PCI/PM: Avoid putting Elo i2 PCIe Ports in D3coldRafael J. Wysocki1-0/+10
If a Root Port on Elo i2 is put into D3cold and then back into D0, the downstream device becomes permanently inaccessible, so add a bridge D3 DMI quirk for that system. This was exposed by 14858dcc3b35 ("PCI: Use pci_update_current_state() in pci_enable_device_flags()"), but before that commit the Root Port in question had never been put into D3cold for real due to a mismatch between its power state retrieved from the PCI_PM_CTRL register (which was accessible even though the platform firmware indicated that the port was in D3cold) and the state of an ACPI power resource involved in its power management. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=215715 Link: https://lore.kernel.org/r/11980172.O9o76ZdvQC@kreacher Reported-by: Stefan Gottwald <gottwald@igel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: stable@vger.kernel.org # v5.15+
2022-04-11remoteproc: Don't bother checking the return value of debugfs_create*Manivannan Sadhasivam2-19/+2
DebugFS APIs are designed to return only the error pointers and not NULL in the case of failure. So these return pointers are safe to be passed on to the successive debugfs_create* APIs. Therefore, let's just get rid of the checks. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20220329154616.58902-1-manivannan.sadhasivam@linaro.org Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2022-04-11virt: sevguest: Fix return value check in alloc_shared_pages()Yang Yingliang1-1/+1
If alloc_pages() fails, it returns a NULL pointer. Replace the wrong IS_ERR() check with the proper NULL pointer check. Fixes: fce96cf04430 ("virt: Add SEV-SNP guest driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Brijesh Singh <brijesh.singh@amd.com> Link: https://lore.kernel.org/r/20220411111213.1477853-1-yangyingliang@huawei.com
2022-04-11remoteproc: mediatek: Fix side effect of mt8195 sram power onTinghan Shen2-17/+54
The definition of L1TCM_SRAM_PDN bits on mt8195 is different to mt8192. L1TCM_SRAM_PDN bits[3:0] control the power of mt8195 L1TCM SRAM. L1TCM_SRAM_PDN bits[7:4] control the access path to EMI for SCP. These bits have to be powered on to allow EMI access for SCP. Bits[7:4] also affect audio DSP because audio DSP and SCP are placed on the same hardware bus. If SCP cannot access EMI, audio DSP is blocked too. L1TCM_SRAM_PDN bits[31:8] are not used. This fix removes modification of bits[7:4] when power on/off mt8195 SCP L1TCM. It's because the modification introduces a short period of time blocking audio DSP to access EMI. This was not a problem until we have to load both SCP module and audio DSP module. audio DSP needs to access EMI because it has source/data on DRAM. Audio DSP will have unexpected behavior when it accesses EMI and the SCP driver blocks the EMI path at the same time. Fixes: 79111df414fc ("remoteproc: mediatek: Support mt8195 scp") Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220321060340.10975-1-tinghan.shen@mediatek.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2022-04-11drm/ingenic: Add dw-hdmi driver specialization for jz4780Paul Boddie3-0/+113
A specialisation of the generic Synopsys HDMI driver is employed for JZ4780 HDMI support. This requires a new driver, plus device tree and configuration modifications. Here we add Kconfig DRM_INGENIC_DW_HDMI, Makefile and driver code. Note that there is no hpd-gpio installed on the CI20 board HDMI connector. Hence there is no hpd detection by the connector driver and we have to enable polling in the dw-hdmi core driver. For that we need to set .poll_enabled but that struct component can only be accessed by core code. Hence we use the public setter function drm_kms_helper_hotplug_event() introduced before. Also note that we disable Color Space Conversion since it is not working on jz4780. Signed-off-by: Paul Boddie <paul@boddie.org.uk> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://patchwork.freedesktop.org/patch/msgid/e5cdf9cd44bde52cce379cc830f2d6117ea15c32.1649330171.git.hns@goldelico.com
2022-04-11drm/ingenic: Implement proper .atomic_get_input_bus_fmtsPaul Cercueil1-1/+27
The .atomic_get_input_bus_fmts() callback of our top bridge should return the possible input formats for a given output format. If the requested output format is not supported, then NULL should be returned, otherwise the bus format negociation will end with a bus format that the encoder does not support. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://patchwork.freedesktop.org/patch/msgid/ab25925723cff2f3e773e7137567ef86fff5fdba.1649330171.git.hns@goldelico.com
2022-04-11drm/bridge: display-connector: add ddc-en gpio supportH. Nikolaus Schaller1-0/+15
"hdmi-connector.yaml" bindings defines an optional property "ddc-en-gpios" for a single gpio to enable DDC operation. Usually this controls +5V power on the HDMI connector. This +5V may also be needed for HPD. This was not reflected in code but is needed to make the CI20 board work. Now, the driver activates the ddc gpio after probe and deactivates after remove so it is "almost on". But only if this driver is loaded (and not e.g. blacklisted as module). Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://patchwork.freedesktop.org/patch/msgid/3607e924b7c0cf0be956c0d49894be1442dbda41.1649330171.git.hns@goldelico.com
2022-04-11HID: uclogic: Add support for Huion touch ring reportsNikolai Kondrashov3-20/+105
Support touch ring reports found in Huion HS610 to the UC-Logic driver. Signed-off-by: Nikolai Kondrashov <spbnick@gmail.com> Signed-off-by: José Expósito <jose.exposito89@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2022-04-11HID: uclogic: Allow three frame parameter setsNikolai Kondrashov1-5/+47
Allow three frame parameter sets per each UC-Logic tablet interface. Bump the number of supported subreports to three as well to accommodate ID routing. This allows supporting the dial on Huion Q620M. Signed-off-by: Nikolai Kondrashov <spbnick@gmail.com> Signed-off-by: José Expósito <jose.exposito89@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2022-04-11HID: uclogic: Support custom device suffix for framesNikolai Kondrashov2-20/+30
Support assigning custom device name suffixes to frame input devices instead of just "Pad". This allows distinguishing multiple frame input devices, e.g. for Huion HS610. Signed-off-by: Nikolai Kondrashov <spbnick@gmail.com> Signed-off-by: José Expósito <jose.exposito89@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2022-04-11HID: uclogic: Add support for touch ring reportsNikolai Kondrashov2-5/+70
Add support for touch ring to UC-Logic driver. The touch ring reports can be flipped around a specific point to match the orientation and direction reported by the Wacom drivers. The proximity will also be reported similar to the Wacom drivers. Signed-off-by: Nikolai Kondrashov <spbnick@gmail.com> Signed-off-by: José Expósito <jose.exposito89@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2022-04-11phy: phy-can-transceiver: Add support for setting muxAswath Govindraju2-0/+23
On some boards, for routing CAN signals from controller to transceiver, muxes might need to be set. Therefore, add support for setting the mux by reading the mux-states property from the device tree node. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Link: https://lore.kernel.org/r/20220408111316.21189-1-a-govindraju@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11mac80211: prepare sta handling for MLO supportSriram R75-740/+757
Currently in mac80211 each STA object is represented using sta_info datastructure with the associated STA specific information and drivers access ieee80211_sta part of it. With MLO (Multi Link Operation) support being added in 802.11be standard, though the association is logically with a single Multi Link capable STA, at the physical level communication can happen via different advertised links (uniquely identified by Channel, operating class, BSSID) and hence the need to handle multiple link STA parameters within a composite sta_info object called the MLD STA. The different link STA part of MLD STA are identified using the link address which can be same or different as the MLD STA address and unique link id based on the link vif. To support extension of such a model, the sta_info datastructure is modified to hold multiple link STA objects with link specific params currently within sta_info moved to this new structure. Similarly this is done for ieee80211_sta as well which will be accessed within mac80211 as well as by drivers, hence trivial driver changes are expected to support this. For current non MLO supported drivers, only one link STA is present and link information is accessed via 'deflink' member. For MLO drivers, we still need to define the APIs etc. to get the correct link ID and access the correct part of the station info. Currently in mac80211, all link STA info are accessed directly via deflink. These will be updated to access via link pointers indexed by link id with MLO support patches, with link id being 0 for non MLO supported cases. Except for couple of macro related changes, below spatch takes care of updating mac80211 and driver code to access to the link STA info via deflink. @ieee80211_sta@ struct ieee80211_sta *s; struct sta_info *si; identifier var = {supp_rates, ht_cap, vht_cap, he_cap, he_6ghz_capa, eht_cap, rx_nss, bandwidth, txpwr}; @@ ( s-> - var + deflink.var | si->sta. - var + deflink.var ) @sta_info@ struct sta_info *si; identifier var = {gtk, pcpu_rx_stats, rx_stats, rx_stats_avg, status_stats, tx_stats, cur_max_bandwidth}; @@ ( si-> - var + deflink.var ) Signed-off-by: Sriram R <quic_srirrama@quicinc.com> Link: https://lore.kernel.org/r/1649086883-13246-1-git-send-email-quic_srirrama@quicinc.com [remove MLO-drivers notes from commit message, not clear yet; run spatch] Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-04-11phy: ti: tusb1210: Make tusb1210_chg_det_states staticHans de Goede1-1/+1
Make tusb1210_chg_det_states static, fixing the following sparse warning: drivers/phy/ti/phy-tusb1210.c:158:12: sparse: sparse: symbol 'tusb1210_chg_det_states' was not declared. Should it be static? Fixes: 48969a5623ed ("phy: ti: tusb1210: Add charger detection") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220411135440.558394-1-hdegoede@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: Remove a useless mutexChristophe JAILLET1-7/+0
According to lib/idr.c, The IDA handles its own locking. It is safe to call any of the IDA functions without synchronisation in your code. so the 'chan_mutex' mutex can just be removed. It is here only to protect some ida_alloc()/ida_free() calls. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/7180452c1d77b039e27b6f9418e0e7d9dd33c431.1644140845.git.christophe.jaillet@wanadoo.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: imx-sdma: Fix error checking in sdma_event_remapMiaoqian Lin1-2/+2
of_parse_phandle() returns NULL on errors, rather than error pointers. Using NULL check on grp_np to fix this. Fixes: d078cd1b4185 ("dmaengine: imx-sdma: Add imx6sx platform support") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220308064952.15743-1-linmq006@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: tegra: Add tegra gpcdma driverAkhil R3-0/+1519
Adding GPC DMA controller driver for Tegra. The driver supports dma transfers between memory to memory, IO peripheral to memory and memory to IO peripheral. Co-developed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Co-developed-by: Rajesh Gumasta <rgumasta@nvidia.com> Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com> Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220225132044.14478-3-akhilrajeev@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11drm/ttm: fix logic inversion in ttm_eu_reserve_buffersChristian König1-1/+1
That should have been max, not min. Signed-off-by: Christian König <christian.koenig@amd.com> Fixes: c8d4c18bfbc4 ("dma-buf/drivers: make reserving a shared slot mandatory v4") Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220411134537.2854-1-christian.koenig@amd.com
2022-04-11RDMA/hns: Init the variable at the suitable placeHaoyue Xu1-1/+2
Assigning a value to ret in the init statement of a for-loop makes the code less readable. Link: https://lore.kernel.org/r/20220409083254.9696-6-liangwenpeng@huawei.com Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-04-11RDMA/hns: Add judgment on the execution result of CMDQ that free vf resourceWenpeng Liang1-4/+13
CDMQ may fail to execute, so its return value should not be ignored. Link: https://lore.kernel.org/r/20220409083254.9696-5-liangwenpeng@huawei.com Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-04-11RDMA/hns: Remove redundant variable "ret"Guofeng Yue1-4/+1
It is completely redundant for this function to use "ret" to store the return value of the subfunction. Link: https://lore.kernel.org/r/20220409083254.9696-4-liangwenpeng@huawei.com Signed-off-by: Guofeng Yue <yueguofeng@hisilicon.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-04-11RDMA/hns: Remove unused function to_hns_roce_state()Yixing Liu2-31/+0
This function is only used in HIP06, which has been removed. So remove it. Link: https://lore.kernel.org/r/20220409083254.9696-3-liangwenpeng@huawei.com Signed-off-by: Yixing Liu <liuyixing1@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-04-11RDMA/hns: Remove unnecessary check for the sgid_attr when modifying QPChengchang Tang1-3/+1
The sgid_attr cannot be null in this scenario. This judgment is redundant. Fixes: 606bf89e98ef ("RDMA/hns: Refactor for hns_roce_v2_modify_qp function") Link: https://lore.kernel.org/r/20220409083254.9696-2-liangwenpeng@huawei.com Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-04-11dmaengine: idxd: remove trailing white space on input str for wq nameDave Jiang1-2/+8
Add string processing with strim() in order to remove trailing white spaces that may be input by user for the wq->name. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/164789525123.2799661.13795829125221129132.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11drm/i915: Swap ret and status returned from skl_pcode_requestStanislav Lisovskiy1-1/+1
If ret isn't zero, it is almost for sure ETIMEDOUT, because we use it in wait_for macro which does continuous retries until timeout is reached. If we still ran out of time and retries, we most likely would be interested in getting status, to understand what was the actual error propagated from PCode, rather than to find out that we had a time out, which is anyway quite obvious, if the function fails. v2: Make it status ? status : ret(thanks Vinod for the hint) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220411081343.18099-1-stanislav.lisovskiy@intel.com
2022-04-11drm/i915: Fix skl_pcode_try_request functionStanislav Lisovskiy1-1/+1
Currently skl_pcode_try_request function doesn't properly handle return value it gets from snb_pcode_rw, but treats status != 0 as success, returning true, which basically doesn't allow to use retry/timeout mechanisms if PCode happens to be busy and returns EGAIN or some other status code not equal to 0. We saw this on real hw and also tried simulating this by always returning -EAGAIN from snb_pcode_rw for 6 times, which currently will just result in false success, while it should have tried until timeout is reached: [ 22.357729] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Changing CDCLK to 307200 kHz, VCO 614400 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0 [ 22.357831] i915 0000:00:02.0: [drm:__snb_pcode_rw [i915]] Returning EAGAIN retry 1 [ 22.357892] i915 0000:00:02.0: [drm:skl_pcode_request [i915]] Success, exiting [ 22.357936] i915 0000:00:02.0: [drm] ERROR Failed to inform PCU about cdclk change (err -11, freq 307200) We see en error because higher level api, still notices that status was wrong, however we still did try only once. We fix it by requiring _both_ the status to be 0 and request/reply match for success(true) and function should return failure(false) if either status turns out to be EAGAIN, EBUSY or whatever or reply/request masks do not match. So now we see this in the logs: [ 22.318667] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Changing CDCLK to 307200 kHz, VCO 614400 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0 [ 22.318782] i915 0000:00:02.0: [drm:__snb_pcode_rw [i915]] Returning EAGAIN retry 1 [ 22.318849] i915 0000:00:02.0: [drm:__snb_pcode_rw [i915]] Returning EAGAIN retry 2 [ 22.319006] i915 0000:00:02.0: [drm:__snb_pcode_rw [i915]] Returning EAGAIN retry 3 [ 22.319091] i915 0000:00:02.0: [drm:__snb_pcode_rw [i915]] Returning EAGAIN retry 4 [ 22.319158] i915 0000:00:02.0: [drm:__snb_pcode_rw [i915]] Returning EAGAIN retry 5 [ 22.319224] i915 0000:00:02.0: [drm:__snb_pcode_rw [i915]] Returning EAGAIN retry 6 Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220408125200.9069-2-stanislav.lisovskiy@intel.com
2022-04-11soc: ti: pruss: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-2/+1
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Dave Gerlach <d-gerlach@ti.com> Link: https://lore.kernel.org/r/20220408080853.2494292-1-chi.minghao@zte.com.cn
2022-04-11soc: ti: replace usage of found with dedicated list iterator variableJakob Koschel2-23/+19
To move the list iterator variable into the list_for_each_entry_*() macro in the future it should be avoided to use the list iterator variable after the loop body. To *never* use the list iterator variable after the loop it was concluded to use a separate iterator variable instead of a found boolean [1]. This removes the need to use a found variable and simply checking if the variable was set, can determine if the break/goto was hit. Signed-off-by: Jakob Koschel <jakobkoschel@gmail.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/all/CAHk-=wgRr_D8CB-D9Kg-c=EHreAsk5SqXPwr9Y7k9sA6cWXJ6w@mail.gmail.com/ Link: https://lore.kernel.org/r/20220324072503.63244-1-jakobkoschel@gmail.com
2022-04-11soc: ti: wkup_m3_ipc: fix platform_get_irq.cocci warningYihao Han1-3/+1
Remove dev_err() messages after platform_get_irq*() failures. platform_get_irq() already prints an error. Generated by: scripts/coccinelle/api/platform_get_irq.cocci Signed-off-by: Yihao Han <hanyihao@vivo.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220303124444.3373-1-hanyihao@vivo.com
2022-04-11drm: add a check to verify the size alignmentArunpravin Paneer Selvam1-0/+3
Add a simple check to reject any size not aligned to the min_page_size. when size is not aligned to min_page_size, driver module should handle in their own way either to round_up() the size value to min_page_size or just to enable WARN_ON(). If we dont handle the alignment properly, we may hit the following bug, Unigine Heaven has allocation requests for example required pages are 257 and alignment request is 256. To allocate the left over 1 page, continues the iteration to find the order value which is 0 and when it compares with min_order = 8, triggers the BUG_ON(order < min_order). v2: add more commit description v3: remove WARN_ON() Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Suggested-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220411073834.15210-1-Arunpravin.PaneerSelvam@amd.com Signed-off-by: Christian König <christian.koenig@amd.com>
2022-04-11dma: at_xdmac: fix a missing check on list iteratorXiaomeng Tong1-5/+7
The bug is here: __func__, desc, &desc->tx_dma_desc.phys, ret, cookie, residue); The list iterator 'desc' will point to a bogus position containing HEAD if the list is empty or no element is found. To avoid dev_dbg() prints a invalid address, use a new variable 'iter' as the list iterator, while use the origin variable 'desc' as a dedicated pointer to point to the found element. Cc: stable@vger.kernel.org Fixes: 82e2424635f4c ("dmaengine: xdmac: fix print warning on dma_addr_t variable") Signed-off-by: Xiaomeng Tong <xiam0nd.tong@gmail.com> Link: https://lore.kernel.org/r/20220327061154.4867-1-xiam0nd.tong@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: stm32-mdma: check the channel availability (secure or not)Amelie Delaunay1-1/+20
STM32_MDMA_CCR bit[8] is used to enable Secure Mode (SM). If this bit is set, it means that all the channel registers are write-protected. So the channel is not available for Linux use. Add stm32_mdma_filter_fn() callback filter and give it to __dma_request_chan (instead of dma_get_any_slave_channel()), to exclude the channel if it is marked Secure. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20220330103645.99969-1-amelie.delaunay@foss.st.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11mac80211: introduce BSS color collision detectionLorenzo Bianconi1-1/+4
Add ieee80211_rx_check_bss_color_collision routine in order to introduce BSS color collision detection in mac80211 if it is not supported in HW/FW (e.g. for mt7915 chipset). Add IEEE80211_HW_DETECTS_COLOR_COLLISION flag to let the driver notify BSS color collision detection is supported in HW/FW. Set this for ath11k which apparently didn't need this code. Tested-by: Peter Chiu <Chui-Hao.Chiu@mediatek.com> Co-developed-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/a05eeeb1841a84560dc5aaec77894fcb69a54f27.1648204871.git.lorenzo@kernel.org [clarify commit message a bit, move flag to mac80211] Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-04-11Merge drm/drm-next into drm-intel-nextJani Nikula5488-106612/+257788
Sync up with v5.18-rc1, in particular to get 5e3094cfd9fb ("drm/i915/xehpsdv: Add has_flat_ccs to device info"). Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2022-04-11PCI: tegra194: Remove unnecessary MSI enable reg save and restoreJisheng Zhang1-9/+0
The integrated MSI Receiver enable register is always initialized in dw_pcie_setup_rc() which is also called in resume code path, so we don't need to save/restore the enable register during suspend/resume. Link: https://lore.kernel.org/r/20211226074910.2722-1-jszhang@kernel.org Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Vidya Sagar <vidyas@nvidia.com>
2022-04-11gpio: realtek-otto: Add RTL931x supportSander Vanheule1-0/+3
The RTL931x SoC series has support for 32 GPIOs, although not all lines may be broken out to a physical pad. The GPIO bank's parent interrupt can be routed to either or both of the SoC's CPU cores by the GIC. Line-by-line IRQ balancing is not possible on these SoCs. Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-11gpio: realtek-otto: Add RTL930x supportSander Vanheule1-0/+4
The RTL930x SoC series has support for 24 GPIOs, with the port order reversed compared to RTL838x and RTL839x. The RTL930x series also has two CPUs (VPEs) and can distribute individual GPIO interrupts between them. Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-11gpio: realtek-otto: Support per-cpu interruptsSander Vanheule1-1/+74
On SoCs with multiple cores, it is possible that the GPIO interrupt controller supports assigning specific pins to one or more cores. IRQ balancing can be performed on a line-by-line basis if the parent interrupt is routed to all available cores, which is the default upon initialisation. Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-11dmaengine: bestcomm: Prepare cleanup of powerpc's asm/prom.hChristophe Leroy1-0/+2
powerpc's asm/prom.h brings some headers that it doesn't need itself. In order to clean it up, first add missing headers in users of asm/prom.h Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/f98acba303489bdf003e7256460696225b00702e.1648833428.git.christophe.leroy@csgroup.eu Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: ep93xx: Remove redundant word in commentjianchunfu1-1/+1
Remove the second 'to' which is repeated. Signed-off-by: jianchunfu <jianchunfu@cmss.chinamobile.com> Link: https://lore.kernel.org/r/20220403123120.7794-1-jianchunfu@cmss.chinamobile.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: idxd: don't load pasid config until neededDave Jiang2-14/+53
The driver currently programs the system pasid to the WQ preemptively when system pasid is enabled. Given that a dwq will reprogram the pasid and possibly a different pasid, the programming is not necessary. The pasid_en bit can be set for swq as it does not need pasid programming but needs the pasid_en bit. Remove system pasid programming on device config write. Add pasid programming for kernel wq type on wq driver enable. The char dev driver already reprograms the dwq on ->open() call so there's no change. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/164935607115.1660372.6734518676950372366.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11net: ethernet: ti: cpsw: drop CPSW_HEADROOM defineGrygorii Strashko3-3/+2
Since commit 1771afd47430 ("net: cpsw: avoid alignment faults by taking NET_IP_ALIGN into account") the TI CPSW driver was switched to use correct define CPSW_HEADROOM_NA to avoid alignment faults, but there are two places left where CPSW_HEADROOM is still used (without causing issues). Hence, completely drop CPSW_HEADROOM define and use CPSW_HEADROOM_NA everywhere to avoid further mistakes in code. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-11dpaa_eth: Fix missing of_node_put in dpaa_get_ts_info()Lv Ruyi1-2/+6
Both of of_get_parent() and of_parse_phandle() return node pointer with refcount incremented, use of_node_put() on it to decrease refcount when done. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-11gpio: realtek-otto: Support reversed port layoutsSander Vanheule1-4/+51
The GPIO port layout on the RTL930x SoC series is reversed compared to the RTL838x and RTL839x SoC series. Add new port offset calculator functions to ensure the correct order is used when reading port IRQ data, and ensure bgpio uses the right byte ordering. Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-11dmaengine: mediatek-cqdma: Use platform_get_irq() to get the interruptLad Prabhakar1-8/+4
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypasses the hierarchical setup and messes up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220404155557.27316-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: mediatek: mtk-hsdma: Use platform_get_irq() to get the interruptLad Prabhakar1-7/+4
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypasses the hierarchical setup and messes up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220404155557.27316-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: nbpfaxi: Use platform_get_irq_optional() to get the interruptLad Prabhakar1-8/+6
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypasses the hierarchical setup and messes up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq_optional(). There are no non-DT users for this driver so interrupt range (irq_res->start-irq_res->end) is no longer required and with DT we will be sure it will be a single IRQ resource for each index. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220404155557.27316-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11dmaengine: imx-sdma: fix init of uart scriptsKevin Groeneveld1-14/+14
Commit b98ce2f4e32b ("dmaengine: imx-sdma: add uart rom script") broke uart rx on imx5 when using sdma firmware from older Freescale 2.6.35 kernel. In this case reading addr->uartXX_2_mcu_addr was going out of bounds of the firmware memory and corrupting the uart script addresses. Simply adding a bounds check before accessing addr->uartXX_2_mcu_addr does not work as the uartXX_2_mcu_addr members are now beyond the size of the older firmware and the uart addresses would never be populated in that case. There are other ways to fix this but overall the logic seems clearer to me to revert the uartXX_2_mcu_ram_addr structure entries back to uartXX_2_mcu_addr, change the newer entries to uartXX_2_mcu_rom_addr and update the logic accordingly. I have tested this patch on: 1. An i.MX53 system with sdma firmware from Freescale 2.6.35 kernel. Without this patch uart rx is broken in this scenario, with the patch uart rx is restored. 2. An i.MX6D system with no external sdma firmware. uart is okay with or without this patch. 3. An i.MX8MM system using current sdma-imx7d.bin firmware from linux-firmware. uart is okay with or without this patch and I confirmed the rom version of the uart script is being used which was the intention and reason for commit b98ce2f4e32b ("dmaengine: imx-sdma: add uart rom script") in the first place. Fixes: b98ce2f4e32b ("dmaengine: imx-sdma: add uart rom script") Cc: stable@vger.kernel.org Signed-off-by: Kevin Groeneveld <kgroeneveld@lenbrook.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Acked-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/r/20220410223118.15086-1-kgroeneveld@lenbrook.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11clk: renesas: r8a77995: Add RPC clocksGeert Uytterhoeven2-1/+13
Describe the various clocks used by the SPI Multi I/O Bus Controller (RPC-IF) on the R-Car D3 SoC: RPCSRC internal clock, RPC{,D2} clocks derived from it, and RPC-IF module clock. The RPCSRC clock divider on R-Car D3 is very similar to the one on R-Car E3, but uses a different pre-divider for the PLL0 parent. Add a new macro to describe it, reusing the existing clock type for R-Car E3. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/3fd1e886b7737cd0e199603bae81d01be9dcf3aa.1648546700.git.geert+renesas@glider.be